On amd64 (and other architectures), multiple execution models are supported by the hardware. In the case of amd64, both 64-bit and 32-bit applications can be supported simultaneously.
IPC across models presents some problems.
When sending from 32-bit to 64-bit, registers are widened (good), but differences in alignment rules can mean that the 64-bit receiver and the 32-bit sender do not agree about the number and lengths of indirect strings.
When sending from 64-bit to 32-bit, registers are truncated, and there can be difficulties with indirect strings because of differing alignment requirements.
It is definitely possible for the IDL compiler to compile for both models, and to generate cross-model calls that will avoid these problems, but I have not found any "clean" solution.
On platforms that support multiple execution architectures, how do L4 systems deal with this?
If this is discussed in existing documents (perhaps the IDL compiler manual?) a pointer to the document is sufficient.
Thanks!