Hello Everyone,
I am looking for an estimate of the memory footprint to run the hypervisor L4RE on a quad Core ARM Cortex R52. Does it run directly from flash or it needs to be copied to run in RAM ? same question for Guests OS (ie FreeRtos)? What could be the minimal needed L4RE footprint for code and data ?
Also if someone could share a rough idea of scheduling time for an ARM R52 running at 400Mhz ? or nb of cycle it takes to schedule ?
Thanks
_______________________________________________ l4-hackers mailing list -- l4-hackers@os.inf.tu-dresden.de To unsubscribe send an email to l4-hackers-leave@os.inf.tu-dresden.de
Hi,
On Tue Mar 18, 2025 at 10:11:54 +0000, Eric Miniere via l4-hackers wrote:
I am looking for an estimate of the memory footprint to run the hypervisor L4RE on a quad Core ARM Cortex R52. Does it run directly from flash or it needs to be copied to run in RAM ? same question for Guests OS (ie FreeRtos)?
It can also run from flash. A guest as well I believe, but we never tried I think.
What could be the minimal needed L4RE footprint for code and data ?
Depends on the config of course. Last time we checked, a config for 16VMs was around 400k. We're constantly trying to improve here. For the ratio between code/data I do not have numbers at hand but a good part is code that could/would be running off flash.
Also if someone could share a rough idea of scheduling time for an ARM R52 running at 400Mhz ? or nb of cycle it takes to schedule ?
On a Cortex-A53 (in-order) we're short over 2000 cycles in the measurements for a timer interrupt triggered switch, which would translate to 5µs at 400MHz. If VMs would be involved a little bit more because of the added state to swtich. I'd assume it would be in similar range on R52.
Adam _______________________________________________ l4-hackers mailing list -- l4-hackers@os.inf.tu-dresden.de To unsubscribe send an email to l4-hackers-leave@os.inf.tu-dresden.de
Hello Adam,
Thank you for your interesting inputs.
I would like now to modify the given example supplied (GitHub - kernkonzept/demo-l4re-micro-hypervisor: L4Re Micro Hypervisor demo for Cortex-R52 and Cortex-R82https://github.com/kernkonzept/demo-l4re-micro-hypervisor) that run on Cortex R52, to adapt it to my board and add some "hello world" guests at first. I did not find a doc/guide to change this example in particular.
I followed the guide https://l4re.org/getting_started/make.html, but I did not manage to cross compile with the tool chain gcc-arm-none-eabi-10.3-2021.10. I hit errors when cross compiling L4re or fiasco for FVP platform with armv8R (see attached log).
What would be your advice to avoid troubles at that stage ? I don't care to use an old version, this is just for feasibility purpose.
Thanks and Regards,
Eric Miniere
________________________________ From: Adam Lackorzynski Sent: Saturday, March 22, 2025 12:42 AM To: Eric Miniere; l4-hackers@os.inf.tu-dresden.de Cc: Nicola Bruno Subject: Re: L4re RAM/Flash usage and scheduling timing Info
[You don't often get email from adam@l4re.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
Hi,
On Tue Mar 18, 2025 at 10:11:54 +0000, Eric Miniere via l4-hackers wrote:
I am looking for an estimate of the memory footprint to run the hypervisor L4RE on a quad Core ARM Cortex R52. Does it run directly from flash or it needs to be copied to run in RAM ? same question for Guests OS (ie FreeRtos)?
It can also run from flash. A guest as well I believe, but we never tried I think.
What could be the minimal needed L4RE footprint for code and data ?
Depends on the config of course. Last time we checked, a config for 16VMs was around 400k. We're constantly trying to improve here. For the ratio between code/data I do not have numbers at hand but a good part is code that could/would be running off flash.
Also if someone could share a rough idea of scheduling time for an ARM R52 running at 400Mhz ? or nb of cycle it takes to schedule ?
On a Cortex-A53 (in-order) we're short over 2000 cycles in the measurements for a timer interrupt triggered switch, which would translate to 5µs at 400MHz. If VMs would be involved a little bit more because of the added state to swtich. I'd assume it would be in similar range on R52.
Adam
_______________________________________________ l4-hackers mailing list -- l4-hackers@os.inf.tu-dresden.de To unsubscribe send an email to l4-hackers-leave@os.inf.tu-dresden.de
Hi Eric,
On Tue Mar 25, 2025 at 18:03:21 +0000, Eric Miniere wrote:
Hello Adam,
Thank you for your interesting inputs.
I would like now to modify the given example supplied (GitHub - kernkonzept/demo-l4re-micro-hypervisor: L4Re Micro Hypervisor demo for Cortex-R52 and Cortex-R82https://github.com/kernkonzept/demo-l4re-micro-hypervisor) that run on Cortex R52, to adapt it to my board and add some "hello world" guests at first. I did not find a doc/guide to change this example in particular.
Thanks for pointing this out. This repo is actually old and outdated, we're in progress of retiring it.
I followed the guide https://l4re.org/getting_started/make.html, but I did not manage to cross compile with the tool chain gcc-arm-none-eabi-10.3-2021.10. I hit errors when cross compiling L4re or fiasco for FVP platform with armv8R (see attached log).
What would be your advice to avoid troubles at that stage ? I don't care to use an old version, this is just for feasibility purpose.
Please use an arm-linux-gnueabihf-* toolchain instead of the arm-none-eabi one. That should fix both issues. Further, the amount of packages for the Cortex-R could be stripped down as, for example, the AHCI block driver will not be of any use on a typical R52 platform. But probably does not harm compiling it.
Adam
From: Adam Lackorzynski Sent: Saturday, March 22, 2025 12:42 AM To: Eric Miniere; l4-hackers@os.inf.tu-dresden.de Cc: Nicola Bruno Subject: Re: L4re RAM/Flash usage and scheduling timing Info
[You don't often get email from adam@l4re.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
Hi,
On Tue Mar 18, 2025 at 10:11:54 +0000, Eric Miniere via l4-hackers wrote:
I am looking for an estimate of the memory footprint to run the hypervisor L4RE on a quad Core ARM Cortex R52. Does it run directly from flash or it needs to be copied to run in RAM ? same question for Guests OS (ie FreeRtos)?
It can also run from flash. A guest as well I believe, but we never tried I think.
What could be the minimal needed L4RE footprint for code and data ?
Depends on the config of course. Last time we checked, a config for 16VMs was around 400k. We're constantly trying to improve here. For the ratio between code/data I do not have numbers at hand but a good part is code that could/would be running off flash.
Also if someone could share a rough idea of scheduling time for an ARM R52 running at 400Mhz ? or nb of cycle it takes to schedule ?
On a Cortex-A53 (in-order) we're short over 2000 cycles in the measurements for a timer interrupt triggered switch, which would translate to 5µs at 400MHz. If VMs would be involved a little bit more because of the added state to swtich. I'd assume it would be in similar range on R52.
Adam
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/home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/stack [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/stdexcept [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/stop_token [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/streambuf [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/string [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/string_view [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/system_error [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/thread [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/tuple [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/typeindex [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/type_traits [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/unordered_map [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/unordered_set [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/utility [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/valarray [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/variant [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/vector [libstdc++-headers] ==> Updating symlinks /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/include/contrib/libstdc++-v3/version [libstdc++-headers] ==> Updating symlinks === Building package "pkg/l4re-core/l4sys" === === Building package "pkg/l4re-core/libclang_rt" === make[3]: Nothing to be done for 'all'. === Building package "pkg/l4re-core/libgcc" === === Building package "pkg/l4re-core/libgcc_eh" === === Building package "pkg/l4re-core/libunwind_llvm" === make[3]: Nothing to be done for 'all'. === Building package "pkg/l4re-core/compiler-rt" === make[2]: Nothing to be done for 'all'. === Building package "pkg/l4re-core/crtn" === === Building package "pkg/l4re-core/l4util" === === Building package "pkg/l4re-core/cxx" === === Building package "pkg/l4re-core/cxx_libc_io" === === Building package "pkg/l4re-core/l4re" === === Building package "pkg/l4re-core/l4re_c" === === Building package "pkg/l4re-core/l4re_vfs" === === Building package "pkg/l4re-core/libc_backends" === === Building package "pkg/l4re-core/uclibc" === === Building package "pkg/acpica" === === Building package "pkg/ada/libgnat" === [32mlibgnat requires the gnatmake (arm-none-eabi-gnatmake -q) compiler to be installed[0m make[2]: Nothing to be done for 'all'. === Building package "pkg/l4re-core/libsupc++" === === Building package "pkg/ada/examples" === [32mAda compiler (gnatmake) missing, skipping directory '/home/vboxuser/Hyp/L4re/l4re_projects/l4/pkg/ada/examples/ada-hello'.033[0m [32mPackage dependencies missing: [1mlibgnat[22m; skipping directory '/home/vboxuser/Hyp/L4re/l4re_projects/l4/pkg/ada/examples/ada-hello'.[0m make[3]: Nothing to be done for 'all'. === Building package "pkg/drivers-frst" === === Building package "pkg/l4virtio" === === Building package "pkg/l4re-core/libstdc++-v3" === === Building package "pkg/libblock-device" === === Building package "pkg/io/libvbus" === === Building package "pkg/ahci-driver" === [ahci-driver] ==> Linking ahci-drv arm-none-eabi-ld: /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/lib/arm_armv8r/std/l4f/libc.a(__h_errno_location.o): in function `__h_errno_location': /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/pkg/l4re-core/uclibc/lib/uclibc/src/libc/misc/internals/__h_errno_location.c:17: undefined reference to `__emutls_v.__libc_h_errno' make[5]: *** [/home/vboxuser/Hyp/L4re/l4re_projects/l4/mk/prog.mk:153: ahci-drv] Error 1 make[4]: *** [../../../../mk/binary.inc:188: /home/vboxuser/Hyp/L4re/l4re_projects/l4re_builds/armv8r/pkg/ahci-driver/server/src/OBJ-arm_armv8r-std-l4f] Error 2 make[3]: *** [../../../mk/subdir.mk:43: src] Error 2 make[2]: *** [../../mk/subdir.mk:43: server] Error 2 make[1]: *** [mk/project.mk:133: pkg/ahci-driver] Error 2 make[1]: Leaving directory '/home/vboxuser/Hyp/L4re/l4re_projects/l4' make: *** [Makefile:6: do-all-make-goals] Error 2
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