On amd64 (and other architectures), multiple execution models are supported by the hardware. In the case of amd64, both 64-bit and 32-bit applications can be supported simultaneously.
IPC across models presents some problems.
When sending from 32-bit to 64-bit, registers are widened (good), but differences in alignment rules can mean that the 64-bit receiver and the 32-bit sender do not agree about the number and lengths of indirect strings.
When sending from 64-bit to 32-bit, registers are truncated, and there can be difficulties with indirect strings because of differing alignment requirements.
It is definitely possible for the IDL compiler to compile for both models, and to generate cross-model calls that will avoid these problems, but I have not found any "clean" solution.
On platforms that support multiple execution architectures, how do L4 systems deal with this?
If this is discussed in existing documents (perhaps the IDL compiler manual?) a pointer to the document is sufficient.
Thanks!
For completeness (but of course perfectly unhelpful to you): This was not an issue on our MIPS kernel (which supports 32-bit binaries on the 64-bit kernel) because we removed indirect strings a while ago.
Gernot
On Sat, 28 Apr 2007 10:58:58 -0400, "Jonathan S. Shapiro" shap@eros-os.com said:
JSS> On amd64 (and other architectures), multiple execution models are JSS> supported by the hardware. In the case of amd64, both 64-bit and 32-bit JSS> applications can be supported simultaneously.
JSS> IPC across models presents some problems.
JSS> When sending from 32-bit to 64-bit, registers are widened (good), but JSS> differences in alignment rules can mean that the 64-bit receiver and JSS> the 32-bit sender do not agree about the number and lengths of JSS> indirect strings.
JSS> When sending from 64-bit to 32-bit, registers are truncated, and there JSS> can be difficulties with indirect strings because of differing JSS> alignment requirements.
JSS> It is definitely possible for the IDL compiler to compile for both JSS> models, and to generate cross-model calls that will avoid these JSS> problems, but I have not found any "clean" solution.
JSS> On platforms that support multiple execution architectures, how do L4 JSS> systems deal with this?
JSS> If this is discussed in existing documents (perhaps the IDL compiler JSS> manual?) a pointer to the document is sufficient.
JSS> Thanks!
JSS> -- JSS> Jonathan S. Shapiro, Ph.D. JSS> Managing Director JSS> The EROS Group, LLC
JSS> _______________________________________________ JSS> l4-hackers mailing list JSS> l4-hackers@os.inf.tu-dresden.de JSS> http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers
[Jonathan S Shapiro]
On amd64 (and other architectures), multiple execution models are supported by the hardware. In the case of amd64, both 64-bit and 32-bit applications can be supported simultaneously.
IPC across models presents some problems.
When sending from 32-bit to 64-bit, registers are widened (good), but differences in alignment rules can mean that the 64-bit receiver and the 32-bit sender do not agree about the number and lengths of indirect strings.
When sending from 64-bit to 32-bit, registers are truncated, and there can be difficulties with indirect strings because of differing alignment requirements.
There are no problems with string IPC between 32-bit and 64-bit threads since the maximum string length is 4MB in both cases (see 'string length' description in Section 5.4 of L4 X.2 reference manual), and the number of message registers and buffer registers are also the same.
eSk
l4-hackers@os.inf.tu-dresden.de
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Gernot Heiser -
Jonathan S. Shapiro