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Host82576VF Class Reference
Inheritance diagram for Host82576VF:
PciDriver Base82576VF Base82576 StaticReceiver< Host82576VF > Device

Public Member Functions

void reset_complete ()
void handle_rx ()
void handle_tx ()
void handle_rxtx ()
void handle_mbx ()
bool receive (MessageIrq &irq_msg)
bool receive (MessageNetwork &nmsg)
void enable_irqs ()
 Host82576VF (HostVfPci pci, DBus< MessageHostOp > &bus_hostop, DBus< MessageNetwork > &bus_network, Clock *clock, unsigned bdf, unsigned irqs[2], void *reg, uint32 itr_us, bool promisc)
 ~Host82576VF ()
- Public Member Functions inherited from StaticReceiver< Host82576VF >
 StaticReceiver ()
- Public Member Functions inherited from Device
void debug_dump ()
 Device (const char *debug_name)

Private Attributes

DBus< MessageNetwork > & _bus_network
unsigned _hostirqs [2]
volatile uint32 * _hwreg
EthernetAddr _mac
bool _up
unsigned last_rx
dma_desc * _rx_ring
unsigned last_tx
dma_desc * _tx_ring
packet_buffer _rx_buf [desc_ring_len]
packet_buffer _tx_buf [desc_ring_len]
const bool _promisc

Additional Inherited Members

- Static Public Member Functions inherited from StaticReceiver< Host82576VF >
static bool receive_static (Device *o, M &msg)
- Protected Types inherited from PciDriver
enum  MessageLevel {
  INFO = 1<<0, DEBUG = 1<<1, PCI = 1<<2, IRQ = 1<<3,
  RX = 1<<4, TX = 1<<5, VF = 1<<6, WARN = 1<<7,
  ALL = ~0U
}
- Protected Types inherited from Base82576VF
enum  VRegister {
  VTCTRL = 0x0000/4, VTSTATUS = 0x0008/4, VTFRTIMER = 0x1048/4, VTEICS = 0x1520/4,
  VTEIMS = 0x1524/4, VTEIMC = 0x1528/4, VTEIAC = 0x152C/4, VTEIAM = 0x1530/4,
  VTEICR = 0x1580/4, VTEITR0 = 0x1680/4, VTEITR1 = 0x1684/4, VTEITR2 = 0x1688/4,
  VTIVAR = 0x1700/4, VTIVAR_MISC = 0x1740/4, RDBAL0 = 0x2800/4, RDBAH0 = 0x2804/4,
  RDLEN0 = 0x2808/4, SRRCTL0 = 0x280C/4, RDH0 = 0x2810/4, RDT0 = 0x2818/4,
  RXDCTL0 = 0x2828/4, TDBAL0 = 0x3800/4, TDBAH0 = 0x3804/4, TDLEN0 = 0x3808/4,
  TDH0 = 0x3810/4, TXCTL0 = 0x3814/4, TDT0 = 0x3818/4, TXDCTL0 = 0x3828/4,
  TDWBAL0 = 0x3838/4, TDWBAH0 = 0x383C/4, VMB = 0x0C40/4, VBMEM = 0x0800/4
}
- Protected Types inherited from Base82576
enum  Spec { RX_QUEUES = 16 }
enum  Register {
  CTRL = 0x0000/4, STATUS = 0x0008/4, CTRL_EXT = 0x0018/4, MDIC = 0x0020/4,
  SERDESCTL = 0x0024/4, FRTIMER = 0x1048/4, ICR = 0x01500/4, ICS = 0x01504/4,
  IMS = 0x01508/4, IMC = 0x0150C/4, IAM = 0x01510/4, GPIE = 0x01514/4,
  EICS = 0x01520/4, EIMS = 0x01524/4, EIMC = 0x01528/4, EIAC = 0x0152C/4,
  EIAM = 0x01530/4, EICR = 0x01580/4, IVAR0 = 0x01700/4, IVAR_MISC = 0x01740/4,
  RCTL = 0x00100/4, TCTL = 0x00400/4, RXPBS = 0x02404/4, DTXCTL = 0x03590/4,
  RAL0 = 0x05400/4, RAH0 = 0x05404/4, VT_CTL = 0x0581C/4, VMOLR0 = 0x05AD0/4,
  MRQC = 0x05818/4, PFMB0 = 0x00C00/4, PFMBMEM = 0x00800/4, MBVFICR = 0x00C80/4,
  MBVFIMR = 0x00C84/4, VFLRE = 0x00C88/4, VFRE = 0x00C8C/4, VFTE = 0x00C90/4,
  QDE = 0x02408/4, DTXSWC = 0x03500/4, WVBR = 0x03554/4, TCPTIMER = 0x0104C/4,
  MPC = 0x04010/4, GPRC = 0x04074/4, GPTC = 0x04080/4, RNBC = 0x040A0/4,
  UTA0 = 0x0A000/4, MTA0 = 0x05200/4
}
enum  TCPTimer { TCPTIMER_KICKSTART = 1U << 8, TCPTIMER_ENABLE = 1U << 9, TCPTIMER_FINISH = 1U << 10, TCPTIMER_LOOP = 1U << 11 }
enum  DTXSWC { DTX_VMDQ_LOOPBACK = 1U << 31 }
enum  DTXCTL { DTX_MDP_EN = 1U << 5, DTX_SPOOF_INT = 1U << 6 }
enum  VT {
  VT_CTL_DIS_DEF_POOL = 1U<<29, VT_CTL_REP_ENABLE = 1U<<30, VMOLR_RPML_MASK = (1U << 14) - 1, VMOLR_LPE = 1U << 16,
  VMOLR_AUPE = 1U << 24, VMOLR_ROMPE = 1U << 25, VMOLR_ROPE = 1U << 26, VMOLR_BAM = 1U << 27,
  VMOLR_MPE = 1U << 28, VMOLR_STRVLAN = 1U << 30, VMOLR_DEFAULT = 1U << 31
}
enum  Ctrl {
  CTRL_GIO_MASTER_DISABLE = 1U<<2, CTRL_SLU = 1U<<6, CTRL_FRCSPD = 1U<<11, CTRL_FRCDPLX = 1U<<12,
  CTRL_RST = 1U<<26, CTRL_VME = 1U<<30
}
enum  CtrlExt { CTRL_EXT_PFRSTD = 0x1U<<14, CTRL_EXT_LINK_MODE = 0x3U<<22 }
enum  Status {
  STATUS_FD = 0x1U, STATUS_LU = 0x2U, STATUS_LAN_ID = 0x3U<<2, STATUS_SPEED = 0x3U<<6,
  STATUS_SPEED_SHIFT = 6U, STATUS_NUMVF = 0xFU<<14, STATUS_NUMVF_SHIFT = 14U, STATUS_IOV = 1<<18U,
  STATUS_GIO_MASTER_ENABLE = 1<<19U
}
enum  StatusSpeed { SPEED_10M = 0x0, SPEED_100M = 0x1, SPEED_1000M = 0x2, SPEED_1000M2 = 0x3 }
enum  Interrupt {
  IRQ_TXDW = 1U<<7, IRQ_LSC = 1U<<2, IRQ_RXO = 1U<<6, IRQ_RXDW = 1U<<7,
  IRQ_VMMB = 1U<<8, IRQ_FER = 1U<<22, IRQ_NFER = 1U<<23, IRQ_SWD = 1U<<26,
  IRQ_TIMER = 1U<<30, IRQ_INTA = 1U<<31, EIRQ_TIMER = 1U<<30, EIRQ_OTHER = 1U<<31,
  GPIE_NSICR = 1U<<0, GPIE_MULTIPLE_MSIX = 1U<<4, GPIE_EIAME = 1U<<30, GPIE_PBA = 1U<<31
}
enum  ReceiveControl {
  RCTL_RXEN = 1<<1, RCTL_SBP = 1<<2, RCTL_UPE = 1<<3, RCTL_MPE = 1<<4,
  RCTL_LPE = 1<<5, RCTL_BAM = 1<<15, RCTL_BSIZE = 3<<16, RAH_AV = 1U<<31,
  RAH_POOLSEL_SHIFT = 18, MRQC_MRQE_011 = 3U, SRRCTL_DESCTYPE_ADV1B = 1U<<25, SRRCTL_DROP_EN = 1U<<31
}
enum  TransmitControl { TCTL_TXEN = 1U<<1, TCTL_PSP = 1U<<3, DTXSWC_LOOP_EN = 1U<<31 }
enum  PacketType {
  TYPE_L2 = 1<<11, TYPE_IPV4 = 1, TYPE_IPV4E = 1<<1, TYPE_IPV6 = 1<<2,
  TYPE_IPV6E = 1<<3, TYPE_TCP = 1<<4, TYPE_UDP = 1<<5
}
enum  PFMBX {
  Sts = 1U << 0, Ack = 1U << 1, VFU = 1U << 2, PFU = 1U << 3,
  RVFU = 1U << 4
}
enum  MBX {
  VF_RESET = 0x0001U, VF_SET_MAC_ADDR = 0x0002U, VF_SET_MULTICAST = 0x0003U, VF_SET_LPE = 0x0005U,
  VF_SET_PROMISC = 0x0006U, VF_SET_PROMISC_MULTICAST = 0x2U << 16, VF_SET_PROMISC_UNICAST = 0x4U << 16, PF_CONTROL_MSG = 0x0100U,
  CMD_ACK = 0x80000000U, CMD_NACK = 0x40000000U, CTS = 0x20000000U
}
- Protected Member Functions inherited from PciDriver
void spin (unsigned micros)
bool wait (volatile uint32 &reg, uint32 mask, uint32 value, unsigned timeout_micros=1000000)
 __attribute__ ((format(printf, 3, 4))) void msg(unsigned level
const char mword addr2phys (void *ptr)
 Translate a virtual to a physical address.
bool assign_pci ()
 PciDriver (const char *name, DBus< MessageHostOp > &bus_hostop, Clock *clock, unsigned msg_level, uint16 bdf)
- Protected Attributes inherited from PciDriver
const char * _name
DBus< MessageHostOp > & _bus_hostop
bool _dmar
Clock * _clock
unsigned _msg_level
 Logging.
uint16 _bdf
const char * msg

Constructor & Destructor Documentation

Host82576VF::Host82576VF ( HostVfPci  pci,
DBus< MessageHostOp > &  bus_hostop,
DBus< MessageNetwork > &  bus_network,
Clock *  clock,
unsigned  bdf,
unsigned  irqs[2],
void *  reg,
uint32  itr_us,
bool  promisc 
)
inline
Host82576VF::~Host82576VF ( )
inline

Member Function Documentation

void Host82576VF::enable_irqs ( )
inline
void Host82576VF::handle_mbx ( )
inline
void Host82576VF::handle_rx ( )
inline
void Host82576VF::handle_rxtx ( )
inline
void Host82576VF::handle_tx ( )
inline
bool Host82576VF::receive ( MessageIrq &  irq_msg)
inline
bool Host82576VF::receive ( MessageNetwork &  nmsg)
inline
void Host82576VF::reset_complete ( )
inline

Member Data Documentation

DBus<MessageNetwork>& Host82576VF::_bus_network
private
unsigned Host82576VF::_hostirqs[2]
private
volatile uint32* Host82576VF::_hwreg
private
EthernetAddr Host82576VF::_mac
private
const bool Host82576VF::_promisc
private
packet_buffer Host82576VF::_rx_buf[desc_ring_len]
private
dma_desc* Host82576VF::_rx_ring
private
packet_buffer Host82576VF::_tx_buf[desc_ring_len]
private
dma_desc* Host82576VF::_tx_ring
private
bool Host82576VF::_up
private
unsigned Host82576VF::last_rx
private
unsigned Host82576VF::last_tx
private
The documentation for this class was generated from the following file: