NOVA User-Level Environment
Version testbox/changed-memory-timing-317-g320d8b5
|
An instruction cache that keeps decoded instructions. More...
#include <instcache.h>
Classes | |
struct | Descriptor |
Private Types | |
enum | EFLAGS { EFL_ZF = 1 << 6, EFL_TF = 1 << 8, EFL_IF = 1 << 9, EFL_OF = 1 << 11, EFL_IOPL = 3 << 12, EFL_NT = 1 << 14, EFL_RF = 1 << 16, EFL_VM = 1 << 17, EFL_AC = 1 << 18, EFL_VIF = 1 << 19, EFL_VIP = 1 << 20 } |
enum | { IC_ASM = 1 << 0, IC_SAVEFLAGS = 1 << 1, IC_LOADFLAGS = 1 << 2, IC_MODRM = 1 << 3, IC_DIRECTION = 1 << 4, IC_READONLY = 1 << 5, IC_BYTE = 1 << 6, IC_LOCK = 1 << 7, IC_BITS = 1 << 8, IC_RMW = 1 << 9, IC_MOFS = 1 << 10 } |
enum | { SIZE = 64, ASSOZ = 4 } |
Private Member Functions | |
unsigned | slot (unsigned tag) |
unsigned _fpustate[512/sizeof(unsigned)] | __attribute__ ((aligned(16))) |
int | send_message (CpuMessage::Type type) |
int | event_injection () |
int | fetch_code (InstructionCacheEntry *entry, unsigned len) |
Fetch code. | |
bool | find_entry (unsigned &index) |
Find a cache entry for the given state and checks whether it is still valid. | |
int | get_modrm () |
Fetch the modrm byte including sib byte and displacement. | |
int | cpl0_test () |
Check whether CPL0 is required. | |
int | handle_segment (CpuState::Descriptor *desc, unsigned &virt, unsigned length, bool write, bool stackop) |
Add base and check segment type and limit. | |
template<unsigned operand_size> | |
int | logical_mem (CpuState::Descriptor *desc, unsigned virt, bool write, void *&res, bool stackop=false) |
template<unsigned operand_size> | |
int | helper_JMP_absolute (unsigned nrip) |
Perform an absolute JMP. | |
template<unsigned feature, unsigned operand_size> | |
int | __attribute__ ((regparm(3))) string_helper() |
int | helper_MOV__CR0__EDX () |
Move from control register. | |
int | helper_MOV__EDX__CR0 () |
Move to control register. | |
int | helper_LMSW (unsigned short value) |
int | desc_get_base (unsigned short selector, unsigned long &base, bool ext) |
int | load_gdt_descriptor (Descriptor &desc, unsigned short selector, bool ext) |
int | load_idt_descriptor (Descriptor &desc, unsigned event) |
int | desc_set_flag (Descriptor &desc, unsigned short selector, unsigned char flag, bool ext) |
int | helper_LTR (unsigned short selector) |
int | helper_LLDT (unsigned short selector) |
int | set_segment (CpuState::Descriptor *seg, unsigned short sel, bool cplcheck=true) |
int | helper_far_jmp (unsigned tmp_cs, unsigned tmp_eip, unsigned tmp_flag) |
template<unsigned operand_size, bool lcall> | |
int | helper_lcall (void *tmp_src) |
template<unsigned operand_size> | |
int | helper_LJMP (void *tmp_src) |
template<unsigned operand_size> | |
int | helper_LCALL (void *tmp_src) |
template<unsigned operand_size> | |
int | helper_IRET () |
int | idt_traversal (unsigned event, unsigned error_code) |
int | helper_INT (unsigned char vector) |
int | helper_INVLPG () |
int | helper_FWAIT () |
int | helper_MOV__DB0__EDX () |
int | helper_MOV__EDX__DB0 () |
int | helper_FXSAVE () |
fxsave. | |
int | helper_FRSTOR () |
void | helper_AAM (unsigned char imm) |
void | helper_AAD (unsigned char imm) |
void | helper_XLAT () |
template<unsigned operand_size> | |
void | helper_ENTER (unsigned *imm) |
int | helper_SYSENTER () |
sysenter. | |
int | helper_SYSEXIT () |
sysexit. | |
int | helper_CLI () |
cli. | |
int | helper_STI () |
sti. | |
template<unsigned operand_size> | |
void | __attribute__ ((regparm(3))) helper_LEA() |
lea. | |
template<unsigned operand_size> | |
int | helper_loadsegment (CpuState::Descriptor *desc) |
lds, les, lfs, lgs, lss. | |
_values () | |
_vcpu (vcpu) |
Static Private Member Functions | |
static void | move (void *tmp_dst, void *tmp_src, unsigned order) |
template<unsigned operand_size> | |
static void | move (void *tmp_dst, void *tmp_src) |
template<unsigned operand_size> | |
static int | __attribute__ ((regparm(3))) helper_JMP_static(InstructionCache *cache |
static void | set_realmode_segment (CpuState::Descriptor *seg, unsigned short sel, bool v86mode) |
static void | __attribute__ ((regparm(3))) exec_00_add_0(InstructionCache *cache |
Private Attributes | |
unsigned | _pos |
unsigned | _tags [SIZE *ASSOZ] |
InstructionCacheEntry | _values [SIZE *ASSOZ] |
VCpu * | _vcpu |
InstructionCacheEntry * | _entry |
unsigned | _oeip |
unsigned | _oesp |
unsigned | _ointr_state |
unsigned | _dr6 |
unsigned | _dr [4] |
static void void * | tmp_src |
Additional Inherited Members | |
Public Types inherited from MemCache | |
enum | Type { TYPE_R = 1u << 0, TYPE_W = 1u << 1, TYPE_RMW = TYPE_R | TYPE_W, TYPE_U = 1u << 2, TYPE_RES = 1u << 3, TYPE_X = 1u << 4 } |
Public Member Functions inherited from MemCache | |
CacheEntry * | get (unsigned long phys1, unsigned long phys2, unsigned len, Type type) |
Get an entry from the cache or fetch one from memory. | |
void | invalidate (bool writeback) |
Invalidate the cache, thus writeback the buffers. | |
MemCache (DBus< MessageMem > &mem, DBus< MessageMemRegion > &memregion) | |
Public Attributes inherited from MemCache | |
bool | debug |
CacheEntry | _values [ASSOZ] |
unsigned | _newest |
Protected Member Functions inherited from MemTlb | |
Type | user_access (Type type) |
int | init () |
int | read_code (unsigned long virt, unsigned len, void *buffer) |
Read the len instruction-bytes at the given address into a buffer. | |
int | prepare_virtual (unsigned virt, unsigned len, Type type, void *&ptr) |
MemTlb (DBus< MessageMem > &mem, DBus< MessageMemRegion > &memregion) | |
Protected Attributes inherited from MemTlb | |
CpuState * | _cpu |
An instruction cache that keeps decoded instructions.
|
private |
|
private |
|
staticprivate |
|
inlineprivate |
lea.
state: stable doc: intel
|
staticprivate |
|
private |
|
inlineprivate |
|
private |
|
inlineprivate |
|
inlineprivate |
Check whether CPL0 is required.
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
Fetch code.
|
inlineprivate |
Find a cache entry for the given state and checks whether it is still valid.
|
inlineprivate |
Fetch the modrm byte including sib byte and displacement.
|
inlineprivate |
Add base and check segment type and limit.
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
cli.
state: stable doc: intel, amd
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
fxsave.
Missing: #AC for unaligned access
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
Perform an absolute JMP.
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
lds, les, lfs, lgs, lss.
state: testing doc: intel
|
inlineprivate |
|
inlineprivate |
Move from control register.
|
inlineprivate |
|
inlineprivate |
Move to control register.
|
inlineprivate |
|
inlineprivate |
sti.
state: stable doc: intel, amd
|
inlineprivate |
sysenter.
state: stable doc: intel
|
inlineprivate |
sysexit.
state: stable doc: intel
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlineprivate |
|
inlinestaticprivate |
|
inlinestaticprivate |
|
inlineprivate |
|
inlinestaticprivate |
|
inlineprivate |
|
inlineprivate |
|
private |
|
private |
|
private |
|
private |
|
private |
|
private |
|
private |
|
private |
|
private |
|
private |