NOVA User-Level Environment
Version testbox/changed-memory-timing-317-g320d8b5
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Generic hardware register definition. More...
Macros | |
#define | DEFINE_REG(NAME, OFFSET, VALUE, MASK) private: unsigned NAME; public: static const unsigned NAME##_offset = OFFSET; static const unsigned NAME##_mask = MASK; static const unsigned NAME##_reset = VALUE; |
#define | REG_RO(NAME, OFFSET, VALUE) REG(NAME, OFFSET, static const unsigned NAME = VALUE;, value = VALUE; , break; , ) |
Defines a read-only register. | |
#define | REG_RW(NAME, OFFSET, VALUE, MASK, WRITE_CALLBACK) REG(NAME, OFFSET, DEFINE_REG(NAME, OFFSET, VALUE, MASK) , value = NAME; , if (!MASK) return false; if (strict && value & ~MASK) return false; NAME = (NAME & ~MASK) | (value & MASK); WRITE_CALLBACK; , NAME=VALUE;) |
Defines a read/write register. | |
#define | REG_WR(NAME, OFFSET, VALUE, MASK, RW1S, RW1C, WRITE_CALLBACK) REG(NAME, OFFSET, DEFINE_REG(NAME, OFFSET, VALUE, MASK), value = NAME; , if (!MASK) return false; unsigned oldvalue = NAME; value = value & ~RW1S | ( value | oldvalue) & RW1S; value = value & ~RW1C | (~value & oldvalue) & RW1C; NAME = (NAME & ~MASK) | (value & MASK); WRITE_CALLBACK; , NAME = VALUE;) |
Defines a read/write register with set/clear bits. | |
#define | REGSET(NAME,...) private: __VA_ARGS__ |
Defines a set of registers. | |
#define | REG(NAME, OFFSET, MEMBER, READ, WRITE, RESET) MEMBER |
#define | REGSET(NAME,...) bool NAME##_read(unsigned offset, unsigned &value) { switch (offset) { __VA_ARGS__ default: break; } return false; } |
Defines a set of registers. | |
#define | REG(NAME, OFFSET, MEMBER, READ, WRITE, RESET) case OFFSET: { READ }; return true; |
#define | REGSET(NAME,...) bool NAME##_write(unsigned offset, unsigned value, bool strict=false) { switch (offset) { __VA_ARGS__ default: break; } return 0; } |
Defines a set of registers. | |
#define | REG(NAME, OFFSET, MEMBER, READ, WRITE, RESET) case OFFSET: { WRITE }; return true; |
#define | REGSET(NAME,...) void NAME##_reset() { __VA_ARGS__ }; private: |
Defines a set of registers. | |
#define | REG(NAME, OFFSET, MEMBER, READ, WRITE, RESET) RESET |
Generic hardware register definition.
Copyright (C) 2009, Bernhard Kauer bk@vm Economic rights: Technische Universitaet Dresden (Germany) mon. org
This file is part of Vancouver.
Vancouver is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation.
Vancouver is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License version 2 for more details.
#define DEFINE_REG | ( | NAME, | |
OFFSET, | |||
VALUE, | |||
MASK | |||
) | private: unsigned NAME; public: static const unsigned NAME##_offset = OFFSET; static const unsigned NAME##_mask = MASK; static const unsigned NAME##_reset = VALUE; |
#define REG_RO | ( | NAME, | |
OFFSET, | |||
VALUE | |||
) | REG(NAME, OFFSET, static const unsigned NAME = VALUE;, value = VALUE; , break; , ) |
Defines a read-only register.
#define REG_RW | ( | NAME, | |
OFFSET, | |||
VALUE, | |||
MASK, | |||
WRITE_CALLBACK | |||
) | REG(NAME, OFFSET, DEFINE_REG(NAME, OFFSET, VALUE, MASK) , value = NAME; , if (!MASK) return false; if (strict && value & ~MASK) return false; NAME = (NAME & ~MASK) | (value & MASK); WRITE_CALLBACK; , NAME=VALUE;) |
Defines a read/write register.
NAME | Name of the register |
OFFSET | Offset of the register |
VALUE | Reset value of the register. |
MASK | Defines which bits of the register are writable - the corresponding bit is set to 1 |
WRITE_CALLBACK | Code that is executed whenever the register gets a new value. |
#define REG_WR | ( | NAME, | |
OFFSET, | |||
VALUE, | |||
MASK, | |||
RW1S, | |||
RW1C, | |||
WRITE_CALLBACK | |||
) | REG(NAME, OFFSET, DEFINE_REG(NAME, OFFSET, VALUE, MASK), value = NAME; , if (!MASK) return false; unsigned oldvalue = NAME; value = value & ~RW1S | ( value | oldvalue) & RW1S; value = value & ~RW1C | (~value & oldvalue) & RW1C; NAME = (NAME & ~MASK) | (value & MASK); WRITE_CALLBACK; , NAME = VALUE;) |
Defines a read/write register with set/clear bits.
NAME | Name of the register |
OFFSET | Offset of the register |
VALUE | Reset value of the register. |
MASK | Defines which bits of the register are writable - the corresponding bit is set to 1 |
RW1S | Defines which bits of the register are set when 1 is written to the bit. Writing 0 to that bit does nothing. |
RW1C | Defines which bits of the register are cleared when 1 is written to the bit. Writing 0 to that bit does nothing. |
WRITE_CALLBACK | Code that is executed whenever the register gets a new value. |
#define REGSET | ( | NAME, | |
... | |||
) | private: __VA_ARGS__ |
Defines a set of registers.
#define REGSET | ( | NAME, | |
... | |||
) | bool NAME##_read(unsigned offset, unsigned &value) { switch (offset) { __VA_ARGS__ default: break; } return false; } |
Defines a set of registers.
#define REGSET | ( | NAME, | |
... | |||
) | bool NAME##_write(unsigned offset, unsigned value, bool strict=false) { switch (offset) { __VA_ARGS__ default: break; } return 0; } |
Defines a set of registers.
#define REGSET | ( | NAME, | |
... | |||
) | void NAME##_reset() { __VA_ARGS__ }; private: |
Defines a set of registers.