165l4_vm_vmx_field_ptr(
void *vmcs,
unsigned field)
L4_NOTHROW;
349 case 3:
if (
sizeof(
l4_umword_t) == 8)
return 3;
else return 2;
398l4_vm_vmx_field_offset(
void const *vmcs,
unsigned field)
L4_NOTHROW
404 return (
unsigned)offsets[field >> 10] * 64 + ((field & 0x3ff) << offsets[Si + (field >> 13)]);
409l4_vm_vmx_field_ptr(
void *vmcs,
unsigned field)
L4_NOTHROW
411 return (
void *)((
char *)vmcs + l4_vm_vmx_field_offset(vmcs, field));
420l4_vm_vmx_copy_state(
void const *vmcs,
void *_dst,
void const *_src)
L4_NOTHROW
424 unsigned offs = offsets[28] * 64;
425 unsigned size = offsets[29] * 64;
426 char *
const dst = (
char*)_dst + offs;
427 char const *
const src = (
char const *)_src + offs;
428 __builtin_memcpy(dst, src, size);
435 void **current_vmcs = (
void **)((
char *)vmcs + 8);
436 if (*current_vmcs != user_vmcs)
439 l4_vm_vmx_copy_state(vmcs, user_vmcs, vmcs);
447 void **current_vmcs = (
void **)((
char *)vmcs + 8);
448 if (*current_vmcs == user_vmcs)
451 if (*current_vmcs && *current_vmcs != user_vmcs)
454 *current_vmcs = user_vmcs;
455 l4_vm_vmx_copy_state(vmcs, vmcs, user_vmcs);
462{
return *(
l4_umword_t*)(l4_vm_vmx_field_ptr(vmcs, field)); }
467{
return *(
l4_uint16_t*)(l4_vm_vmx_field_ptr(vmcs, field)); }
472{
return *(
l4_uint32_t*)(l4_vm_vmx_field_ptr(vmcs, field)); }
477{
return *(
l4_uint64_t*)(l4_vm_vmx_field_ptr(vmcs, field)); }
496{ *(
l4_umword_t*)(l4_vm_vmx_field_ptr(vmcs, field)) = val; }
501{ *(
l4_uint16_t*)(l4_vm_vmx_field_ptr(vmcs, field)) = val; }
506{ *(
l4_uint32_t*)(l4_vm_vmx_field_ptr(vmcs, field)) = val; }
511{ *(
l4_uint64_t*)(l4_vm_vmx_field_ptr(vmcs, field)) = val; }
532 return caps[cap_msr & 0xf];
unsigned long l4_umword_t
Unsigned machine word.
unsigned char l4_uint8_t
Unsigned 8bit value.
unsigned int l4_uint32_t
Unsigned 32bit value.
unsigned short int l4_uint16_t
Unsigned 16bit value.
unsigned long long l4_uint64_t
Unsigned 64bit value.
@ L4_VCPU_OFFSET_EXT_INFOS
Offset where extended infos begin.
void l4_vm_vmx_write_nat(void *vmcs, unsigned field, l4_umword_t val) L4_NOTHROW
Write to a natural width VMCS field.
void l4_vm_vmx_ptr_load(void *vmcs, void *user_vmcs) L4_NOTHROW
Loads the user_vmcs as the current VMCS.
l4_uint16_t l4_vm_vmx_read_16(void *vmcs, unsigned field) L4_NOTHROW
Read a 16bit VMCS field.
unsigned l4_vm_vmx_field_order(unsigned field) L4_NOTHROW
Return length in power of two (bytes) of a VMCS field.
void l4_vm_vmx_write_32(void *vmcs, unsigned field, l4_uint32_t val) L4_NOTHROW
Write to a 32bit VMCS field.
l4_uint32_t l4_vm_vmx_get_cr2_index(void const *vmcs) L4_NOTHROW
Get the VMCS field index of the virtual CR2 register.
void l4_vm_vmx_clear(void *vmcs, void *user_vmcs) L4_NOTHROW
Saves cached state from the kernel VMCS to the user VMCS.
l4_uint64_t l4_vm_vmx_read(void *vmcs, unsigned field) L4_NOTHROW
Read any VMCS field.
l4_uint32_t l4_vm_vmx_read_32(void *vmcs, unsigned field) L4_NOTHROW
Read a 32bit VMCS field.
unsigned l4_vm_vmx_field_len(unsigned field) L4_NOTHROW
Return length in bytes of a VMCS field.
L4_vm_vmx_caps_regs
Exported VMX capability registers.
l4_uint32_t l4_vm_vmx_get_caps_default1(void const *vcpu_state, unsigned cap_msr) L4_NOTHROW
Get a default to one capability register for VMX.
void l4_vm_vmx_write(void *vmcs, unsigned field, l4_uint64_t val) L4_NOTHROW
Write to an arbitrary VMCS field.
void l4_vm_vmx_write_64(void *vmcs, unsigned field, l4_uint64_t val) L4_NOTHROW
Write to a 64bit VMCS field.
l4_umword_t l4_vm_vmx_read_nat(void *vmcs, unsigned field) L4_NOTHROW
Read a natural width VMCS field.
l4_uint64_t l4_vm_vmx_read_64(void *vmcs, unsigned field) L4_NOTHROW
Read a 64bit VMCS field.
L4_vm_vmx_dfl1_regs
Exported VMX capability registers (default to 1 bits).
l4_uint64_t l4_vm_vmx_get_caps(void const *vcpu_state, unsigned cap_msr) L4_NOTHROW
Get a capability register for VMX.
void l4_vm_vmx_write_16(void *vmcs, unsigned field, l4_uint16_t val) L4_NOTHROW
Write to a 16bit VMCS field.
@ L4_VM_VMX_VMCS_MSR_LSTAR
VMCS offset of IA32e mode system call target address MSR.
@ L4_VM_VMX_VMCS_MSR_STAR
VMCS offset of system call target address MSR.
@ L4_VM_VMX_VMCS_CR2
VMCS offset for CR2.
@ L4_VM_VMX_VMCS_XCR0
VMCS offset of extended control register XCR0.
@ L4_VM_VMX_VMCS_MSR_TSC_AUX
VMCS offset of auxiliary TSC signature MSR.
@ L4_VM_VMX_VMCS_MSR_KERNEL_GS_BASE
VMCS offset of GS base address swap target MSR.
@ L4_VM_VMX_VMCS_MSR_SYSCALL_MASK
VMCS offset of system call flag mask MSR.
@ L4_VM_VMX_VMCS_MSR_CSTAR
VMCS offset of IA32 mode system call target address MSR.
@ L4_VM_VMX_TRUE_PROCBASED_CTLS_REG
True processor based control caps.
@ L4_VM_VMX_MISC_REG
Misc caps.
@ L4_VM_VMX_PROCBASED_CTLS2_REG
Processor based control 2 caps.
@ L4_VM_VMX_EPT_VPID_CAP_REG
EPT and VPID caps.
@ L4_VM_VMX_CR4_FIXED1_REG
Fixed to 1 bits of CR4.
@ L4_VM_VMX_NUM_CAPS_REGS
Total number of VMX capability registers.
@ L4_VM_VMX_CR4_FIXED0_REG
Fixed to 0 bits of CR4.
@ L4_VM_VMX_TRUE_ENTRY_CTLS_REG
True entry control caps.
@ L4_VM_VMX_CR0_FIXED1_REG
Fixed to 1 bits of CR0.
@ L4_VM_VMX_CR0_FIXED0_REG
Fixed to 0 bits of CR0.
@ L4_VM_VMX_VMCS_ENUM_REG
VMCS enumeration info.
@ L4_VM_VMX_TRUE_EXIT_CTLS_REG
True exit control caps.
@ L4_VM_VMX_TRUE_PINBASED_CTLS_REG
True pin-based control caps.
@ L4_VM_VMX_BASIC_REG
Basic VMX capabilities.
@ L4_VM_VMX_ENTRY_CTLS_DFL1_REG
Default 1 bits in entry controls.
@ L4_VM_VMX_EXIT_CTLS_DFL1_REG
Default 1 bits in exit controls.
@ L4_VM_VMX_PINBASED_CTLS_DFL1_REG
Default 1 bits in pin-based controls.
@ L4_VM_VMX_NUM_DFL1_REGS
Total number of default on registers.
@ L4_VM_VMX_PROCBASED_CTLS_DFL1_REG
Default 1 bits in processor-based controls.
#define L4_NOTHROW
Mark a function declaration and definition as never throwing an exception.
#define L4_INLINE
L4 Inline function attribute.