|
Enumerations |
enum | { Alloc_none = 0,
Alloc_perf = 1,
Alloc_watchdog = 2
} |
enum | {
Msr_p5_cesr = 0x11,
Msr_p5_ctr0 = 0x12,
Msr_p5_ctr1 = 0x13,
P5_evntsel_user = 0x00000080,
P5_evntsel_kern = 0x00000040,
P5_evntsel_duration = 0x00000100,
Msr_p6_perfctr0 = 0xC1,
Msr_p6_evntsel0 = 0x186,
P6_evntsel_enable = 0x00400000,
P6_evntsel_int = 0x00100000,
P6_evntsel_user = 0x00010000,
P6_evntsel_kern = 0x00020000,
P6_evntsel_edge = 0x00040000,
Msr_k7_evntsel0 = 0xC0010000,
Msr_k7_perfctr0 = 0xC0010004,
K7_evntsel_enable = P6_evntsel_enable,
K7_evntsel_int = P6_evntsel_int,
K7_evntsel_user = P6_evntsel_user,
K7_evntsel_kern = P6_evntsel_kern,
K7_evntsel_edge = P6_evntsel_edge,
Msr_p4_misc_enable = 0x1A0,
Msr_p4_perfctr0 = 0x300,
Msr_p4_bpu_counter0 = 0x300,
Msr_p4_cccr0 = 0x360,
Msr_p4_fsb_escr0 = 0x3A2,
P4_escr_user = (1<<2),
P4_escr_kern = (1<<3),
Msr_p4_bpu_cccr0 = 0x360,
P4_cccr_ovf = (1<<31),
P4_cccr_ovf_pmi = (1<<26),
P4_cccr_complement = (1<<19),
P4_cccr_compare = (1<<18),
P4_cccr_required = (3<<16),
P4_cccr_enable = (1<<12)
} |
enum | {
Perfctr_x86_generic = 0,
Perfctr_x86_intel_p5 = 1,
Perfctr_x86_intel_p5mmx = 2,
Perfctr_x86_intel_p6 = 3,
Perfctr_x86_intel_pii = 4,
Perfctr_x86_intel_piiI = 5,
Perfctr_x86_intel_p4 = 11,
Perfctr_x86_intel_p4m2 = 12,
Perfctr_x86_intel_p4m3 = 16,
Perfctr_x86_intel_pentm = 14,
Perfctr_x86_amd_k7 = 9,
Perfctr_x86_amd_k8 = 13
} |
Functions |
void | perfctr_set_cputype (unsigned) __attribute__((weak)) |
const struct perfctr_event * | perfctr_lookup_event (unsigned, unsigned *) __attribute__((weak)) |
const struct perfctr_event * | perfctr_index_event (unsigned) __attribute__((weak)) |
unsigned | perfctr_get_max_event (void) __attribute__((weak)) |
| STATIC_INITIALIZE_P (Perf_cnt, PERF_CNT_INIT_PRIO) |