|
Public Types |
enum | Apic_type { APIC_NONE,
APIC_P6,
APIC_P4,
APIC_K7
} |
Static Public Member Functions |
static void | init () FIASCO_INIT |
static unsigned | get_frequency_khz () |
static Unsigned32 | reg_read (unsigned reg) |
static void | reg_write (unsigned reg, Unsigned32 val) |
static int | reg_delivery_mode (Unsigned32 val) |
static int | reg_lvt_vector (Unsigned32 val) |
static Unsigned32 | timer_reg_read () |
static Unsigned32 | timer_reg_read_initial () |
static void | timer_reg_write (Unsigned32 val) |
static Unsigned32 | ns_to_apic (Unsigned64 ns) |
static void | timer_enable_irq () |
static void | timer_disable_irq () |
static int | timer_is_irq_enabled () |
static void | timer_set_periodic () |
static void | timer_set_one_shot () |
static void | timer_assign_irq_vector (unsigned vector) |
static void | irq_ack () |
static int | have_pcint () |
static int | have_tsint () |
static int | test_present_but_disabled () |
static FIASCO_INIT int | check_still_getting_interrupts () |
static int | is_present () |
static int | cpu_type () |
static void | set_perf_nmi () |
static void | done () |
static void | reg_show (unsigned reg) |
static void | regs_show (void) |
static void | timer_show (void) |
static void | id_show (void) |
static void | irr_show () |
static void | isr_show () |
Private Types |
enum | {
APIC_ID = 0x20,
APIC_LVR = 0x30,
APIC_TASKPRI = 0x80,
APIC_TPRI_MASK = 0xFF,
APIC_EOI = 0xB0,
APIC_LDR = 0xD0,
APIC_LDR_MASK = (0xFF<<24),
APIC_DFR = 0xE0,
APIC_SPIV = 0xF0,
APIC_ISR = 0x100,
APIC_TMR = 0x180,
APIC_IRR = 0x200,
APIC_ESR = 0x280,
APIC_LVTT = 0x320,
APIC_LVTTHMR = 0x330,
APIC_LVTPC = 0x340,
APIC_LVT0 = 0x350,
APIC_TIMER_BASE_DIV = 0x2,
APIC_LVT1 = 0x360,
APIC_LVTERR = 0x370,
APIC_TMICT = 0x380,
APIC_TMCCT = 0x390,
APIC_TDCR = 0x3E0,
APIC_SND_PENDING = (1<<12),
APIC_INPUT_POLARITY = (1<<13),
APIC_LVT_REMOTE_IRR = (1<<14),
APIC_LVT_LEVEL_TRIGGER = (1<<15),
APIC_LVT_MASKED = (1<<16),
APIC_LVT_TIMER_PERIODIC = (1<<17),
APIC_TDR_DIV_1 = 0xB,
APIC_TDR_DIV_2 = 0x0,
APIC_TDR_DIV_4 = 0x1,
APIC_TDR_DIV_8 = 0x2,
APIC_TDR_DIV_16 = 0x3,
APIC_TDR_DIV_32 = 0x8,
APIC_TDR_DIV_64 = 0x9,
APIC_TDR_DIV_128 = 0xA
} |
enum | {
MASK = 1,
TRIGGER_MODE = 2,
REMOTE_IRR = 4,
PIN_POLARITY = 8,
DELIVERY_STATE = 16,
DELIVERY_MODE = 32
} |
enum | { APIC_BASE_MSR = 0x1b
} |
Private Member Functions |
| Apic () |
| Apic (const Apic &) |
Static Private Member Functions |
static void | error_interrupt (Return_frame *regs) asm("apic_error_interrupt") FIASCO_FASTCALL |
static Unsigned32 | get_id () |
static Unsigned32 | get_version () |
static int | is_integrated () |
static Unsigned32 | get_max_lvt () |
static Unsigned32 | get_num_errors () |
static void | clear_num_errors () |
static FIASCO_INIT void | map_apic_page () |
static FIASCO_INIT int | test_cpu () |
static int | test_present () |
static void | timer_set_divisor (unsigned newdiv) |
static FIASCO_INIT int | get_maxlvt () |
static FIASCO_INIT int | check_working () |
static FIASCO_INIT void | init_spiv () |
static FIASCO_INIT void | enable_errors () |
static FIASCO_INIT void | route_pic_through_apic () |
static FIASCO_INIT void | init_lvt () |
static FIASCO_INIT void | activate_by_msr () |
static FIASCO_INIT void | calibrate_timer () |
static const char * | reg_lvt_bit_str (unsigned reg, Unsigned32 val, int bit) |
static void | bitfield_show (unsigned reg, const char *name, char flag) |
Static Private Attributes |
static int | present |
static int | good_cpu |
static const Address | io_base = Mem_layout::Local_apic_page |
static Address | phys_base |
static unsigned | timer_divisor = 1 |
static Apic_type | type = APIC_NONE |
static unsigned | frequency_khz |
static unsigned | max_lvt |
static Unsigned32 | scaler_ns_to_apic |