NOVA User-Level Environment
Version testbox/changed-memory-timing-317-g320d8b5
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Provide HW PCI config space access by bridging PCI cfg read/write messages to the HW IO busses. More...
Public Member Functions | |
PciConfigAccess (DBus< MessageHwIOIn > &hwioin, DBus< MessageHwIOOut > &hwioout, unsigned semcap) | |
bool | receive (MessageHwPciConfig &msg) |
Public Member Functions inherited from StaticReceiver< PciConfigAccess > | |
StaticReceiver () | |
Public Member Functions inherited from Device | |
void | debug_dump () |
Device (const char *debug_name) |
Public Attributes | |
DBus< MessageHwIOIn > & | _hwioin |
DBus< MessageHwIOOut > & | _hwioout |
Semaphore | _lock |
Static Public Attributes | |
static const unsigned | BASE = 0xcf8 |
Additional Inherited Members | |
Static Public Member Functions inherited from StaticReceiver< PciConfigAccess > | |
static bool | receive_static (Device *o, M &msg) |
Provide HW PCI config space access by bridging PCI cfg read/write messages to the HW IO busses.
State: stable Documentation: pci3 spec
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inline |
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inline |
DBus<MessageHwIOIn>& PciConfigAccess::_hwioin |
DBus<MessageHwIOOut>& PciConfigAccess::_hwioout |
Semaphore PciConfigAccess::_lock |
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static |