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vbus_pci
1// vi:set ft=cpp: -*- Mode: C++ -*-
2/*
3 * (c) 2014 Sarah Hoffmann <sarah.hoffmann@kernkonzept.com>
4 *
5 * License: see LICENSE.spdx (in this directory or the directories above)
6 */
7
8#pragma once
9
10#include <l4/vbus/vbus>
11#include <l4/vbus/vbus_pci.h>
12
19namespace L4vbus {
20
25class Pci_host_bridge : public Device
26{
27public:
40 l4_uint32_t *value, l4_uint32_t width) const
41 {
42 return l4vbus_pci_cfg_read(bus_cap().cap(), _dev, bus,
43 devfn, reg, value, width);
44 }
45
46
59 l4_uint32_t value, l4_uint32_t width) const
60 {
61 return l4vbus_pci_cfg_write(bus_cap().cap(), _dev, bus,
62 devfn, reg, value, width);
63 }
64
65
79 int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin,
80 unsigned char *trigger, unsigned char *polarity) const
81 {
82 return l4vbus_pci_irq_enable(bus_cap().cap(), _dev, bus,
83 devfn, pin, trigger, polarity);
84 }
85
86};
87
88
93class Pci_dev : public Device
94{
95public:
106 l4_uint32_t width) const
107 {
108 return l4vbus_pcidev_cfg_read(bus_cap().cap(), _dev, reg, value, width);
109 }
110
111
122 l4_uint32_t width) const
123 {
124 return l4vbus_pcidev_cfg_write(bus_cap().cap(), _dev, reg, value, width);
125 }
126
127
137 int irq_enable(unsigned char *trigger, unsigned char *polarity) const
138 {
139 return l4vbus_pcidev_irq_enable(bus_cap().cap(), _dev, trigger, polarity);
140 }
141
142};
143
144}
Device on a L4vbus::Vbus.
Definition vbus:84
L4::Cap< Vbus > bus_cap() const
Access the Vbus capability of the underlying virtual bus.
Definition vbus:107
l4vbus_device_handle_t _dev
The device handle for this device.
Definition vbus:247
A PCI device.
Definition vbus_pci:94
int cfg_write(l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const
Write to the device's vPCI configuration space.
Definition vbus_pci:121
int cfg_read(l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const
Read from the device's vPCI configuration space.
Definition vbus_pci:105
int irq_enable(unsigned char *trigger, unsigned char *polarity) const
Enable the device's PCI interrupt.
Definition vbus_pci:137
A Pci host bridge.
Definition vbus_pci:26
int cfg_read(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const
Read from the vPCI configuration space using the PCI root bridge.
Definition vbus_pci:39
int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity) const
Enable PCI interrupt for a specific device using the PCI root bridge.
Definition vbus_pci:79
int cfg_write(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const
Write to the vPCI configuration space using the PCI root bridge.
Definition vbus_pci:58
unsigned int l4_uint32_t
Unsigned 32bit value.
Definition l4int.h:29
int l4vbus_pci_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
Write to the vPCI configuration space using the PCI root bridge.
int l4vbus_pcidev_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, unsigned char *trigger, unsigned char *polarity)
Enable the device's PCI interrupt.
int l4vbus_pci_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
Read from the vPCI configuration space using the PCI root bridge.
int l4vbus_pci_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity)
Enable PCI interrupt for a specific device using the PCI root bridge.
int l4vbus_pcidev_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
Write to the device's vPCI configuration space.
int l4vbus_pcidev_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
Read from the device's vPCI configuration space.
C++ interface of the Vbus API.
Definition vbus:40