l4-hackers October 1999

l4-hackers@os.inf.tu-dresden.de

8 participants
19 discussions

Fiasco & oskit10
by Christian Stueble 21 Dec '99

21 Dec '99

Is it possible to compile fiasco based on oskit10? I think there are some files missing (flux/*/*)?? When compiling l4/pkg/oskit_support/lib/src/ I get an error message: --- ... Making rmgr_stubs.o {standard input}: Assembler messages: {standard input}: Error: Symbol 'rmgr_pager_id' can not be both weak and common --- If I remove '__attribute__ ((weak))' it works. Is this a bug? I use egcs-2.91.66. -Chris- -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- Christian Stueble....… [View More]

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Re: RMGR-Extension to control I/O access
by Michael Hohmuth 22 Oct '99

22 Oct '99

Christian Stueble <stueble(a)amaunet.cs.uni-dortmund.de> writes: > > That is exactly what io flex pages are designed for. Initially sigma0 > > has access to all io ports and can use io flex pages to grant port > > access to other task. If sigma0 grants access a subset of the io > > address space (adressses which are accessed by in/out instructions) > > the task gets an io permission bitmap. If sigma0 (or someone else) > > grants access to the whole io … [View More]

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Error msg: in space.cc
by Christian Stueble 22 Oct '99

22 Oct '99

Hi, if I boot Fiasco (Mar 31 1999) on my i486 machine, I get the following error message: ---- SIGMA0: Hello! i am 80000:40000, my pager is 0:0 RMGR: Hi there! RMGR: running on L4/Pentium space.cc:179: failed assertion 'size == PAGE_SIZE' ---- What does it mean? Does Fiasco only run on a Pentium machine? Chris -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- Christian Stueble............stueble(a)ls6.cs.uni-dortmund.de PubKey[BF7104F5].......fp=8678C5D3CAD9CD8C … [View More]

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Re: Question about IO-fpages
by Michael Hohmuth 22 Oct '99

22 Oct '99

Christian Stueble <stueble(a)amaunet.cs.uni-dortmund.de> writes: > I think Fiasco/L4 uses memory mapped I/O, not separated I/O? Memory-mapped I/O (that is, I/O via memory accesses in the virtual address space) and I/O via the separate 16-bit I/O address space (with in/out instructions; ``port I/O'') are completely separate from each other. It is not possible to map the port address space into the virtual memory, and that means it is not possible to replace port I/O with memory-… [View More]

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A few questions
by Geoff Humphreys 20 Oct '99

20 Oct '99

Hello. I have been writing my own microkernel using ideas from L4 and other kernels. I am curious as to whether or not there would be an appreciable performance increase if the L4 system calls were split up into multiple calls. For example, the IPC call is be used to send messages, recieve messages, and to do RPC. Wouldn't it be faster if each of those were separate system calls (since it would require less if-then logic and bit manipulation)? Is there any reason not to do this? In … [View More]

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Re: A few questions
by Jean Wolter 20 Oct '99

20 Oct '99

"Geoff Humphreys" <xsaber0(a)hotmail.com> writes: > > Hello. I have been writing my own microkernel using ideas from L4 and other > kernels. > > I am curious as to whether or not there would be an appreciable performance > increase if the L4 system calls were split up into multiple calls. For > example, the IPC call is be used to send messages, recieve messages, and to > do RPC. Wouldn't it be faster if each of those were separate system calls > (… [View More]

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Looking for L4 tutorials and documentation
by Geoff Humphreys 18 Oct '99

18 Oct '99

Hello. I am looking for L4 tutorials and documentation. I have the L4 reference manual for the 486/Pentium/Pentium pro, but I would like to find documentation with in-depth examples and benchmarks. Are such documents available, and if so, where? Thanks Geoff Humphreys ______________________________________________________ Get Your Private, Free Email at http://www.hotmail.com

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Re: RMGR-Extension to control I/O access
by Jean Wolter 17 Oct '99

17 Oct '99

Christian Stueble <stueble(a)amaunet.cs.uni-dortmund.de> writes: > > Hello, > > I don´t know very much about the i386-processor and Fiasco, therefore > I would like to know if the following RMGR/Fiasco extensions are possible. > > 1) As default, no task has I/O port access. (CPL > IOPL or I/O permission > bitmap pointer invalid) > > 2) A task asks via IPC the RMGR for I/O port access, e.g. port=0x80, length=4. > > 3) The RMGR checks, if … [View More]

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RMGR-Extension to control I/O access
by Christian Stueble 15 Oct '99

15 Oct '99

Hello, I donŽt know very much about the i386-processor and Fiasco, therefore I would like to know if the following RMGR/Fiasco extensions are possible. 1) As default, no task has I/O port access. (CPL > IOPL or I/O permission bitmap pointer invalid) 2) A task asks via IPC the RMGR for I/O port access, e.g. port=0x80, length=4. 3) The RMGR checks, if port access can be granted. If yes, the RMGR decreases the tasks CPL and/or changes the tasks I/O permission bitmap. ==> Task is … [View More]

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Re: Question about IO-fpages
by Jean Wolter 15 Oct '99

15 Oct '99

Christian Stueble <stueble(a)amaunet.cs.uni-dortmund.de> writes: > > It is said that always the complete IO space should be specified as > > receive fpage, why? > ? With flexpages you can map a page to an arbitrary address by specifying an according receive flex page. You are not allowed to do this with an IO-area. If someone grants you the right to access port X you can't change this to port Y by specifying a receive window in you IO address space. Therefore you have to … [View More]

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l4-hackers October 1999