l4-hackers November 2014

l4-hackers@os.inf.tu-dresden.de

13 participants
15 discussions

Graphical desktop, l4con, mag
by teclis High Elf 02 Jun '17

02 Jun '17

Guten Tag, I've got the Hello app runing with fiasco and l4re in qemu, how do I get the graphical UI and console running that I see on the screen shots page? Do I need to use l4con and mag? I don't see an entry with l4con in modules.list. danke * <http://german.about.com/library/media/Audio/gutentag.wav>*

6 15

libfs/ FUSE on L4Re
by Stark, Josef 31 May '17

31 May '17

Hello, yesterday I came across a very interesting paper titled "Porting FUSE to L4Re", accessible here: http://os.inf.tu-dresden.de/papers_ps/pester-beleg.pdf For porting FUSE, the author uses a library called "libfs" which provides filesystem request forwarding and processing, if I understood correctly. It reads as if libfs is already included in L4Re. However, I couldn't find neither FUSE nor libfs in the current L4Re snapshot. Are they by any chance publicly available somewhere else, or are both not to be published? Cheers, Josef

4 7

shared dataspace for l4re_kernel/ registering additional caps in ned
by Stark, Josef 12 Mar '15

12 Mar '15

Hello all, for a project, I want to be able to load (elf-)binaries not only from the filesystem, but also from the network (receive binary, then start it.) For this, I will write a L4 app (let's call it "manager" for now) which handles the network part and then tells ned to start the received binary via a special "filename". I already modified ned so that its LUA-interface is exposed to other apps via a capability. But here comes the first problem: Normally you specify the capability table of a task and an IPC channel in the lua-config file, which ned reads. Ned then prepares the channel and the caps table and starts the task, which then can register the capability. Otherwise, registering fails (the example would do a printf("Could not register my service, is there a 'calc_server' in the caps table?\n");) So... how do I specify which capabilities ned itself can have/register? Currently, I need to have a lua-config which tells ned to start another instance of ned with the required permission to register the capability. But is there any way to avoid having two ned instances and making the first (and only) instance able to register the cap? Second problem: I found out, that ned (also moe) doesn't start the desired app directly but instead starts the l4re binary (source located in src/l4/pkg/l4re_kernel), passing it the filename of the desired binary. l4re, once started, gets the dataspace of this file and then ultimately starts the app. For my purpose, I would modify l4re_kernel so that if it detects the special "filename" mentioned above, it does not read the file from the filesystem but loads the binary that the "manager" received over the network. To get the data from the manager to the l4re_kernel instance, I thought that a shared dataspace or a shared memory area l4shmc_area_t like in prdocons.c example would be suitable. However, again, both of these things normally require special parameters in the lua config file (as can be seen in the examples), but I have no clue how to do this to l4re_kernel since it is not loaded from such a file, but loaded implicitly each time a new task is started. (so I guess this makes it even harder than the problem with ned since ned is only started once.) Does anyone have ideas on how to solve these? If someone finds that I phrased this too opaque, please let me know. Best regards, Josef Stark

3 16

Re: Need help profiling with Valgrind
by Björn Döbel 12 Dec '14

12 Dec '14

Dear Reinier, Am 05.11.2014 um 23:22 schrieb Reinier Millo Sánchez: > Hello Aaron > I'm working in a project to develop an embedded operating system for > real time purposes using Fiasco.OC as microkernel. I have reviewed you > article "Capability Wrangling Made Easy: Debugging on a Microkernel with > Valgrind". I'm interested to do son profiling tests with Fiasco.OC and > Linux Kernel, using Valgrind. Do you have ported Valgrind to the > Fiasco.OC microkernel interface? Is the port available? please let us use the l4-hackers mailing list for further discussion. Indeed we ported Valgrind to Fiasco.OC and L4Re. Its source code is available in the L4Re SVN in l4/pkg/valgrind. As you might have noticed, our paper was in 2010 and if I remember correctly, the Valgrind version in the repository was last updated around 2011. It might still work, but you may also encounter problems. Feel free to try this out and let us know about any questions you have. Apart from that there may be other ways of achieving your profiling needs on top of Fiasco.OC. What exactly would you want to do? Kind regards, Bjoern

4 30

Server loop does not call dispatch only when running in pthread
by Tobias Sturm 24 Nov '14

24 Nov '14

Hi, I want to have the loop() method of a Registry_server instance inside a pthread. When the client sends messages, I get the IPC error 35 (could not figure out what that error code means). As soon as the loop() is invoked in my main thread, messages come through. Here is some pseudo code: start_thread() { //pack args int err = pthread_create(&my_thread, NULL, &thread_fn, &args); printf("pthread_create says %d", err); } thread_fn(args) { L4Re::Util::Registry_server<>* svr = args.server; server_obj* my_server = args.server_obj_instance; svr->registry()->register_obj(my_server, "foo"); svr->loop(); } class server_obj : public L4::Server_object { public: int dispatch( ... ); } server_obj::dispatch(...) { //never called } Thanks, Tobi

2 1

Run and debug Fiasco.OC kernel and L4Re using a DSTREAM JTAG device and the ARM DS-5 IDE
by Mahdi Aichouch 21 Nov '14

21 Nov '14

Hello to everyone, I have a Freescale i.MX 6 ARM Cortex A9 Sabre SD board. I would like to test the Hello World example using the generated bootstrap.elf binary. I compiled the fiasco kernel and the l4re framework for the i.MX 6 ARM Cortex-A9 using the menu configuration in both cases. Instead of using an SD card to run the binary on the board, I would like to flash the RAM with the binary using the DSTREAM JTAG device and the ARM DS-5 IDE. I connected the board to my host using the mini-usb to serial cable, and I used minicom tool as a serial terminal. I tried to run the binary using the DS-5 debugger while the board is connected through JTAG, but I didn't see any debug message on the serial terminal. The source code I am using is from the "l4re-snapshot-2014092821". My questions: 1) Does anyone tried to run and debug fiasco kernel + l4re on a board using a JTAG device? What are the steps that I am missing? 2) The debug tool print a message saying that "WARNING(IMG53): bootstrap.elf has no source level debug information", what are the options required to include these information compiling the fiasco kernel + l4re? Thank you very much in advance. Best regards, Mehdi PS: screenshot of the IDE debugger view

4 10

SMP
by teclis High Elf 11 Nov '14

11 Nov '14

How does the fiasco L4Re do SMP? Are there commands for CPU affinity? How can I assign a specific process to a CPU? thanks,

2 1

Second UART and console
by teclis High Elf 10 Nov '14

10 Nov '14

Hi, I have a board with two UARTs on it and I need a second independent console connected to the other UART ( I have multiple virtual machines and I want to give each their own console). What would be the best approach for this? I see the UART drivers are linked into bootstrap. Does the same driver from bootstrap remain resident in memory and become part of the address space of con once its starts? Would I need to spawn a separate instance of con or could it be modified to support multiple consoles? thanks

2 1

memory layout
by Tobias Woelfel 08 Nov '14

08 Nov '14

Hello everybody, I am still working on the port for openrisc and have now some questions concerning the memory layout. (kern/xxx/mem_layout-xxx.cpp) What parts are necessary, and what do they mean? For example in the arm architecture there is Map_x, Caps_x, Kernel_x, Pmem_x... Are there any restrictions on how big/small one area has to be? What is the phys_to_pmem function supposed to do? (what does pmem stand for?) Thanks Tobias

2 1

How to monitor thread scheduling and the criticality of tasks?
by Karl Steger 05 Nov '14

05 Nov '14

Hi L4 hackers, How can you monitor how threads are scheduled for execution in L4Re? The trace buffer does not seem to offer information about the criticality of tasks. The l4re-snapshot-2014092821, however, refers to a monitoring framework named "ferret" in /obj/l4linux/ux/source/arch/l4/Kconfig but does not provide its source code. Is ferret publicly available? Do you know of any alternatives? Thanks and regards, Karl

2 1

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l4-hackers November 2014