l4-hackers December 2017

l4-hackers@os.inf.tu-dresden.de

7 participants
5 discussions

MIPS Creator CI20 patches (again)
by Paul Boddie 06 Feb '18

06 Feb '18

Hello, I recently looked at the collection of patches accumulated when trying to get the CI20 support to a functioning state, and I think I've brought them up to date with the latest upstream repository version (r75). In doing so, I've also tried to break them up into distinct parcels of functionality so that the less interesting or less relevant patches can be ignored. A page describing the patches can be found here: http://www.boddie.org.uk/paul/L4Re-Fiasco.OC.html None of these patches have changed since previous discussions on this topic. The rdhwr instruction support I needed to add, for instance, is still done in MIPS assembly language, fitting in with existing support for another variant of that instruction. Anyway, I thought it might be useful to put them somewhere with a description for future reference. I've yet to get round to looking seriously at L4Re on the CI20 again and it isn't likely to happen now before the end of the year. Paul

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L4/Fiasco kernel debugger (jdb) and step over command
by Valery V. Sedletski 22 Jan '18

22 Jan '18

Hi. I'm trying to debug my program with jdb. (I'm using the old L4/Fiasco / L4Env, not the current Fiasco.OC / L4Re). I enabled the permanent single step mode (with the S+ command) and a permanent show the Thread Control Block (with the t+ command) option. So, I was able to single-step with "g" command. Also, I found "jr" (go until return (ret or iret) is encountered) and "jb" (go until the next branch instruction, like jmp/call/int) commands, but they don't seem to work. When I enter them, I see only a single step to the next instruction. Are these two commands broken? How do I step over a "call"/"int" instruction? Thanks in advance, valery

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Fiasco.OC port on Jailhouse
by Muneeswaran Rajendran 19 Dec '17

19 Dec '17

Hi, I trying to understand the porting of fiasco.OC kernel into jailhouse but not able locate the source code of jailhouse porting code for fiasco.OC kernel. Please share the same. I refer this below document to get 'jailhouse/configs/fiasco-demo.c' this file. But i do not find it. https://rtime.felk.cvut.cz/~sojka/students/F3-BP-2016-Baryshnikov-Maxim-bar… Please help me out to find out. Regards, Munees

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exception while running L4linux on raspberry pi 2
by vmc doe 18 Dec '17

18 Dec '17

Hi Adam/l4-hackers, I tried to build l4+l4Re+l4linux for raspberry pi 2. The build was successful, but when I tried to run this in qemu I am getting the following error. Could you pls help me to fix this error? I am new to L4 and L4Re and would like to try out some virtualization options with L4 Microkernel. Could you pls suggest some initial modules or portions where I can start with. Regards vmc L4 Bootstrapper Build: #3 Mon Dec 11 15:24:01 IST 2017, 4.8.3 20140303 (prerelease) Scanning up to 512 MB RAM, starting at offset 32MB Memory size is 512MB (00000000 - 1fffffff) RAM: 0000000000000000 - 000000001fffffff: 524288kB Total RAM: 512MB Scanning fiasco Scanning sigma0 Scanning moe Moving up to 8 modules behind 1100000 moving module 02 { 1823000-18544df } -> { 1914000-19454df } [201952] moving module 01 { 1811000-1822373 } -> { 1902000-1913373 } [70516] moving module 00 { 1786000-1810e23 } -> { 1877000-1901e23 } [568868] moving module 07 { 1486000-1785fff } -> { 1577000-1876fff } [3145728] moving module 06 { 108c000-148547f } -> { 117d000-157647f } [4166784] moving module 05 { 102a000-108b717 } -> { 111b000-117c717 } [399128] moving module 04 { 1010000-10294a3 } -> { 1101000-111a4a3 } [103588] moving module 03 { 100f000-100f12d } -> { 1100000-110012d } [302] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page (via ELF) at 2000 Regions of list 'regions' [ 1000, 1a3f] { a40} Kern fiasco [ 2000, 9afff] { 99000} Kern fiasco [ 9b000, 9b137] { 138} Root mbi_rt [ e0000, e9ec3] { 9ec4} Sigma0 sigma0 [ f0000, f6177] { 6178} Sigma0 sigma0 [ 140000, 169e37] { 29e38} Root moe [ 170000, 18242b] { 1242c} Root moe [ 1000000, 100e573] { e574} Boot bootstrap [ 1100000, 1876fff] { 777000} Root Module found kernel options (via ELF) at 3000 Sigma0 config ip:000e0100 sp:00000000 Roottask config ip:00140250 sp:00000000 Starting kernel fiasco at 0000120c Hello from Startup::stage2 ARM generic timer: freq=62500000 interval=62500 cnt=5558234 SERIAL ESC: allocated IRQ 57 for serial uart Not using serial hack in slow timer handler. Welcome to L4/Fiasco.OC! L4/Fiasco.OC microkernel on arm Rev: unknown compiled with gcc 4.8.3 20140303 (prerelease) for Broadcom 2836 [] Build: #2 Mon Dec 11 14:06:49 IST 2017 Calibrating timer loop... done. MDB: use page size: 20 MDB: use page size: 12 SIGMA0: Hello! KIP @ 2000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:0;fff] [4:9b000;9bfff] [0:9c000;dffff] [0:ea000;effff] [0:f7000;13ffff] [4:140000;169fff] [0:16a000;16ffff] [4:170000;182fff] [0:183000;10fffff] [4:1100000;1876fff] [0:1877000;1effffff] IOMEM:---------------------- [0:20000000;ffffffff] MOE: Hello world MOE: found 499336 KByte free memory MOE: found RAM from 9b000 to 1f000000 MOE: allocated 495 KByte for the page array @0x183000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:103000] MOE: rwfs name space cap -> [C:105000] BOOTFS: [1100000-110012e] [C:107000] l4lx.cfg BOOTFS: [1101000-111a4a4] [C:109000] l4re BOOTFS: [111b000-117c718] [C:10b000] ned BOOTFS: [117d000-1576480] [C:10d000] vmlinuz BOOTFS: [1577000-1877000] [C:10f000] ramdisk-arm.rd MOE: cmdline: moe rom/l4lx.cfg MOE: Starting: rom/ned rom/l4lx.cfg MOE: loading 'rom/ned' Ned says: Hi World! L4Re: unhandled exception: pc=0x1029198 (pfa=205a48) L4Re: Global::l4re_aux->ldr_flags=0

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Trying l4re-snapshot-17.10 on a Wanboard(iMX6Q) hangs at Starting kernel ...
by Sathish Kumar Balasubramaniam -ERS, HCL Tech 18 Dec '17

18 Dec '17

Build machine is Debian 8.10 (jessie) 64-Bit GCC toolchain is gcc-linaro-4.9.4-2017.01-x86_64_arm-linux-gnueabihf I tried to build the l4re-snapshot-17.10 for Freescale iMX6 and the build completed. When i loaded the bootstrap.uimage (both hello and L4Linux-basic) boots till the following U-Boot 2016.11+fslc+gc44711d (Nov 15 2017 - 16:14:11 +0530) CPU: Freescale i.MX6Q rev1.2 at 792 MHz Reset cause: POR Board: Wandboard rev C1 I2C: ready DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment auto-detected panel HDMI Display: HDMI (1024x768) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 => ext4load mmc 0 ${loadaddr} /boot/bootstrap.uimage 8790080 bytes read in 628 ms (13.3 MiB/s) => bootm ${loadaddr} ## Booting kernel from Legacy Image at 12000000 ... Image Name: L4 Image #2 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 8790016 Bytes = 8.4 MiB Load Address: 11000000 Entry Point: 11000000 Verifying Checksum ... OK Loading Kernel Image ... OK Starting kernel ... I have a JTAG BDI-3000 with Cortex-A9 license. Any ideas how to debug the issue ??? ::DISCLAIMER:: ---------------------------------------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. ---------------------------------------------------------------------------------------------------------------------------------------------------- ::DISCLAIMER:: ---------------------------------------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. ----------------------------------------------------------------------------------------------------------------------------------------------------

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l4-hackers December 2017