Guten Tag,
I've got the Hello app runing with fiasco and l4re in qemu, how do I get
the graphical UI and console running that I see on the screen shots page?
Do I need to use l4con and mag? I don't see an entry with l4con in
modules.list.
danke
* <http://german.about.com/library/media/Audio/gutentag.wav>*
Hello,
yesterday I came across a very interesting paper titled "Porting FUSE to L4Re", accessible here: http://os.inf.tu-dresden.de/papers_ps/pester-beleg.pdf
For porting FUSE, the author uses a library called "libfs" which provides filesystem request forwarding and processing, if I understood correctly. It reads as if libfs is already included in L4Re.
However, I couldn't find neither FUSE nor libfs in the current L4Re snapshot. Are they by any chance publicly available somewhere else, or are …
[View More]both not to be published?
Cheers,
Josef
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Hello hackers,
I'm trying to run Fiasco.OC in secure world and Linux in non-secure
world on i.MX6Q. For this I'm using the TrustZone example
(pkg/examples/sys/vm-tz). To secure world I have given 128MB RAM
starting from 0x10000000 and I modified the example to give NS world
256MB starting from 0x20000000. I've replaced atags with dtb of my board
and it is copied to NS side like kernel and initrd.
At first I encountered runtime exception, which I fixed by implementing
following to …
[View More]arm_em_tz builds
Thread::arch_ext_vcpu_enabled() { return true; }
Now I'm having problems at early stages of NS boot, where Linux kernel
is checking for the dtb magic. The code loads the dtb magic from the
address I'm giving in r2 register (0x21000000), but the magic value
usually have one byte or all of them incorrect.
I've used JDB to dump the area of dtb after hitting that error and it
shows the dtb magic properly. So for some reason the NS-world gets
mangled value. Any idea what might be causing this?
Thanks,
Markku
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Hi Adam and L4 community
I've been testing somethings on the Odroid-X2(Exynos4412). It seems that
the IRQ handler only handles the first IRQ and disables the IRQs. I have
added the following code to check the IRQs in the function
Kernel_thread::bootstrap() in the file
src/kernel/fiasco/src/kern/kernel_thread.cpp
Per_cpu_data::run_late_ctors(Cpu::invalid());
bootstrap_arch();
Timer_tick::enable(current_cpu());
Proc::sti();
++ Proc::Status st = Proc::interrupts();
+…
[View More]+ if(st & Proc::Status_interrupts_disabled)
++ printf("IRQs are enabled\n");
++ else
++ printf("IRQs are disabled\n");
Watchdog::enable();
I'm trying to check that the IRQs are enabled. The Proc::sti() must
activate the IRQs in the CPSR registers, and Proc::interrupts() must
return if the interrupts are enabled, but always i'm getting "IRQs are
disabled". I have tested the hardware with a Linux kernel and it's
working fine. I have tested "CPSIE i" and "CPSIE f" to enable the
interrupts and get the same result.
I have incremented the warn level on Fiasco.OC, i'm getting:
KERNEL: Warning Buddy:alloc Size mismatch: a80 v 1000
I have also tested the local timers on the Exynos4412. The local timer
at CPU0 is working fine. It has been configured to auto-reload with
12000 as interval. The local counter decrements the value and reload
when arrives zero, but don't raises the interrupt.
To test the interrupts have created an small buffer to store the
Kip::k()->clock on every interrupt. I have used the buffer to avoid the
call of an interrupt inside another interrupt. I have tried to print the
values on the function Delay::mesaure(), but it only stores one value.
The same thing happens if I use a interrupt counter.
Now i'm trying to check the IRQ handler caller, from the general
mechanism to the specific interrupt handler, to catch the point where
the IRQs are been disabled.
Anyone have any suggestions?
Best regards
--
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
Carretera a Camajuaní Km 5 1/2
Santa Clara, Villa Clara, Cuba
CP 54830
"antes de discutir ... respira;
antes de hablar ... escucha;
antes de escribir ... piensa;
antes de herir ... siente;
antes de rendirte ... intenta;
antes de morir ... vive"
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Hello,
I have a Freescale i.MX 6 Sabre SD board.
It is equipped with one Ethernet RJ45 connector.
I need to add a second Ethernet RJ45 connector to the board.
The board has a micro-USB OTG port that allow to connect
a plugable USB OTG Micro-B to Ethernet adapter like for instance
this one: http://plugable.com/products/usb2-otge100
I would like to know if L4Linux might access such a second
Ethernet device connected through micro-USB.
Does anyone has tried this before.
Could someone points …
[View More]me to a tutorial or a guide that shows what
are the configurations steps that I should follow to build up a working
test case.
Thank you very much in advance.
Best regards,
Mahdi
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Hi everyone,
I'm a student at the university of Antwerp and I'm currently working on
my master's thesis. My project is about comparing the performance of
a few global multicore scheduling algorithms (G-RM, G-EDF, ...) on
an embedded system. A part of my thesis is to make an implementation
on a real embedded system equipped with a quadcore processor (i.MX6).
To do that I need an RTOS. Fiasco with the l4re at a first sight seems
an interesting candidate.
To test the performance of the …
[View More]above algorithms I will schedule a bunch
of randomly generated tasksets comprising some periodic tasks having
implicit deadlines* with each of the algorithms and try to detect if any
deadlines are missed.
* Such a task is executed repeatedly after a fixed amount of time and its
deadline is equal to its period, which is the point of time when the next
invocation of the task takes place.
This brings me to my first question:
Would this be achievable with the fiasco kernel?
I've been trying to interpret the project of the fiasco kernel during the
last days, but this seems easier said than done. As a first step I've been
trying to figure out how the scheduler works and how exactly the
scheduling policies are implemented. (I have read somewhere the
current scheduling policy is fixed priority round robin)
Is there perhaps a more documented version of the code or an
overview of the different classes, their functions and the way they
interact available? It's really hard to figure out a bunch of code
without any leads on how exactly the project has been implemented.
Besides that I don't really have a clue about how to start developing
on the fiasco kernel. Some tips about how to start working on the kernel
are always welcome.
Has anyone got experience with developing on the fiasco kernel?
It would be nice to get some directions on this matter because I'm
quite stuck on this.
Thanks in advance!
Kind regards,
Joeri
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Hi all,
I use entry L4Linux-mag-x86 in modules.list to start a L4Linux on L4Re successfully. The codes is l4re-snapshot-2014092821.
L4Linux use x86-native_deconfig complie, use l4lx-gfx.cfg to start L4Linux. This config is just set one cpu for L4Linux.
If I set l4x_cpus=2 in l4lx-gfx.cfg, use x86-mp_vPCI_defconfig and set CONFIG_NR_CPUS=2 to compile the L4Linux,
when I start L4Linux, a kernel panic happened:
l4linux | Loading: rom/ramdisk-x86.rd
l4linux | INITRD: Size of RAMdisk is 3072KiB
…
[View More]l4linux | RAMdisk from 88d70000 to 89070000 [3072KiB]
l4linux | rtc not found
l4linux | l4lx_thread_create: Created thread 41f (timer0) (u:b3000a00, v:00000000, sp:008e1fa8)
l4linux | WARNING: Unknown wrmsr: 0000008b at 0x414bad
l4linux | WARNING: Unknown rdmsr: 00000186 at 0x85e1d6
l4linux | WARNING: Unknown rdmsr: 00000187 at 0x85e1d6
l4linux | WARNING: Unknown wrmsr: 000000c1 at 0x85e2a7
l4linux | Launching cpu1 on pcpu 1 at 0x4024e0
l4linux | l4lx_thread_create: Created thread 420 (cpu1) (u:b3000800, v:b3000600, sp:008c7fa8)
l4linux | WARNING: Unknown wrmsr: 0000008b at 0x414bad
l4linux | l4lx_thread_create: Created thread 424 (timer1) (u:b3000400, v:00000000, sp:008e3fa8)
l4linux | Spurious IPI on CPU0: 4
l4linux | panic: going to sleep forever, bye
Has anyone encountered this problem?
Stephen
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