Hello,
I have been busy writing libraries and programs for L4Re and recently had to
think about the size of the payloads I have been deploying. It appears that in
the build system, one can use MODE=shared to build dynamically-linked
programs, and there is a shared version of the hello example in the examples
package.
However, I don't see any recipe for doing this for other programs. My
impression is that the dynamic linker must have all the required libraries
deployed as modules, and so …
[View More]I wrote a script to generate a list of such
modules using readelf. In addition, it appears that libl4sys-direct.so is
required (which readelf does not detect).
Adding these modules to my conf/modules.list should yield success, but within
my constrained debugging environment, I only see that "shared" programs fail
to start. I really need to see if they start but then experience some
initialisation problem, or whether they actually crash but Mag keeps their
viewports around.
Are there any other things that I need to consider when building and deploying
such programs? I searched for guidance on this topic and only found the
following:
http://os.inf.tu-dresden.de/pipermail/l4-hackers/2014/007094.htmlhttp://os.inf.tu-dresden.de/pipermail/l4-hackers/2016/007830.html
Both of these discussion threads only provide some details and are obviously
not tutorials.
Thanks for any clues you might be able to provide!
Paul
P.S. I guess I could also see if the CI20 produces useful console-level
details, perhaps indicating an architecture-related problem. Usually, however,
the problem is caused by some simple mistake I have made, so I suspect that
there is merely some detail I have forgotten.
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Hi,
I’ve been trying to find or write a webserver directly on L4Re (*NO* L4Linux involved) based on snapshot “l4re-snapshot-17.12”.
At first, I noticed that there was already a web server in “l4re-snapshot-17.12/src/l4/pkg/ankh”.
But it was broken, even if I removed the “broken” file to make, nothing was generated under “/path/to/build/pkg/ankh” except “Makefile”.
Then I intend to write a simple webserver (1st step a socket demo). Although there are socket APIs, I don’t know how to solve the …
[View More]NIC driver issues.
The same code works well on Linux but failed on L4Re.
Therefore:
1. Is there any way to revive the “ankh”?
2. If not, is there any way/demo to write a simple webserver directly on L4Re? Or how to solve the NIC driver issues?
--
Thanks
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As promised, I wrote up my experiences porting L4Re and Fiasco.OC to the Ben
NanoNote:
https://blogs.fsfe.org/pboddie/?p=2147
There are, in fact, nine articles describing the process, which I accept might
be a bit too much reading for the casual inquirer, especially as the narrative
wanders from one problem to be solved to the next. But the summary should
cover the main tasks that need to be done in this kind of work.
Since getting things working on the Ben, I have also persuaded the …
[View More]software to
work on the Letux 400 notebook computer, which is a variant of the Skytone
Alpha-400 product that did the rounds almost ten years ago (although I was
probably completely unaware of it at that time):
http://blogs.fsfe.org/pboddie/?p=2175
I hope that some of the information I have shared is useful to others and
perhaps encourages someone else to port the software to a device of their
choosing. Good luck to that person!
Paul
P.S. As noted before, the patches are here:
http://www.boddie.org.uk/paul/L4Re-Fiasco.OC.html
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Hello again,
I have been implementing input drivers for the keypad/keyboard provided by the
Ben NanoNote and Letux 400 notebook computer, and although I appear to have
implemented something that works (tested using specialised example code),
using the existing OMAP3 keypad code as a guide (in pkg/drivers/input), I
wondered whether it is possible to connect such drivers to other components in
a convenient way.
I see that the input package is the thing that provides the device registry
…
[View More]that I use when employing the arm_input_register macro, and in that package is
a framework that supposedly exports input drivers as serial I/O devices using
the "l4drv" driver. But I can't find anything obvious that uses the connect
operation which would need to occur to probe, enable, and attach my driver to
this framework.
Is it possible to integrate my input drivers to things like Mag, which seems
to use input events, or to fbterminal or other things? I haven't seen any
documentation or code that demonstrates this, but I suppose that I may have
missed something somewhere.
Thanks for any help that is offered!
Paul
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<p>Hi,</p><p><br /></p>The previous test is not enough to cause error, this error is not related to peripherals, I have removed almost all peripheral drivers<br /><br />In the previous test, I added a delay operation before the vm2 start, so that vm1 completely up and then start vm2, this will greatly reduce the probability of the error. Now I removed this delay, vm1 and vm2 started simultaneously, then the error will occur frequently (about 1/…
[View More]10 probability). The error is generated when kernel processes vtimer interrupts. Under normal circumstances, after processing a vtimer interrupt, the vcpu thread will return to uvmm and then execute prepare_guest_entry(). This operation will eventually enter the kernel through the system call to set the state of vcpu thread, but when the error occurs, I find that the vcpu thread does not execute vcpu_resume, it processes two consecutive vtimer interrupts. As a result, the assertion fails. <br /><br />Is the kernel able to guarantee that the complete process of handling vgic and vtimer interrupts (including the process in uvmm) is not interrupted by a new interrupt? <br /><br />Here's my configuration:<br />-------------------------------------------------------------------------<br />uvmm.ned<br /><br />vmm.start_vm{<br /> id=1,<br /> mem=256,<br /> vbus=io_busses.vm_hw,<br /> bootargs=common_bootargs .. " ramdisk_size=9100 root=/dev/ram",<br /> kernel="rom/Image.gz",<br /> rd="rom/ramdisk-arm.rd",<br /> fdt="rom/virt-board.dtb",<br /> prio=nil, cpus=0x1<br />};<br /><br />vmm.start_vm{<br /> id=2,<br /> mem=256,<br /> vbus=io_busses.vm_nohw,<br /> bootargs=common_bootargs .. " ramdisk_size=9100 root=/dev/ram",<br /> kernel="rom/Image.gz",<br /> rd="rom/ramdisk-arm.rd",<br /> fdt="rom/virt-board.dtb",<br /> prio=nil, cpus=0x1<br />};<br />--------------------------------------------------------------------------<br />io.cfg<br /><br />-- vi:ft=lua<br /><br />local Res = Io.Res<br />local Hw = Io.Hw<br /><br />local add_children = Io.Dt.add_children<br /><br />add_children(Io.system_bus(), function()<br /> VGIC = Hw.Device(function()<br /> Property.hid = "arm-gicc";<br /> Resource.reg0 = Res.mmio(0x12006000, 0x12007fff);<br /> Property.flags = Io.Hw_device_DF_multi_vbus;<br /> end)<br /><br /> VM1_DEV = Hw.Device(function()<br /> Property.hid = "vm1_dev";<br /> Resource.reg0 = Res.mmio(0x70100000, 0x70100FFF); --UART<br /> end)<br /><br /> VM2_DEV = Hw.Device(function()<br /> Property.hid = "vm2_dev";<br /> Resource.reg0 = Res.mmio(0x70100000, 0x70100FFF); --UART<br /> end)<br />end)<br />----------------------------------------------------------------------------<br />vm_hw.vbus<br /><br />Io.add_vbusses<br />{<br /> vm_hw = Io.Vi.System_bus(function()<br /> VGIC = wrap(Io.system_bus():match("arm-gicc"));<br /> VM1_DEV = wrap(Io.system_bus():match("vm1_dev"));<br /> end);<br />}<br />----------------------------------------------------------------------------<br />vm_nohw.vbus<br /><br />Io.add_vbusses<br />{<br /> vm_nohw = Io.Vi.System_bus(function()<br /> VGIC = wrap(Io.system_bus():match("arm-gicc"));<br /> VM2_DEV = wrap(Io.system_bus():match("vm2_dev"));<br /> end);<br /><p>}</p><p>----------------------------------------------------------------------------</p><p><br /></p><p>Nico<br /><br /></p><span labeltype="reply">于 2018-04-11 05:59:58,Adam Lackorzynski<adam os="" inf="" tu-dresden="" de="">写道:</adam></span><blockquote style="padding-left:1ex;margin:0px 0px 0px 0.8ex;border-left:#ccc 1px solid"><pre>On Mon Apr 09, 2018 at 22:26:38 +0800, nico wrote:
> Sorry, the last email did not specify this information.
> I gave VM1 all the hardware resources, and it used eight cores. VM2 only has
> uart resources (also timer, gic resources), using a single core. I tried to
> give both VM1 and VM2 only the necessary hardware resources( uart, timer, gic),
> and that error won't happen.
Ok, that's interesting. So that means that some of the passed through
hardware is causing this. Would you be able to find out which device is
causing this, by selectively enabling/disabling devices?
Adam
> On 4/9/2018 06:28ï¼ Adam Lackorzynski<adam os="" inf="" tu-dresden="" de=""> wroteï¼
>
> Hi Nico,
>
> On Fri Mar 30, 2018 at 10:15:33 +0800, nico wrote:
>
> Hi Adam, I'm using an eight-core Cortex-A53 processor. The vm is
> running 64bit Linux. It is recommended to start two or three vms, that
> will be easier to reproduce this problem.
>
>
> So, I tried several things but cannot reproduce this issue. I assume
> this are single-core VMs only? Any hardware passed through?
> Just trying to narrow it down...
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