On Wed May 29, 2013 at 14:52:26 +0300, joel@nider.org wrote:
I have been reading about the structure of L4Ka::Pistachio, and discovered that they use idempotent (1:1) page table mapping in their sigma0 process. I am wondering if Fiasco also takes this approach?
Sigma0 uses 1:1 virt-phys mappings.
If so, does the kernel also use idempotent mapping?
The kernel is linked to the upper 1G of the address space, so no.
I would imagine that this would have some implications on demand paging in the kernel. Does the kernel even use demand paging? (I
No, it does not.
mean at some point during boot the kernel will start to use memory to store kernel objects - either the kernel 'guesses' how much it will ever need and statically allocates that memory, or it's going to have to ask for pages later on, which will be owned by some other process).
I tried to read the code, but found it very hard to traverse - the C++ classes don't make it easy to follow a flow. Can you please point out the file(s) where the kernel sets up the memory space for sigma0, and where it passes the initial ownership (from kernel space to sigma0 space)?
Setup happens in kernel_thread-std.cpp, the actual mappings are generated in function handle_sigma0_page_fault() which creates identity mappings.
Adam