Edmundo,
I think I now understand the source of your confusion. In the Intel version of the L4 manual (at least in my copy of Sep 96), on p25 where the "rcv descriptor" is explained, the option "mem" has the top 30 bits of the descriptor word as "*snd msg/4". That should, of course, read "*rcv msg/4".
Also, further to what I wrote in my previous mail:
GH> - one or more page mappings or grants, provided that GH> - the "m" bit is set in the send descriptor, and GH> - the beginning of the sender's direct string (starting with the GH> register part) contains at least one valid "send fpage", and GH> - the receive descriptor either has the form of a valid "receive GH> fpage", or points to a "message" struct containing a valid "receive GH> fpage", and GH> - there is no error
The second last bullet should read:
- the receive descriptor either has the form of a valid "receive fpage" and the "m" bit is set, or points to a "message" struct containing a valid "receive fpage", and
Gernot -- Gernot Heiser ,--_|\ School of Computer Sci. & Engin. Phone: +61 2 9385 5156 / \ The University of NSW Fax: +61 2 9385 5995 _,--._* Sydney, Australia 2052 E-mail: G.Heiser@unsw.edu.au v http://www.cse.unsw.edu.au/~gernot PGP fingerprint: 94 1E B8 28 25 FD 7C 94 20 10 92 E5 0B FF 39 8F
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