I am planning to interfacing the PCI bus using L4, however, I do not quite know how PCI interface works. I know that there is three memory region: configuration space, I/O space and Memory space, and that configuration space is use to detect and configure the device, but I do not know where any of this space are located and the protocol for interfacing them. Please help.
On Tue Jan 25, 2011 at 13:26:52 +0000, Jason Philip wrote:
I am planning to interfacing the PCI bus using L4, however, I do not quite know how PCI interface works. I know that there is three memory region: configuration space, I/O space and Memory space, and that configuration space is use to detect and configure the device, but I do not know where any of this space are located and the protocol for interfacing them. Please help.
There are several sites out there describing this: http://wiki.osdev.org/PCI http://en.wikipedia.org/wiki/Conventional_PCI and so on
Adam
l4-hackers@os.inf.tu-dresden.de