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Question regarding the "Jdb::handle_user_request()' function
by Christian Prochaska 11 May '13

11 May '13

Hello, the 'Jdb::enter_jdb()' function in file 'jdb.cpp' contains the following code: // check for int $3 user debugging interface if (foreach_cpu(&handle_user_request, true)) { close_debug_console(cpu); leave_trap_handler(cpu); return 0; } I'm not sure why in this case the second argument of 'foreach_cpu()' is true. I understand that it causes the result to be true only if the 'handle_user_request()' function returned true for every currently running CPU. But I found that this can be a problem when using the '-jdb_cmd=JS' kernel argument: if only one CPU is currently running, the result of 'foreach_cpu()' is true, but when two CPUs are currently running, the 'handle_user_request()' function returns true only for one CPU, which makes the end result false and causes the kernel to stop with the JDB prompt shown. Can somebody please explain? Christian

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fiasco r52 on beagleboard xm
by Sin-ta Hsiea 11 May '13

11 May '13

Hi, I've tried running r47 fiasco kernel on beagleboard xm platform, it was fine, but after upgrading sources to r52, it broke. Output message hang after this line. Hello from Startup::stage2 After debugged using JTAG, I found that after page table modified, MMU still can't translate that address. So I add this line to source: --- src/kern/arm/paging-arm.cpp (revision 52) +++ src/kern/arm/paging-arm.cpp (working copy) @@ -348,6 +348,7 @@ void Pte_ptr::write_back_if(bool, Mword asid = Mem_unit::Asid_invalid) { + Mem_unit::clean_dcache(pte); if (asid != Mem_unit::Asid_invalid) Mem_unit::tlb_flush(asid); } Then output message hang after this line: Calibrating timer loop... done. It seems that MMU doesn't notice page table was switched to sigma0's pagetable. I also tried pandaboard, it just works fine. Does anybody have idea how to fix this? Best regard, SIn-ta Hsiea

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Fiasco.OC with ARM TrustZone
by Chao-Jui Chang 11 May '13

11 May '13

Hi hackers, Is trustzone working on exynos 4412 platform? I have selected the follow item in Fiasco config menu: * Platform Timer (Multi-core timer) * Use ExtGic * Execution Model (TrustZone normal side) But it stop at early stage. Same result for Execution Model (Standard mode). but no message for Execution Model (TrustZone secure side). If the trustzone is disabled in u-boot, the 'Standard mode' works fine. ----- booting log ----- OK U-Boot 2010.12-00000-g8d816e8-dirty (May 06 2013 - 19:38:10) for Exynox4412 CPU: S5PC220 [Samsung SOC on SMP Platform Base on ARM CortexA9] APLL = 1000MHz, MPLL = 880MHz DRAM: 1023 MiB PMIC VERSION : 0x00, CHIP REV : 3 TrustZone Enabled BSP BL1 version: 20121128 Checking Boot Mode ... SDMMC MMC Device 0: 30959 MB MMC Device 1 not found ModeKey Check... run normal_boot Net: No ethernet found. Hit any key to stop autoboot: 0 Exynos4412 # run fiasco Partition2: Start Address(0x2000), Size(0x1a000) reading bootstrap.raw 835584 bytes read Boot with zImage Starting kernel ... Hello from Startup::stage2 Per_cpu_data_alloc: (orig: 0xf0044588-0xf0044f60) Number of IRQs available at this GIC: 160 ------ end of booting log ----- Best regards, Chao-Jui

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How to start new program in interactive way
by Chao-Jui Chang 02 May '13

02 May '13

Hi hacker, Is there any other way to start a new l4 program or l4linux? Currently, I can only start program by writing lua script. Can I start new program like in a shell environment? For example: $ ls -> run ls program $ df -> run df program If no shell like environment, is there any example by using L4Re API? Thanks, Chao-Jui

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Re: How to start 2 or more VMs
by Chao-Jui Chang 29 Apr '13

29 Apr '13

Hi Ganis Zulfa, You need to setup one ethX for each l4linux. When you start 2 L4Linuxes, you will only see one ethX in current console, because you are connected to the second L4Linux not the first one. It is normal to see only one ethX. One way to setup the ip of first L4Linux is to write the init config in /etc/init.d/rcS. In this case, you need 2 ramdisk for each L4Linux. Here is my config for first L4Linux: # cat /etc/init.d/rcS > #! /bin/sh > mount -t proc proc /proc > mount -t devtmpfs devtmpfs /dev > mkdir /dev/pts > mount -t devpts devpts /dev/pts > ifconfig lo up > ifconfig eth0 192.168.50.1 > telnetd -l /bin/sh > exit 0 For second L4Linux, just change the ip to 192.168.50.2 After 2 L4Linuxes start, you will be in second L4Linux(192.168.50.2) then, you can telnet 192.168.50.1 to go to another L4Linux. Cheers, Chao-Jui 2013/4/16 Ganis Zulfa Santoso <ganiszulfa(a)gmail.com> > Hi Chao-Jui, have u figured out a way to do what Adam said? > > I followed the instructions from http://wiki.tudos.org/L4Linux/shmnet, > but I have problems: > > A. i ran two l4linux arms but i only found one ethX > > B. how do i set up the ip of another l4linux arm? > > thanks. > > > Best regards, > > > Ganis Zulfa Santoso > > > On Mon, Apr 8, 2013 at 7:03 AM, Adam Lackorzynski < > adam(a)os.inf.tu-dresden.de> wrote: > >> Hi, >> >> On Fri Apr 05, 2013 at 13:29:37 +0800, Chao-Jui Chang wrote: >> > Is it possible to multiplex multiple text-based console? >> > I want to try to start multiple VMs on ARM board which only provides >> serial >> > console. >> >> You can connect two L4Linuxes using a l4shmnet-based local network >> connection, so you can go from one to the other via e.g. telnet or ssh. >> >> >> Adam >> -- >> Adam adam(a)os.inf.tu-dresden.de >> Lackorzynski http://os.inf.tu-dresden.de/~adam/ >> >> _______________________________________________ >> l4-hackers mailing list >> l4-hackers(a)os.inf.tu-dresden.de >> http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers >> > >

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does the driver directly operate the device?
by gaober 27 Apr '13

27 Apr '13

hi! drivers in linux are in kernel mode.but in a microkernel-based system,drivers are like apps,do they operate the device directly?or the microkernel will do something to operate device.

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l4linux and sysenter
by Ryan Brown 24 Apr '13

24 Apr '13

Thanks for the ptrace fix, that really helped with debugging. We were seeing programs crash at the first system call when using some versions of glibc, but not others. It seems the difference is that the working glibc's are compiled without vdso support. When glibc tries to use the vdso for system calls, it crashes at the sysenter instruction. If we start l4linux with vdso32=0, the program is able to run. Is sysenter expected to work under l4linux? It looks like it requires using msr's, so perhaps l4linux isn't able to setup sysenter? Should it be installing the int80 vdso function instead? While investigating the vdso stuff to I also became curious. How difficult would it be to set up an l4 specific vdso? I assume just using l4 ipc directly would be more efficient than using int80? Thanks, Ryan Brown

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How to start 2 or more VMs
by Chao-Jui Chang 18 Apr '13

18 Apr '13

Hi hackers, Is there any document that describes how to start 2 or more VMs on Fiasco.OC ? Is it possible to switch consoles between VMs ? Could you point out the direction to me? Thanks, Chao-Jui

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Question about L4/Fiasco
by Samir Boulhram 17 Apr '13

17 Apr '13

Hello, I'm trying to change the scheduler of the L4/Fiasco. I'm aim is to make an RM scheduler policy for schedule 3 VMs. My problem is that I don't have any idea of where I have to start my work. Can you help me please ? -- Kind regards, Samir B.

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l4re compilation order
by gaober 16 Apr '13

16 Apr '13

hi! i have some doubt about the buliding of l4re.who decides the order of the l4re pkg complie?if i want to make pkg drivers earliear than pkg input,hao can i do? does the /pkg/XXX/Control mean anything? and in the obj directory, there are .pc files like libdrivers-input.pc etc.what do they work? Wilbert Gao

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Ring 0 task
by Daniel Waddington - SISA 15 Apr '13

15 Apr '13

Hi, How do you create ring 0 tasks with Fiasco.OC? (I want them to execute rdmsr/wrmsr) Thanks Daniel

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ptrace
by Ryan Brown 15 Apr '13

15 Apr '13

Are there issues using ptrace under l4linux? I'm trying to debug a process using gdbserver, but when I use stepi (PTRACE_SINGLESTEP) it seems to run until the next system call. Has anyone else seen this? Is there some way to use the fiasco debugger to debug an l4linux process?

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RCU performance
by Christian Prochaska 11 Apr '13

11 Apr '13

Hello, when building Fiasco.OC with multiprocessor support enabled, the unmapping of an IPC gate via 'l4_task_unmap()' appears to require at least 3 timer interrupts to occur until completion, which can make a noticable difference in overall execution time compared to the uniprocessor configuration (extreme example: https://github.com/genodelabs/genode/issues/712, in a more realistic scenario (compiling an application) the difference was still like ~2 minutes execution time with the uniprocessor configuration vs. ~6 minutes with the multiprocessor configuration). I've attached the debug output I got while trying to understand what's going on and which shows some of the RCU-related activities after each of the 3 timer interrupts (patch used for the debug messages: https://github.com/cproc/foc/commit/fa7b6f823cb29c0fc1db389ceb956d554d9e154…) According to these messages, the quiescent period had ended after the second timer interrupt and I wonder if it is really necessary to wait for a third timer interrupt before executing the corresponding callbacks. Would it work correctly with the attached patch, too? Christian

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compile l4 source files: idl-parser-driver.hh:62:1: error
by yuqing wang 09 Apr '13

09 Apr '13

Hi, when I compile TUDOS/lEnv tree downloaded form svn.tudo.org , many errors apear in /todu/dice/src/parser/idl: {{{ g++ -DHAVE_CONFIG_H -I. -I. -I../../.. -I../../../src -Wall -I../../../src -g -O2 -MT idl-parser.tab.o -MD -MP -MF .deps/idl-parser.tab.Tpo -c -o idl-parser.tab.o idl-parser.tab.cc In file included from idl-parser.yy:109:0: idl-parser-driver.hh:62:1: error： ‘token_type’ in ‘class yy::idl_parser’ does not name a type idl-parser.tab.cc: in function‘virtual int yy::idl_parser::parse()’: idl-parser.tab.cc:352:42: error： ‘idllex' not declared in this scope make[7]: *** [idl-parser.tab.o] Error 1 make[7]: Leaving directory ‘/todu/dice/src/parser/idl’ make[6]: *** [all-recursive] Error 1 make[6]: Leaving directory ‘todu/dice/src/parser’ }}} Any help is appreciated yuqing wang

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L4android mlock on vectors page causes unresolvable page fault
by Matthias Petschick 08 Apr '13

08 Apr '13

Hello, while experimenting with lvm, I noticed that mlocking the vectors page at 0xbffff000 from user space causes an unresolvable page fault (see full trace below). In particular, the lvcreate process attempts to lock its mapped memory regions when activating a volume, which includes the vectors page. While debugging this, I further noticed that L4android maps the vectors page to 0xbffff000 by default instead of 0xffff0000, configurable via CONFIG_VECTORS_BASE, however references to the hard-coded address 0xffff0000 remain in some places under arch/l4, e.g. in devicemaps_init() in arch/l4/mm/arch-arm/mmu.c. Without further investigating how the vectors page addressing is treated in L4android, I cannot say whether this is related or not. The pc in the backtrace is in special_mapping_fault, apparently because the vma for the vectors page was installed with a NULL pointer for its pages array, hence vm_private_data is also NULL when dereferenced by special_mapping_fault in if (*pages). The oops itself seems to be triggered because pfa is 0x1 and l4x_handle_pagefault refuses to resolve pagefaults for addresses < L4_PAGESIZE. Here's the associated trace: Page fault (non-resolved): pfa=1 pc=108df14 Internal error: Boom!: 410007 [#5] SMP Modules linked in: CPU: 0 Tainted: G D W (3.1.10-l4-dirty #8) PC is at special_mapping_fault+0x80/0xe0 LR is at __do_fault+0x68/0x464 pc : [<0108df14>] lr : [<01088b50>] psr: 6000001f sp : 132dbda8 ip : 00000000 fp : 0bd4eff8 r10: 00000000 r9 : 0137a1ac r8 : 00000008 r7 : 00000000 r6 : bffff000 r5 : 0605ae20 r4 : 01d38288 r3 : 000bffff r2 : 000bffff r1 : 132dbdc8 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SYS_32 ISA ARM Segment user Process lvcreate (pid: 395, stack limit = 0x132da2f0) Stack: (0x132dbda8 to 0x132dc000) bda0: 014e54a0 00000000 01d38288 01088b50 000284d0 01fa6cc0 bdc0: 132da000 01fa6700 00000008 000bffff bffff000 00000000 014a8e20 00000000 bde0: 01d38288 00000008 0bd4eff8 060d97fc 0605ae20 000bffff 00000000 0108bfb8 be00: 000bffff 00000008 00000000 01600000 014c60e0 bffff000 0bd4c000 0605ae20 be20: 000005ff 0bd4eff8 01d38288 00000008 00000000 0108c138 0bd4eff8 00000008 be40: 00000052 01d38288 01fa6cc0 bffff000 0605ae20 132dbedc 0605ae20 0108c34c be60: 132da000 00000000 00000001 00000010 00000000 00000000 014cf754 bffff000 be80: 00000001 01d382a0 0605ae20 132dbedc 00000001 0605ae20 0605ae58 0108cff4 bea0: 00000052 00000000 00000000 132dbedc 0605ae5c 01d38288 c0000000 c0000000 bec0: bffff000 0108d068 132dbedc 132da000 00001000 00000000 00000000 00000001 bee0: 0605ae5c 00000096 bffff000 0108d8f0 00001000 0000a790 000ed0d7 00001000 bf00: 132da000 0100f854 00001000 000ed0d7 00000000 00000000 00000000 40095068 bf20: 132da000 132dbfb0 01fa6cc0 132da000 014ec0e8 133ea36c 00000000 0bec6000 bf40: 00000000 00000000 00000000 00000000 00000000 01195d88 00000000 68732363 bf60: 00000000 00000000 00000000 00000000 01fa6cc0 01fa6cc0 b3000c00 132da000 bf80: b3000e00 ef000000 00000000 f1886fb8 ffff0200 60000010 0100d84c b3000c00 bfa0: 000ed0b3 f1886fec 000ba4c8 00079560 bffff000 00001000 0000a790 000c681c bfc0: 00001000 000ed0d7 000bc08c 00000096 00000072 000ed0b3 000ad844 000ba4c8 bfe0: 000bc0e0 bf87c608 00079560 40191234 60000010 bffff000 00000000 00000000 [<0108df14>] (special_mapping_fault+0x80/0xe0) from [<01088b50>] (__do_fault+0x68/0x464) [<01088b50>] (__do_fault+0x68/0x464) from [<0108bfb8>] (handle_pte_fault+0xb0/0x1a0) [<0108bfb8>] (handle_pte_fault+0xb0/0x1a0) from [<0108c138>] (handle_mm_fault+0x90/0xc0) [<0108c138>] (handle_mm_fault+0x90/0xc0) from [<0108c34c>] (__get_user_pages+0x12c/0x2f8) [<0108c34c>] (__get_user_pages+0x12c/0x2f8) from [<0108cff4>] (__mlock_vma_pages_range.clone.2+0x78/0x80) [<0108cff4>] (__mlock_vma_pages_range.clone.2+0x78/0x80) from [<0108d068>] (do_mlock_pages+0x6c/0x148) [<0108d068>] (do_mlock_pages+0x6c/0x148) from [<0100f854>] (l4x_vcpu_entry_c+0xc74/0x1f90) [<0100f854>] (l4x_vcpu_entry_c+0xc74/0x1f90) from [<00079560>] (0x79560) Code: e1a02003 e1a0c003 e2400001 1afffff3 (e59c4000) ---[ end trace 47d173d365d03980 ]--- Segmentation fault Maybe someone with a better understanding of how L4android treats the vectors page has an idea what's going wrong here? Cheers, Matthias

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How to access SD card on ARM board
by Chao-Jui Chang 08 Apr '13

08 Apr '13

Hi hackers, I want to use SD card as root file system for L4Linux. Base on my understand, we can use IO assignment in libio and let L4Linux kernel to access the devices directly. If this is correct, then next we need to choose correct driver in L4Linux's config menu. However, some device is platform specific, for example, "SDHCI support on Samsung S3C SoC" requires PLAT_SAMSUNG. This option is not available in L4Linux config menu. I have tried to modify the dependence in kernel's Kconfig, but it results in lots of compiler error, such as missing header files. Is this the correct way to achieve my goal? Or I need to make the driver as part of l4re ? Thanks, Chao-Jui

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Re: how to debug fiasco kernel
by Björn Döbel 07 Apr '13

07 Apr '13

Hi Keqin Sun, > Hi Bjoern, > This is a screenshot(Please see the attachment "debug.png") when I used gdb. > There is no room for me to resume execution using 'g' command. The prompt of > JDB appears only after I typed 'ESC' button and nothing happened when I resume > execution(Please see the attachment "debug2.png"). you set a breakpoint on the main() function, but if you did as I told you before, the enter_kdebug() you use to actually set the breakpoint is _after_ this function entry. Therefore you do not see the breakpoint being hit. If you are worried that "hello world" is not being printed as it should, I'd recommend you try to run the application without GDB and the enter_kdebug() line first. If this fails, something else is wrong in your setup. Bjoern

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Re: how to debug fiasco kernel
by Martin Unzner 07 Apr '13

07 Apr '13

I use GDB stubs exclusively, in Bochs as well as in QEMU (I did not try L4/Fiasco on other virtual machines so far, and only a few times on physical hardware). There are approaches for debugging in the L4 runtime environment, such as Valgrind and probably also GDB (although I am not sure about that). They are usually quite old and not all of them still work. If you like, you can take a look at some of the work presented at http://www.inf.tu-dresden.de/index.php?node_id=1701 and http://www.inf.tu-dresden.de/index.php?node_id=1429 . Anyway, at least with simple applications, my first approach is usually a close examination of the code: go through all your setup, and if you are unsure at some point whether you did it right or not, try to type your problem into Google. If you cannot find anything, send an e-mail to the list. People here are usually very nice and patient and they will be happy to help. Regards! Martin P.S.: I answered you using the mailing list, and I would like to ask you to use the "Reply to list" or "Reply to all" button of your e-mail client, so that everyone can follow the discussion and benefit from our findings. Am 02.04.2013 04:49, schrieb Jian Liu: > > 2013/4/2 Martin Unzner <munzner(a)os.inf.tu-dresden.de > <mailto:munzner@os.inf.tu-dresden.de>> > > > you mention bochsdbg, so maybe you want to use the Bochs GDB stub? > http://bochs.sourceforge.net/doc/docbook/user/debugging-with-gdb.html > tells you how to do so. Using GDB, you can debug all kinds of > programs on source code level. > > > Hi Martin, > > I am also wonder besides bochs, if there are other ways to > debug fiasco system on source code level. What is your usual method to > do it? > > Best, > > Jian

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how to debug fiasco kernel
by Keqin Sun 01 Apr '13

01 Apr '13

Hi, I have two questions about how to debug fiasco kernel. a) Are there any debugging tools? For example, I can use bochsdbg to debug linux kernel. b) It is difficult for me to debug applications or kernel using JDB because the JDB shows lots of memory address rather than source code. what shall I do if I want more source code information when I debug. Best regards, Jimmy Sun

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[Fiasco.OC] Desctruction of objects created by factory
by Sergey Grekhov 27 Mar '13

27 Mar '13

Hello, L4 hackers! I have a question about Fiasco.OC. I am a bit stuck in understanding of how objects created by factory are destroyed? For example, we have a call from user space l4_factory_create_thread(). It creates object in Fiasco (file fiasco/src/kernel/factory.cpp) and map it using call map() from fiasco/src/kernel/map_util.cpp. However, the procedure of destruction of created objects (tasks, threads, gates, irqs, vms) is not clear: it seems that there is some kind of the "garbage collector", but I can not figure out some important things. Particularly: 1) where is the code which essentially destroys created objects (call destructors)? 2) what conditions make "garbage collection" to start? 3) how "garbage collection" can be forced from user-space? As a use-case, I can propose the fork-bomb test from Genode framework: it creates lots of new Genode threads (thus, it makes a lot of new thread/gate/irq objects in Fiasco.OC). Thanks in advance for your answer. -- Best regards, Sergey Grekhov

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Question regarding L4_err class usage in method commit_result.
by Sergey Grekhov 22 Mar '13

22 Mar '13

Hello, L4 experts! I have a question regarding method Kobject_iface::commit_result() in the code of Fiasco.OC. One can easily find in the code something similar to following: return commit_result(-L4_err::EPerm); And this call is very confusing: it looks like returning message tag with error, but in fact the error bit (0x8000) is not set. Moreover, some values from L4_err is intersection with enumeration L4_msg_tag::Protocol because of: 1) sign '-' used when commiting result; 2) place where both values are saved - bits 31...16 of the message tag. And, finally, there are lots of returns similar to mentioned one (return commit_result(-L4_err::EPerm)) and there are no _any_ code which checks presence of these errors in the tag. I am very confused about these strange values saved in L4_msg_tag and it appears to me that in these cases should be used method Kobject_iface::commit_error(). Can someone explain the logic behind returning values defined in class L4_err? -- Best regards, Sergey Grekhov

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repomgr log
by Jack Andrews 19 Mar '13

19 Mar '13

hi, thanks for fiasco - it will be a lot of fun for me. first question: is my output of repomgr normal? (see below). it seems to be doing things more than once. $ svn cat http://svn.tudos.org/repos/oc/tudos/trunk/repomgr | perl - init http://svn.tudos.org/repos/oc/tudos fiasco l4re localdir: src Checked out revision 49. Creating ./kernel Updating 'kernel': A kernel Updated to revision 49. Creating ./kernel/fiasco Updating 'fiasco': A fiasco Updated to revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco [snip] thanks, jack

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Merging sigma0 and roottask
by Norman Feske 19 Mar '13

19 Mar '13

Hello Fiasco.OC developers, hereby, I'd like to propose a slight architectural change regarding the roles of sigma0 and roottask in Fiasco.OC-based systems. During our work with using the kernel for Genode, we repeatedly encountered problems that were somehow related to sigma0, in particular the priority inversion problem we reported last year (http://os.inf.tu-dresden.de/pipermail/l4-hackers/2012/005348.html) and a recent issue related to inconsistencies of caching attributes on ARM, which led to subtle memory corruptions. Both problems were pretty hard to debug and took us a lot of time. Knowing about those issues, there are of course ways to deal with them. The priority inversion problem could be solved by assigning the highest priority to sigma0. The cache attribute problem can principally be dealt with by managing the cache flushing manually and making sure not to touch the wrong cache lines. But this remains to be a mine field. Because roottask has all memory mapped, dangling pointers may go unnoticed, yet produce unwanted caching effects. In our experience, these kinds of problems remain largely invisible until the system gets highly dynamic (e.g., if the role of RAM for DMA buffers or normal memory changes at runtime). But once they occur, they become a nuisance. Without sigma0, our life would have been easier. With no sigma0 thread, there wouldn't have been a priority inversion problem. And without the sigma0 protocol that is unaware of caching attributes, we could easily maintain the consistent use of those attributes among all processes including roottask. Besides hitting the issues mentioned above, we found that the use of sigma0 implies two further problems. First, because roottask can hand out memory not before obtaining it from sigma0, all physical memory must be mapped within roottask. So the virtual memory of roottask limits the amount of physical memory usable in the system. And second, because roottask must maintain all those mappings with maximum privileges, a bug in roottask can silently corrupt arbitrary memory. Motivated by these observations, I conducted the experiment to remove sigma0 from the picture and see where this would lead us. Kernel changes -------------- The (preliminary) patch of the kernel and bootstrap is actually pretty small: https://github.com/nfeske/foc/commit/7599e863c2feb07a34b891499982f4ffb58ff3… I kept the term "sigma0" in place to keep the patch simple. In the following, the terms "sigma0" and "roottask" always refer to the first user-land process started by the kernel. Originally, sigma0 was paged with one-to-one mappings by the kernel and would use the normal map operation with a sigma0-virtual address as source of the mapping. Here, the new solution differs in that all memory mappings originating from sigma0 are now directly coming from the physical address space. This requires one kernel-internal interface change concerning the 'Mem_space::v_fabricate_map' function. This function is used in two situations, map and unmap. When mapping, it is used to determine the physical frame for the virtual address specified as source for the mapping. For the new version of sigma0, this makes no sense because the source address does not refer to sigma0's virtual address space. When unmapping, however, this function is used to look up the physical frame for the virtual page to unmap. In this case, the argument refers to an actual sigma0-virtual address. Consequently, the function cannot accommodate both use cases. Therefore, I introduced a new 'v_fabricate_map_src' function that accompanies the 'v_fabricate' function. For all processes other than sigma0, both functions are doing the same thing. But for sigma0, the 'map_src' function interprets the address argument as a physical address. Because this function is used to determine the mapping source, I have used the suffix "_map_src". The second noteworthy change is the distinction between sigma0 threads with a pager and those without a pager. The original version of sigma0 had no notion of a pager. There was only a single thread, paged by the kernel. Now, if roottask is sigma0, there are several threads. Most of them can be paged by a local pager in roottask. To distinguish both cases, I needed to introduce an 'is_null' accessor.function to the 'Context_ptr' class. User-land changes ----------------- The implications to Genode's version of roottask (called core) are more substantial but in very positive ways: The initialization of core's allocators used to required an interplay between core and sigma0. Because there is no longer a need to have all memory mapped in core, we can simply drop this whole procedure and just use the memory descriptors provided by the KIP. After an initialization phase where core faults-in its own image and the KIP via the kernel, core drops its privileges by assigning a core-local pager to all core threads. So any invalid access gets detected right away. Browsing through the page table of core using the kernel debugger is like visiting a desert. In contrast to the original version, it has become easy to maintain an overview of the mappings within core. The revocation of memory mappings used to rely on the in-kernel mapping database. This won't work for core anymore because core does not maintain mappings for the memory handed out to other processes. Instead, core uses 'l4_task_unmap' to flush mappings from non-core processes as needed. This is similar to how Genode works on OKL4. Still, non-core processes may create further mappings, which are captured by the in-kernel mapping database. Current state and open questions -------------------------------- With the current state of the implementation, the complete software stack of Genode runs without sigma0. This includes L4Linux. So I am pretty confident that the removal of sigma0 from the system does not imply functional disadvantages. That said, there are a few remaining questions that I'd like to discuss. First, the sole use of 'l4_task_unmap' to remotely flush memory mappings in other processes means that we must no longer provide the option of granting memory mappings. Otherwise, a process that received a mapping from roottask could "steal" the physical memory by granting it to someone else. Roottask would not know about that, and an attempt to flush the mappings in the original receiver of the mapping would just target a hole in the address space. My question is: "Can we live without granting memory?" or the other way: "What is a known use case for granting memory?" Second, the new situation triggers some code paths in the kernel that were not used before. Apparently, the unmapping of memory from sigma0 was not considered. This is where I hit a few assertions in the kernel. Right now, I have just worked around these assertions by uncommenting the offending code in 'kernel/fiasco/src/kern/map_util.cpp'. I understand that this is just a stop-gap solution. Would you like to lend a helping hand to find out... "How to support unmap from sigma0 in a clean way?" I would like to avoid Genode from diverging too much from the semantics of the official Fiasco.OC kernel. Hence, I would appreciate your consideration: "Would you like to follow a similar path with L4Re?" That would be very nice. But even if this should not be the case, I would find your rationale behind sticking with sigma0 very valuable to know, e.g., for reconsidering my plan. Regards Norman -- Dr.-Ing. Norman Feske Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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how to config L4Linux and Fiasco to access TCP/IP
by Jian Liu 18 Mar '13

18 Mar '13

Dear all, I am wonder how to config Fiasco and L4Linux to access intnet from a termail/Firefox in the sytem. I know we can set ifconfig and use "wget" in Genode. But is there a such solution for Fiasco and L4Linux? Which version can work and how to config them, E.g. menu.lst? Thanks. Best, Jian LIU ---- email to: gjk.liu(a)gmail.com

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how to compiler
by fiasco 17 Mar '13

17 Mar '13

Hi, I want to know whether the l4re and fiasco.oc have some practical application which is open source. I want to build some useful pkg application for demo. The example like "Hello, world" is too small.thanks.

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