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Ankh network
by Johan Dams 31 May '12

31 May '12

Hi. I've noticed that when sending more than one pbuf in low_level_output() that each pbuf gets sent individually over the network and is being treated as individual packets. I 'fixed' this problem by copying the different pbufs into one buffer and sending this buffer in one go (basically as a test to verify the issue). I guess the problem has to do with how l4ankh_send() calls l4shmc_rb_sender_commit_packet() after each pbuf instead of waiting until all pbufs of the packet in question are passed on with l4shmc_rb_sender_next_copy_in(). Best regards, Johan

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PowerPC support
by G S Madhusudan 31 May '12

31 May '12

This is in reply to Oliver Horst's posting on PPC support. I am running a research program to develop variants of L4 for use in India at IIT-Madras. http://www.iitm.ac.in/ Our target platforms are Freescale QorIQ processors (P2041, P4080 and T4240 - with hypervisor support) and Cortex A9 processors. We will initially use std dev boards but we are also developing our own custom HW. As someone pointed out it helps if someone has knowledge of PPC and kernels. I have been hacking open source kernels since 1985 ! (BSD 4.x) and have been working on PPC development since 1998, so while I do not underestimate the task it can be done. We also have access to Freescale's processor architecture team so that helps a bit. The project goal is actually ambitious since we want to replace Linux in security sensitive installations. I lead a Mach 3.0 based effort in the 90s along with IBM research and I am all too painfully aware of how uKernel based projects can fail ! I am also coordinating a processor development effort and Fiasco+ Genode combination will also be ported on to that processor. But it is a specialized custom processor so I suspect no one else other than my team be interested in that port. But one aspect of teh processor is aimed at improving the MMU so that the cost of context switches can be improved. If you cannot fix the OS, just fix the CPU ! Any thoughts on this aspect are welcome. On top of Fiasco we are developing UTM + router type appliances. Later we plan to port the Drizzle RDBMS. We would be glad to work with anyone with similar goals. Currently it is a 4 member team along with 7 MTech students doing projects on various aspects of this research. We also have access to sufficient P2041 and p4080 boards. Once our boards are ready (the 2041 boards i being PCB routed now), we plan to create an engineering curriculum using this HW and focusing on secure systems and uKernel OSs. the plan is to offer it to Indian engineering schools but anyone can use it. Regards G S Madhusudan

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Using pthread on L4/Fiasco
by 석현철 23 May '12

23 May '12

Thank you. I made a stupid mistake. When I added “REQUIRES_LIBS = libpthread” into Makefile, I modified three Makefiles. There are hello/Makefile, hello/server/Makefile, and hello/server/src/Makefile. I tested one by one. But I found I made a mistake. At last try, I wrote REQUIRES = libpthread instead of REQUIRES_LIBS = libpthread on hello/server/src/Makefile. After correcting my mistake, I can test pthread application. Thank you! Marcus Hyunchul Seok.

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Using pthread on L4/Fiasco
by 석현철 23 May '12

23 May '12

Hi. Hackers I’m trying to use pthread in an application which runs on L4. I modified “main.c” in Hello application, including “#include <pthread.h>”. And when I compiled L4Re, I got error messages: main.o: In function `main': /root/l4re-core-2011081207/src/l4/pkg/hello/server/src/main.c:39: undefined reference to `pthread_create' /root/l4re-core-2011081207/src/l4/pkg/hello/server/src/main.c:44: undefined reference to `pthread_join' make[5]: *** [hello] Error 1 I think this is because it cannot fine pthread.h header file. But I don’t know how to fix it. When I looked up previous lists, I could find one thread related to pthread in 2011 list. (the thread title is “Silly Pthread Issues”) I think that it is the same problem, but the reply is only one. Said “Add REQUIRES_LIBS = libpthread to the Makefile.” Actually, I tried it, but I couldn’t solve the problem. How can I use the pthread? Please, Help me!! Thank you! Hyunchul Seok The modified code is below: #include <stdio.h> #include <unistd.h> //#include <pthread-l4.h> #include <pthread.h> void *process_test(void *arg) { int i = (int)arg; int j; for (;;) { for (j = 0; j < i; j++) { printf(" "); } printf("%d thread\n", i); sleep(i); } } int main(void) { pthread_t threads[10]; int status[10]; int i; for (i = 0; i < 3; i++) { pthread_create(&threads[i], NULL, process_test, (void *)i); puts("New thread creation!"); } for (i = 0; i < 3; i++) { pthread_join(threads[i], (void **)&status[i]); } return 0; }

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[Announcement] Karma VMM first public release
by Matthias Lange 18 May '12

18 May '12

We are happy to announce the first public release of the Karma Virtual Machine Monitor [0]. Karma is a virtual machine monitor (VMM) that runs Linux in a virtual machine on top of the Fiasco.OC [1] microkernel. Its main design directives are speed and simplicity. Unlike KVM, VirtualBox or VMWare, Karma does no emulation, but resorts to aggressive paravirtualization and therefore has low complexity and shows superior performance for a number of benchmarks. Karma requires hardware assisted CPU virtualization. A feature that is available on all recent x86 CPUs (SVM or VT). Optionally, it can make use of hardware assisted memory virtualization (Nested Paging or ePT), if available. The Karma VMM is currently being used as a research vehicle at Technische Universität Berlin and Technische Universität Dresden. It main features are: - Trustworthy isolation of virtual machines by means of the microkernel. VMM compromise does no harm to other virtual machines as one instance of Karma runs exactly one virtual machine. - Clean, tiny code base, less than 9000 source lines of code. - Near native (guest)-Linux performance. - Supports: * SMP * Networking * Direct harddisk access via AHCI * RTC and Hpet support Karma is released under the terms of the Gnu General Public License Version 2. [0] http://karma-vmm.org [1] http://os.int.tu-dresden.de/fiasco [2] http://www.isti.tu-berlin.de/security_in_telecommunications [3] http://os.inf.tu-dresden.de -- Dipl.-Inf. Matthias Lange <mlange(a)sec.t-labs.tu-berlin.de> Security in Telecommunications TU Berlin / Telekom Innovation Laboratories Ernst-Reuter-Platz 7, 10587 Berlin Phone: +49 - 30 - 8353 58 553 Mobile: +49 - 160 - 587 28 07 Web: http://www.t-labs.tu-berlin.de/sect

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Booting L4/Fiasco + L4Re on PC
by 석현철 16 May '12

16 May '12

Hello. I’ve tried to boot L4/Fiasco on PC. I followed the directions for building from both “http://os.inf.tu-dresden. de/fiasco/build.html” and “http://os.inf.tu-dresden.de/L4Re/build.html” And I could run L4/Fiasco on QEMU. Now I hope I want to boot L4 on PC environment. As I searched, it can be done through GRUB. (But, I am not convinced that it is right way.) Anyway, I’ve tried to boot L4 by using GRUB. I use Ubuntu Linux for compiling L4/Fiasco and L4Re. In this, there is GRUBv2. I made the bootable ISO image. (It is done by “make grub2iso E=hello MODULE_SEARCH_PATH={mypath}”) And then, what should I do in order to boot L4 on PC? How should I configure the GRUB configuration? I really want to know how to boot L4 on PC. Please, help me! Kind Regards, Hyunchul Seok.

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Re: understanding l4re
by Björn Döbel 15 May '12

15 May '12

Hi, On 14.05.2012 18:13, Ryan Brown wrote: > Thank you for your answers, they were very helpful. Now I have some more > questions: > > Are any of these documents relevant to, or helpful in working with > Fiasco.OC? http://l4hq.org/docs/manuals/ No. These docs don't describe the Fiasco.OC API (although many of the concepts are shared). The relevant documentation for Fiasco and the L4 Runtime Environment is at https://os.inf.tu-dresden.de/L4Re/doc/ (yes, that's all for now - if you have any questions, please ask and we're glad to help). There's also a Wiki: http://wiki.tudos.org/Main_Page > Is there a limit on how many threads you can create with pthreads? As in any other system, pthread_create() returns -EAGAIN if there are insufficient system resources to create another thread. This may happen, if the lib is not able to allocate a stack or TLS area for the thread or in the Fiasco.OC case if there are insufficient kernel resources. > How does thread scheduling work? As a policy this should be implemented > in user space, right? Actually, scheduling is the only policy that is implemented in the kernel and as far as I know most L4 variants do this, although there have been experiments to do it in user space. [1] > Does pthreads take care of this? I see that it > handles resuming the highest priority waiting thread for example when > unlocking a mutex. But what if more threads are runnable than the number > of cores? Fiasco.OC schedules threads based on their priorities. (Same priority leads to round-robbin scheduling.) There are separate run queues for every physical CPU and you have to explicitly bind a thread to a physical core. > Are shared libraries supported? Yes. There is a port of ldso in l4/pkg, most libs are built as shared variants as well. There's even an example for starting a version of the hello example with shared libraries: * First check out L4Re as documented on the web page. * Then go to l4/pkg and do $> svn up examples/ * Then build examples/misc/shared-hello * In l4/conf/modules.list there is an example entry "hello-shared" that should get you set up. > Actually, I think I saw that fork/exec, etc were stubs. These may be stubs in the C library, but there are no implementations of fork/exec for L4Re. (Although, this would be possible.) > I believe I've seen L4 apis for creating new address > spaces, but what about loading an executable into the address space? This is done by an ELF loader. The default loaders are moe (for the first binary) and ned (the Lua-based init program). You can also write your own and use the functionality provided by l4/pkg/libloader. > I suppose I should take more of a look at moe and ned to understand this. Indeed. ;) > How does the L4re logger get initialized and connected to the serial > console? When being started, an L4Re application gets an initial set of capabilities (== communication channels). These are the initially available services and one of them is the Log channel which by default provides stdout and stderr for your application. The default log implementation is provided by the kernel who has a serial console driver built in (debugging...). > I see some code inside bootstrap for initializing the uart, is > this where it happens? This is the first place where this happens. Bootstrap is a bit weirdly placed in l4/pkg. Actually, it is the "kernel" that is initially booted for every L4 setup. It sets up a multiboot environment and then hands over control to Fiasco, which then is the real kernel to run. As the Fiasco codebase is separate from the L4Re code base, you'll find another UART driver in Fiasco as well. Yep, that's redundant. > Thanks for the help, and sorry for so many questions. No worries. May I ask if you have any special project in mind? Cheers, Bjoern [1] J. Stoess: Towards Effective User-Controlled Scheduling for Microkernel-Based Systems, SIGOPS OSR, July 2007

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Source of KVM-L4 ?
by Rolf Sommerhalder 14 May '12

14 May '12

Hello list, Is there any source code available of "KVM-L4", e.g. KVM which has been ported to L4Linux? There are some publications from TU Dresden which report about this successful port as KVM-L4. Is its source code available at all, or is it just hiding from search engines in some public repository or archive? Thanks, Rolf

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Fiasco.OC on Cortex-A9
by Johan Dams 12 May '12

12 May '12

Hi all, I'm wondering if anyone has come across an issue with Fiasco.OC on Cortex-A9 based systems. The problem is that I do not get past this instruction (and with that I mean that the system just locks up): "mcr p15, 0, %[control], c1, c0 \n" // control in src/kern/arm/bootstrap.cpp. The exact same code works fine on a Cortex-A8 based processor. Changing cache on or off (in the control variable) does not change anything. Also, just reading the current content of the register and writing it back locks the system. I have been going over compiler flags, tried different compilers altogether (using 4.5.3-r1 right now), and looked if something odd was going on with the generated assembly code, etc. with no results. This code is a standard ARM instruction, and comes well before any paging or even the actual kernel starts. The SOC in question is a Freescale i.MX6 Quad core Cortex A9, which I realize not many have actually used yet. However, if similar issues presented itself on other platforms, these might give some clues. Any ideas? Best regards, Johan

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understanding l4re
by Ryan Brown 11 May '12

11 May '12

Hi. I'm exploring developing software that runs on Fiasco.OC/L4re, so I'm trying to understand how the various pieces fit together. If I'm following the makefiles correctly it looks like some uclibc files (like libc/inet) are getting compiled, but they seem to be making linux system calls. I also see the libc_backends code, and I'm not sure how this fits in. It looks like these are mostly stubs, is it expected that you'll link the final binary with the real implementation you want? I also took a look at libpthreads, and I don't see much l4 specific code. It looks like mutexes are implemented as spinlocks? Isn't there a better way to do synchronization in fiasco?

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[ankh+l4linux] Doesn't work
by Timur 03 May '12

03 May '12

Hi, after ifconfig eth0 up l4linux crashes with errors: -------------------------- l4lx_irq_dev_startup: creating IRQ thread for 66 (IRQ-cap 42d000) l4lx_irq_dev_startup: creating IRQ thread for 66 (IRQ-cap 42d000) l4linux | l4lx_thread_create: Created thread 433 (IRQ66) (u:b3000e00, sp:006c9ff4) l4linux | irq_thread: Started IRQ thread for IRQ 66 l4linux | wait_for_irq_message: IRQ 66 (42d) receive failed, error = 0x4 ------------------------ l4_is_invalid_cap(p->irq_cap) return false in wait_for_irq_message, but l4_irq_wait_u(p->irq_cap, &src_id, L4_IPC_NEVER, utcb) return L4_IPC_ENOT_EXISTENT. How can this be? -- Galiullin Timur

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Re: Running Fiasco.OC in Bochs
by Norman Feske 01 May '12

01 May '12

Hello Julius, > I am successfully running Fiasco.OC on Bochs (2.4.6) with PCI emulation > enabled (although all my slots are empty). I had encountered the same > double fault issue and discovered that I could work around it by > configuring Fiasco to use RTC scheduling (instead of PIT). APIC seems to > work fine, too. thank you for this excellent suggestion! By using RTC as scheduling timer and re-enabling PCI, I was able to bring the whole scenario (including the GUI) to life. Cheers Norman

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Re: Fwd: Running Fiasco.OC in Bochs
by Martin Unzner 29 Apr '12

29 Apr '12

Hi Norman, Björn told me about your problem because I write my Belegarbeit using a Framework which includes Bochs. I was not able to reproduce your exact error, but since I have experienced faults at the same stage of booting when I started with Bochs, my workaround might at least be worth a try. Using your setup, my Bochs instance hung up instead of reporting a double fault, but then again, everything worked when I disabled the PCI bridge. So maybe pci: enabled=0 in bochsrc or even omitting the --enable-pci parameter while configuring might help in your case. In general, I experienced that compiling Bochs with less configuration parameters usually produces a better emulator. Regards, Martin Am 29.04.2012 08:36, schrieb Björn Döbel: > Hi, > > Kannst Du dem Norman helfen? > > Björn > > -------- Original-Nachricht -------- > Betreff: Running Fiasco.OC in Bochs > Datum: Sat, 28 Apr 2012 21:14:37 +0200 > Von: Norman Feske<norman.feske(a)genode-labs.com> > An: l4-hackers(a)os.inf.tu-dresden.de > > Hello, > > for tracing/profiling purposes, I'd like to run Genode on Fiasco.OC in > Bochs. My prior attempts with the OKL4 and Pistachio kernels went fine. > However, when booting the setup with Fiasco.OC, I get the following > kernel message right at the start: > > Freeing init code/data: 28672 bytes (7 pages) > > DOUBLE FAULT! > EAX=ec7ff000 ESI=00000000 DS=0023 > EBX=fcdcf000 EDI=fcdcf170 ES=0023 > ECX=ec7ff000 EBP=f0060100 GS=0043 > EDX=ec7ff000 ESP=fcdcffbc SS=0010 ESP0=00000000 > EFL=00200246 EIP=f006592c CS=0008 > Return reboots, "k" tries to enter the L4 kernel debugger... > > Has anyone successfully used Fiasco.OC with Bochs before? If yes, I > would very much appreciate a known-good starting point for experimentation. > > For reference, I am using the following kernel configuration: > > > https://raw.github.com/genodelabs/genode/master/base-foc/config/x86_32.kern… > > My 'bochsrc' file looks as follows: > > display_library: x > romimage: file=/usr/local/share/bochs/BIOS-bochs-latest > megs: 128 > com1: enabled=1, mode=file, dev=serial.out > boot: cdrom > ata0-master: type=cdrom, path=var/run/demo.iso, status=inserted > mouse: enabled=1, type=imps2 > log: ./bochs.out > panic: action=fatal > vgaromimage: file=/usr/local/share/bochs/VGABIOS-lgpl-latest > vga: extension=vbe > pci: enabled=1, chipset=i440fx, slot1=pcivga > > The Bochs version is the official release 2.5.1 configured with the > following arguments: > > --with-x11 --enable-plugins --enable-pci --enable-clgd54xx > > Regards > Norman >

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Running Fiasco.OC in Bochs
by Norman Feske 28 Apr '12

28 Apr '12

Hello, for tracing/profiling purposes, I'd like to run Genode on Fiasco.OC in Bochs. My prior attempts with the OKL4 and Pistachio kernels went fine. However, when booting the setup with Fiasco.OC, I get the following kernel message right at the start: Freeing init code/data: 28672 bytes (7 pages) DOUBLE FAULT! EAX=ec7ff000 ESI=00000000 DS=0023 EBX=fcdcf000 EDI=fcdcf170 ES=0023 ECX=ec7ff000 EBP=f0060100 GS=0043 EDX=ec7ff000 ESP=fcdcffbc SS=0010 ESP0=00000000 EFL=00200246 EIP=f006592c CS=0008 Return reboots, "k" tries to enter the L4 kernel debugger... Has anyone successfully used Fiasco.OC with Bochs before? If yes, I would very much appreciate a known-good starting point for experimentation. For reference, I am using the following kernel configuration: https://raw.github.com/genodelabs/genode/master/base-foc/config/x86_32.kern… My 'bochsrc' file looks as follows: display_library: x romimage: file=/usr/local/share/bochs/BIOS-bochs-latest megs: 128 com1: enabled=1, mode=file, dev=serial.out boot: cdrom ata0-master: type=cdrom, path=var/run/demo.iso, status=inserted mouse: enabled=1, type=imps2 log: ./bochs.out panic: action=fatal vgaromimage: file=/usr/local/share/bochs/VGABIOS-lgpl-latest vga: extension=vbe pci: enabled=1, chipset=i440fx, slot1=pcivga The Bochs version is the official release 2.5.1 configured with the following arguments: --with-x11 --enable-plugins --enable-pci --enable-clgd54xx Regards Norman -- Dr.-Ing. Norman Feske Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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Performance of l4_task_unmap call
by Chen Tian 26 Apr '12

26 Apr '12

Hi, I did a small test: a parent task first maps and then unmaps a page to its child. Both parent and child task are running on the same core. I found the execution is very slow and 99% time are spent on l4_task_unmap( L4_FP_OTHER_SPACES flag is used). After some investigation, I found the flag "need_xcpu_tlb_flush" in map_util.cpp:766 is set to true. My guess is that this flag controls the tlb of the cpu at which the child task is running. However, in my case, both tasks are running on the same core, setting this flag can have huge negative impact on performance. I am thinking to put a check before this statement: if (current_cpu() != space's CPU) set the flag to true. Is this correct? If so, how to get space's cpu? space->cpu() ? Thanks for the help. Chen

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Bootfs got overwritten
by Haohui Mai 26 Apr '12

26 Apr '12

Hi, I'm encountering a problem where the memory region of BOOTFS of L4Re got overwritten. Interestingly, the page is overwritten by things in the bootfs. Here are the physical memory mapping set up by BOOTFS: ... BOOTFS: [2227000-23297b8] [C:506000] rtc BOOTFS: [232a000-26d5411] [C:507000] mag BOOTFS: [26d6000-2848a94] [C:508000] fb-drv BOOTFS: [129d000-129daa4] [C:509000] vandroid-x86.cfg BOOTFS: [126b000-126b3b7] [C:50a000] x86-legacy.devs … The page 0x2239000 (which belongs to rtc) is magically overwritten by the first page of x86-legacy.devs. I confirmed it with both JDB and QEMU monitor. I'm running the newest snapshot of L4Re / L4Android on top of the UP version L4.Fiasco kernel. What would be the best approach to debug the problem? is it there a way to mark the whole BOOTFS as read-only so that I can figure out what's going on? Thanks! ~Haohui

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Re: Fiasco.OC development status
by Robert Campbell 24 Apr '12

24 Apr '12

I'm interested in userland changes and possible ports of libraries and frameworks. I'll definitely be focusing on the Fiasco.OC kernel. However, I'm at a crossroads with choosing the userland i.e whether to go with L4Re or Genode. IIRC, the port of Qt to L4Re or L4Env was version 3.x. Genode has a port of Qt 4.7.x. Genode has taken their development public So I am able to watch their activity. However, with L4Re I'm not sure what to expect in new releases bar what the publications might imply. If you are able to provide information on possible ports and update to existing ports then that would aid my decision and I would appreciate it. P.S

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L4Android and L4Linux parallel on an i.MX53
by Tobias Fink 22 Apr '12

22 Apr '12

Hello List, for my bachelor project I'm trying to run Android and Linux parallel on an i.MX53 Board. While the first approach with KVM seemed not to be the right way to go L4 looks promising. While I found many interesting and helpful topics in this list I still have some questions. I tried to first build the "Hello World" example which worked fine but failed in building other examples because of not fulfilled dependencies (first to note io). I already checked out "l4linux_requirements". What else do I need? The board is a custom board with very little documentation. I have some Linux drivers for the connected hardware. Is it possible to use them with L4Linux or would I have to get/write drivers for L4 itself? Sorry about these very basic questions. I've just started working with L4. Regards Tobi

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Windows in QEMU on KVM-L4
by Rolf Sommerhalder 22 Apr '12

22 Apr '12

Hi, In their paper [1], the authors mention that they were able to run 32-bit versions of Windows XP and 7, among other guest OSes, in KVM-L4 on AMD x86 processors with AMD-V extensions. Does anyone from the list happen to have an .iso around which boots on such an AMD machine and demonstrates the performance of Windows (any version will do) running in KVM-L4? Alternatively, I would be grateful for any recipe how to adapt a demo CD or Fisco.OC/L4Re build environment so that it allows to start a Windows image in QEMU/KVM on L4. So far, I have managed to install and to run Windows 7 Pro in a QEMU/KVM image on my Linux host. As this image is over 4 GByte by itself, plus QEMU with its dependencies, there is no way of just extending the ramdisk image in order to load and run it in L4Linux. After searching this list, I so far found two possible ways to proceed: a) Extended the ramdisk so that it mounts a disk partition /dev/hdaX, and then chroot to that mounted partition. Then try to launch the QEMU image from that new root. However, a previous poster here ran into a problem while trying this, and it is unclear to me if was able to overcome it [2]. b) Abandon the ramdisk and have L4Linux mount a disk partition as its root file system directly upon boot. This was tried in 2006 and it is unclear if it finally worked [3]. In both cases, I presume that the binaries in that partition (QEMU and its dependencies) must match the version of the L4Linux kernel (which is 3.0). My Linux build environment uses Ubuntu 10.04 LTS (which uses kernel 2.6.x). My only interest at this early stage of a quick Proof of Concept is just to get a feeling if a faithfully virtualised Windows run on top of KVM-L4 still performs reasonably well on a recent (Business-) PC, so that it is still acceptable to the average user. Previous results published suggested that real-world Linux applications incur (only) a 4..5% overhead when run on top of L4Linux, compared to running them natively on (bare metal) Linux. Now I would like to know if this surprisingly low overhead also continues throughout KVM-L4 with Windows as one of its "applications". Thanks in advance for any hints, Rolf [1] Virtual Machines Jailed - Virtualization in Systems with Small Trusted Computing Bases Michael Peter, Henning Schild, Adam Lackorzynski, Alexander Warg VTDS'09: Workshop on Virtualization Technology for Dependable Systems (Eurosys 2009 affiliated workshop) , March 2009 http://os.inf.tu-dresden.de/papers_ps/peterschild09_vtds_virtual_machines_j… [2] Using hard disk as root filesystem http://www.mail-archive.com/l4-hackers@os.inf.tu-dresden.de/msg00851.html [3] Booting L4Linux/Fiasco with root=/dev/hda http://os.inf.tu-dresden.de/pipermail/l4-hackers/2006/002396.html

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l4_task_cap_equal broken?
by Stefan kalkowski 20 Apr '12

20 Apr '12

Dear Fiasco.OC developers, while working with Genode on top of Fiasco.OC, I've encountered the following problem. When I transfer ipc-gates via ipc between tasks, it comes to the point where a task receives a gate it already owns. These duplicates are detected due to an additional identifier that is transfered together with the gate. To detect fraud (whether somebody has send an invalid gate/id combination) the received gate gets compared with the locally available one via "l4_task_cap_equal". Now, the problem is "l4_task_cap_equal" often fails even when both capabilities point to the same ipc-gate. The following code-snippet demonstrates this issue: ... tag = l4_task_cap_equal(L4_BASE_TASK_CAP, i->kcap(), rcv_cap); if (!l4_msgtag_label(tag)) { unsigned long id1 = l4_debugger_global_id(i->kcap()), id2 = l4_debugger_global_id(rcv_cap); printf("my_cap=%lx (id=%lx) rcv_cap=%lx (id=%lx)", i->kcap(), id1, rcv_cap, id2); if (id1 == id2) enter_kdebug("FAIL"); } ... This snippet is executed after a thread in the roottask received from another thread of the same task a capability via IPC. Thereby rcv_cap is the cap that was received via ipc and i->kcap() is the cap that was retrieved via the additional transfered identifier. When executed I get the following output: ... my_cap=20f000 (id=12) rcv_cap=205000 (id=12) --------------------------------------------------------------------- CPU 0 [00145e81]: FAIL [ entrypoint] jdb: The debugger's global id (here: 12) indicates that both capabilities reference the same object. Nevertheless, the equality test fails. Can you confirm that this is undesired syscall's behaviour, or do I miss something important? The attached kernel patch fixes the problem for me, but may introduce other problems (e.g.: not sure whether obj() returns always valid pointers). Regards Stefan

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Fiasco.OC development status
by QiuYi 19 Apr '12

19 Apr '12

> On 10.04.2012 07:20, Robert Campbell wrote: >> Thank you Bjoern. >> Any idea when new release will be made and what changes and improvements to >> expect? > Unfortunately, there is no more specific answer than: There will be a > new release soon (maybe this summer). No major new features, but all > components will have undergone further developments & fixes. > Are there any features you are interested in specifically and that you > are missing from or cannot find in the current release? > Bjoern I am interested in the drivers of touchscreen, keypad and NANDflash on the beagleboard at the L4RE and L4linux. qiuy.

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FPU state management in L4Fiasco.OC program
by Mai, Haohui 18 Apr '12

18 Apr '12

Hi, I'm writing a new OS kernel atop of L4Fiasco.OC. I'm having some difficulties to let my OS support user-level processes that uses floating-point instruction. So far, My OS closely follows L4Linux, it creates a new task for each user-level process, and marks as all threads of the task as alien thread to capture all page faults and exceptions. My OS works fines with page fault and syscalls. However, I'm confused with what I should do with floating-point exception (exception #7), which is issued to my kernel at the first time it tries to perform floating-point arithmetic. I tried to return to the user-level process with an empty message ( l4_msgtag_t tag = l4_msgtag(0, 0, 0, 0) ), or an empty message with L4_MSGTAG_TRANSFER_FPU (l4_msgtag_t tag = l4_msgtag(0, 0, 0, L4_MSGTAG_TRANSFER_FPU) ), but I had no luck. The user-level process immediately calls "int $0x3" and stops. I read through L4Linux's code and it seems it's doing similar thing, except that it did initialize the FPU state before asking L4 to transfer the FPU state to user-level process. Am I missing something? What's the recommend way of doing it? Your comments are highly appreciated. ~Haohui

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shmc/l4shmnet improvements
by Stefan Fritsch 17 Apr '12

17 Apr '12

Hi, the attached shmc.diff fixes many bugs in shmc and adds some new functionality. l4shmnet.diff then uses this to implement a protocol that does not require one end to wait for the other end during boot, and that allows to set the link state up and down. The old protocol is still supported. The changes may be used under the MIT license (which is included in the include/shmbuf.h file. You can find the detailed changelog for shmc.diff below. The diff is on top of the diff I have sent in November. Cheers, Stefan Add include/shmbuf.h which implements the l4shmnet packet protocol, to be used by l4linux and others. include/shmc.h: - l4shmc_iterate_chunk(): New function to iterate over all chunk names - l4shmc_chunk_size(): change return value to allow returning an error - l4shmc_area_size_free(): New function to get remaining free space - l4shmc_area_overhead(): New function to get overhead not usable by chunks - l4shmc_chunk_overhead(): New function to get size overhead per chunk include/types.h: - Make l4shmc_chunk_desc_t members volatile to avoid races - l4shmc_area_t: add _size member for fast access - l4shmc_chunk_t: add _capacity member that stores the size outside of the shm area and is therefore safe from tampering by remote end shmc/include/internal.h: - l4shmc_chunk_ready(): need HW memory barrier - l4shmc_chunk_size(): Check for overflow - l4shmc_chunk_capacity() adapt to new _capacity member - l4shmc_chunk_consumed(): don't need a memory barrier lib/src/shmc.c: - l4shmc_create(): protect from integer overflows, initialize lock - l4shmc_area_overhead(): new function - l4shmc_chunk_overhead(): new function - next_chunk(): utility function that gets the next chunk, with proper sanity checks to avoid invalid memory access/loops if the other side is malicious - l4chmc_iterate_chunk(): new function - l4shmc_add_chunk(): Add sanity checks, use next_chunk(), initialize complete chunk struct properly before inserting into linked list - l4shmc_area_size_free(): new function - l4shmc_get_chunk_to(): Add sanity checks, use next_chunk()

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Re: Can't get sender from l4_ipc_wait()
by Haohui Mai 17 Apr '12

17 Apr '12

Hi, Thanks for you suggestions. I did get sources from l4_ipc_wait() -- but I still cant map it back to the thread originating the IPC. I created an IPC gate for each task to receive page faults and exceptions, where I set the label of the gate to be my task identifier. I did get my task identifier back, but it seems there's no way to get my thread identifier since the source code of L4 Fiasco suggests that l4_ipc_wait() will only return the label of the IPC gate as the source. Setting the same pager for all threads in a single task seems a reasonable thing to do but obviously it lost the information for thread identifier. In order to recover this information, does it mean that I should create an IPC gate for each thread, setting its label to thread identifier in order to recover this information? Taking a step back, am I doing the right thing? If the answer is no, what would be the suggested architecture? Your comments are highly appreciated. ~Haohui On Apr 10, 2012, at 1:55 AM, Adam Lackorzynski wrote: > Hi, > > On Sun Apr 08, 2012 at 17:08:10 -0500, Mai, Haohui wrote: >> Can you elaborate a little bit? Some code skeletons would be quite helpful. >> >> I already created a new address space through l4_factory_task_create(), and >> my own kernel can serve all page faults / exceptions / IPC for that task. >> >> This is done by mapping the capability of my own kernel, which is its >> thread id, into the newly created task. Therefore, I assume that the IPC >> gate is set up. > > Are the other tasks trusted so that you can give out your own thread > cap? That's usually no good thing to do. > >> What else should I do in order to have my kernel getting the source of the >> IPC when calling l4_ipc_wait()? > > It's basically just l4_factory_create_gate, in the same way as > l4_factory_task_create. Create it with a label of your choice and > binding to the pager, and map it instead of the thread directly. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/

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Questions about Vcon.
by Juwon.Song 13 Apr '12

13 Apr '12

Hello l4-hackers, I will try to use the Vcon of Fiasco. But I don't know about the usage of Vcon. I want to know more information about Vcon. If you have the more information and usage of Vcon, give me the data or examples. Thank you. Song.

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