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L4Re: C++ or DICE for IPC
by Valery V. Sedletski 24 Feb '11

24 Feb '11

Hi, all. I checked out a new L4Re userland and a new Fiasco.OC microkernel. I noticed that it seems, no IDL compiler is used for IPC anymore, but found that, like in l4\pkg\examples\clntsrv\ example, IPC is encapsulated in C++ classes. That's nice, C++ is a feature-rich object oriented language. But what can I do if I want to write a program on other languages, like plain C, Ada etc.? I think, such possibility must exist too, and IDL is a means of implementing such a language neutrality. Is DICE discontinued? And how can I do something with communication code if not using IDL? Thanks in advance, WBR, valery

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Boot into video mode with grub2
by Dan Haim 23 Feb '11

23 Feb '11

Hi, I'm trying to boot L4Linux under MAG. I used to use the "vbeset 0x117" GRUB command to set the screen into the correct video mode but now I'm using GRUB2 and I can't find any equivalent command(s). Has anyone successfully booted MAG under GRUB2?

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[L4 on realview Cortex A9] Failing on board check during fiasco bootup
by Naveen Chandrakar 23 Feb '11

23 Feb '11

Hello Guys, I was attempting to run fiasco built for CortexA9/realview-pbx board on qemu. "qemu-system-arm" version used for this experimentation is "QEMU PC emulator version 0.12.5 (qemu-kvm-0.12.5)" L4 Code used "l4re-core-2011020417" with hello world example. Below are the messages which i got when i tried to run fiasco on qemu - 1st set of logs I tried to comment the check inside Board_check::check_board() in the hope that it might boot up, but later i got crash for qemu (hw mismatch ?) - 2nd set of logs *1st set of logs* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ L4 msgs specifying invalid sys id~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ novino@naveen-linux:~/L4/l4re-core-2011020417/src/l4/mybuild-realview-pbx-a9/images$ qemu-system-arm -M realview-pbx-a9 -cpu cortex-a9 -kernel bootstrap_hello.elf -m 256 -nographic -net nic -net user L4 Bootstrapper Build: #2 Thu Feb 10 18:21:42 MVT 2011, 4.5.1 Scanning up to 256 MB RAM ........some messages ..... Starting kernel fiasco at 00001000 Cache config: ON Realview System ID: Rev=0 HBI=178 Build=0 Arch=5 FPGA=00 Invalid System ID for this kernel config Expected (01780500 & ffffff00) == 1182f500 Stopping. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ end of msgs ~~~~~~~~~~~~~~~~~~~~~ *2nd Set of logs* ~~~~~~~~~~~~~~~~~~~ L4 msgs after modifying Board_check::check_board() ~~~~~~~~~~~~~~~~~~~~~~~~ novino@naveen-linux:~/L4/l4re-core-2011020417/src/l4/mybuild-realview-pbx-a9/images$ qemu-system-arm -M realview-pbx-a9 -cpu cortex-a9 -kernel bootstrap_hello.elf -m 256 -nographic -net nic -net user L4 Bootstrapper Build: #3 Thu Feb 10 19:06:41 MVT 2011, 4.5.1 Scanning up to 256 MB RAM Memory size is 256MB (00000000 - 10000000) RAM: 0000000000000000 - 000000000fffffff: 262144kB Total RAM: 256MB mod04: 010d3000-010f4450: hello mod03: 010b1000-010d2488: l4re mod02: 01073000-010b066c: moe mod01: 01061000-01072304: sigma0 mod00: 01015000-010608f8: fiasco Moving 5 modules to 1100000 with offset eb000 moving module 05 { 10d3000-10f4450 } -> { 11be000-11df450 } moving module 04 { 10b1000-10d2488 } -> { 119c000-11bd488 } moving module 03 { 1073000-10b066c } -> { 115e000-119b66c } moving module 02 { 1061000-1072304 } -> { 114c000-115d304 } moving module 01 { 1015000-10608f8 } -> { 1100000-114b8f8 } Scanning fiasco Scanning sigma0 Scanning moe --init=rom/hello Relocated mbi to [0x100f000-0x100f0d6] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x2000 Regions of list regions [ 1000, 19ff] { a00} Kern fiasco [ 2000, 5cfff] { 5b000} Kern fiasco [ 90000, 9e193] { e194} Sigma0 sigma0 [ 140000, 18b48b] { 4b48c} Root moe [ 1000000, 10143eb] { 143ec} Boot bootstrap [ 100f000, 100f1d3] { 1d4} Root Multiboot info [ 119c000, 11df44f] { 43450} Root Modules Memory API Version: (87) experimental Sigma0 config ip:00090000 sp:01013044 Roottask config ip:00140088 sp:00000000 Starting kernel fiasco at 00001000 Cache config: ON Realview System ID: Rev=0 HBI=178 Build=0 Arch=5 FPGA=00 <<Commented>> Invalid System ID for this kernel config Expected (01780500 & ffffff00) == 1182f500 Stopping. Hello from Startup::stage2 Initialize page table Number of IRQs available at this GIC: 96 Number of IRQs available at this GIC: 32 Vmem_alloc::init() qemu: fatal: Unimplemented cp15 register write (c9, c14, {0, 0}) R00=00000000 R01=00000000 R02=80000000 R03=00000001 R04=f00487b0 R05=00054004 R06=00215406 R07=00115406 R08=00015406 R09=00002000 R10=00000000 R11=0100f058 R12=ffffffff R13=f0048670 R14=f005bd3c R15=f005bd28 PSR=a00001d3 N-C- A svc32 Aborted ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~end of msgs ~~~~~~~~~~~~~~~~~~~~~~~~ Warm Regards, Naveen

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13th Real Time Linux Workshop - 1st Call for Papers
by Nicholas Mc Guire 23 Feb '11

23 Feb '11

Hi ! would be nice if we could get an update of the current L4 activities for at the next RTLWS - CfP bellow. thx! hofrat 13th Real-Time Linux Workshop October 20-22, 2011 Faculty of Electrical Engineering Czech Technical University in Prague Prague, Czech Republic Following the meetings of academics, developers and users of real-time and embedded Linux at the previous 12 real-time Linux workshops held world-wide (Vienna, Orlando, Milano, Boston, Valencia, Singapore, Lille, Lanzhou, Linz, Guadalajara, Dresden and Nairobi), the Real-Time Linux Workshop for 2011 will come to the Czech Technical University in Prague, Faculty of Electrical Engineering, Dept. of Control Engineering - academic OSADL member since 2008. The workshop will be held from October 20 to 22. Rationale Embedded and real-time Linux are gaining traction in consumer electronics and in industrial computing in breath-taking speed. Linux runs a wide range of industrial applications including real-time and safety-related systems. And the best is that everyone on earth has access to this unparalleled pool of Open Source software as long as he or she has access to the Internet. Nevertheless, this access is by no means one-way - the return paths are from providing bug reports, additions and ideas for enhancements and, finally, the very important mechanism of peer review that makes Linux, and particularly real-time Linux, as stable and innovative as it is. In addition to sending patches and providing feedback via Internet, direct mutual exchange between field engineers, system integrators, and project managers, and hardware, driver, board support package and kernel developers is needed. The Real Time Linux Workshop is successfully serving this purpose since more than 10 years. We are looking forward to meeting each other at another great Real Time Linux Workshop - this time in Prague, Czech Republic. Call for papers Authors from academics, industry as well as the user community are invited to submit papers on original work related to Open Source real-time systems. Such work may deal with general topics related to Open Source based real-time systems but also with research, experiments and case studies, as well as with issues of integration of Open Source real-time and embedded systems. A special focus will be on industrial case studies and safety-related systems. Topics of interest include, but are not limited to: - Modifications and variants of the GNU/Linux operating systems extending its real-time capabilities - Contributions to real-time Linux variants, drivers and extensions - User-mode real-time concepts, implementation and experience - Real-time Linux applications, in academia, research and industry - Safety-related FLOSS systems - Work in progress reports, covering recent developments - Educational material on real-time Linux - Tools for embedding Linux or real-time Linux and embedded real-time Linux applications - RTOS core concepts, RT-safe synchronization mechanisms - RT-safe interaction of RT and non RT components - IPC mechanisms in RTOS - Analysis and benchmarking methods and results of real-time GNU/Linux variants - Real-time networking with COTS - Medical applications using COTS and FLOSS - Debugging techniques and tools, both for code and temporal debugging of core RTOS components, drivers and real-time applications - Real-time related extensions to development environments Abstract submission If you wish to present a paper at the workshop, please submit an abstract using the submission page at https://www.osadl.org/RTLWS13-Abstract.submission-form.0.html. Final paper to be included into the RTLWS13 Proceedings Upon acceptance of an abstract by the RTLWS13 Program Committee, the author will be invited to submit a full paper in a form defined by https://www.osadl.org/paper.tgz. A detailed description of the editing and formatting process will be provided along with the notification email. Important dates - Release of this Call for Papers on February 22, 2011 - Second Call for Papers on May 3, 2011 - Third Call for Papers on May 31, 2011 - Deadline for abstract submission on June 13, 2011 - Notification upon acceptance by July 8, 2011 - Paper submission deadline on September 5, 2011 - RTLWS13 from October 20 to 22, 2011 - LinuxCon Europe in Prague from October 26 to 28, 2011 - Embedded Linux Conference (ELC) Europe in Prague from October 26 to 28, 2011 For more information about the Czech Technical University in Prague, the organizers and the members of the program committee, please refer to the RTLWS13 Homepage at osadl.org/RTLWS. The Organization committee Local staff at the Czech Technical University Prague - Michal Sojka (Faculty of Electrical Engineering, Department of Control Engineering) - Pavel Pisa (Faculty of Electrical Engineering, Department of Control Engineering) - Petr Hodac (SUT - Stredisko un*xovych technologii, UN*X Technologies Center) Real-Time Linux Foundation Working Group and OSADL - Nicholas Mc Guire (Distributed and Embedded Systems Lab, Lanzhou University, China) - Qingguo Zhou (Distributed and Embedded Systems Lab, Lanzhou University, China) - Andreas Platschek (Opentech, Austria) - Carsten Emde (OSADL, Germany)

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A few general questions about L4
by Maciej Katafiasz 22 Feb '11

22 Feb '11

Hello, I'm currently investigating L4 as the platform on which to base an OS I'm considering writing, and for this reason I have several more or less specific questions to help me get oriented in the whole L4 ecosystem. As a matter of introduction, the OS I have in mind is a modern incarnation of a Lisp Machine (http://en.wikipedia.org/wiki/Lisp_machine) attempting to marry the good parts of LispM's such as hackability and the ability to inspect and touch the OS on any level, without their problems (such as the great ease of _crashing_ the OS by mistake, and their inherent lack of security and compartmentalisation). The OS is intended to be practical, and I'm greatly interested in preserving compatibility with existing software, and the ability to mix Lisp apps with C libraries and vice-versa. The practicality requirement also means that I want to avoid writing everything I can avoid writing, in particular drivers. With this being said, here are my initial questions: * Which implementations are currently considered active and sufficient for basing new efforts on? I know Fiasco.OC, seL4, OKL4 and L4Ka. Out of these, seL4 and OKL4 are closed-source and proprietary, thus not really suitable for my needs. Fiasco.OC seems active, L4Ka somewhat less so, with last full release from 2004 (although the last commit to Hg seems to be from 2 months ago). * Furthermore, Fiasco.OC includes, from what I understand, a capability security model, which'd probably be handy for my purposes. However, I can find no documentation on this model. Are there any docs I'm missing? That actually holds for L4 in general as well as Fiasco, the only thing I could find is the X.2 API reference manual, and the very incomplete user manual. Are there any more complete versions of the user manual or other documents explaining the whys of L4, not just hows? * On the other hand, L4Ka has existing projects such as driver virtualisation, which are of great interest to me, as mentioned in the introduction. Thus I'd like to know how compatible in practice the different L4 implementations are. If I took the code from L4Ka's Afterburner, is it at all possible to run it on top of Fiasco, or would I have to rewrite it? Similarly, would it be possible to port NICTA's L4/Darwin IOKit compatibility layer to another L4, or is it tied to the specific implementation of L4 from NICTA? * Since I want to preserve the compatibility with existing environments such as POSIX and/or Win32, I'd like to know if anybody has done any practical research into running multiple OS personalities on top of a microkernel such as L4. I'd be extremely grateful for any links and/or advice regarding running personalities, as well as mixing code operating within the different subsystems. * Lastly, I'd like to know if there's any reasonably-populated IRC channel dedicated to L4. Since I'm still very much exploring the problem space more than the solution space, I appreciate the interactive nature of IRC, which helps me formulate questions I might not even know I have yet. I've found one old mail asking about IRC previously, with Adam's reply pointing to his personal homepage, but I still wasn't able to find any L4 channels that way. Cheers, Maciej Katafiasz

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Fiasco-oc l4linux
by David Leimbach 18 Feb '11

18 Feb '11

Hi Using the latest snapshot, and kind of lost on how to get l4linux to actually build. I did get python running with mag in vmware however, so I've got a little experience. Just not sure what the right way to do this is. My obj/l4linux directory is empty. Any thoughts what I should try? I used "make setup". Then "make" which died for some reason. So i went into obj/l4.../pkg and did "make all". The top level make now completes. Sent from my iPhone

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which is faster an ipc or a function call
by Jason Philip 17 Feb '11

17 Feb '11

I suspect that function call will faster but is this really so? And how faster will it be, it noticeable?

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[ANNOUNCE] NOVA Microhypervisor 0.3 prerelease
by Udo A. Steinberg 17 Feb '11

17 Feb '11

Hi, The NOVA project is happy to announce that there is a new prerelease of the NOVA microhypervisor available for download at http://www.hypervisor.org/ or http://os.inf.tu-dresden.de/~us15/nova/ under the terms of the GNU General Public License version 2. NOVA is based on a modern microhypervisor written in C++ and assembler. The current implementation runs on multi-core x86 machines that support ACPI, under QEMU (including VM support), and as a microkernel in a virtual machine on top of itself. NOVA makes use of hardware virtualization features such as Intel VT-x/VT-d or AMD-V, and facilitates running unmodified guest operating systems in virtual machines with near-native performance. The new release brings virtual-machine support to QEMU and older AMD CPUs, both of which lack nested paging. Furthermore, the microhypervisor can now translate related capabilities during message passing. Cheers, - Udo

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MP Fiasco.UX
by Daniel Waddington - SISA 15 Feb '11

15 Feb '11

Hi, This may be a silly question, but can Fiasco.UX support multi-processing (i.e. SMP)? When I use JDB in Fiasco.UX I can only get one CPU even with MP configured in the kernel build. Thanks Daniel

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build errors in fiasco kernel contained in l4re-core-2011021416 with JDB disabled
by Christoph Szeppek 15 Feb '11

15 Feb '11

Hi, when trying to build the kernel contained in l4re-core-2011021416 (from download page) with JDB disabled, I receive the following error messages: /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/space.cpp: In static member function ‘static void* Space::Ku_mem::operator new(size_t, Ram_quota*)’: /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/space.cpp:83: error: invalid use of undefined type ‘struct slab_cache_anon’ /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/ram_quota.cpp:5: error: forward declaration of ‘struct slab_cache_anon’ /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/space.cpp: In member function ‘void Space::Ku_mem::free(Ram_quota*)’: /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/space.cpp:86: error: invalid use of undefined type ‘struct slab_cache_anon’ /prefix/l4re-core-2011021416/src/kernel/fiasco/src/kern/ram_quota.cpp:5: error: forward declaration of ‘struct slab_cache_anon’ This happens for ia32 pentium pro and arm integrator platform. With JDB enabled, both builds succeed. Christoph

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None
by sasamy 14 Feb '11

14 Feb '11

Hello. I can not run fiasco kernel, version l4re-core-2011020417 # qemu-system-arm -kernel /home/sasa/fiasco/l4re-core-2011020417/src/l4/build/images/bootstrap.elf -serial stdio -m 256 L4 Bootstrapper Build: #2 Sun Feb 13 15:58:18 MSK 2011, 4.3.3 Scanning up to 256 MB RAM Memory size is 256MB (00000000 - 10000000) RAM: 0000000000000000 - 000000000fffffff: 262144kB Total RAM: 256MB mod04: 010d4000-010f5ad8: hello mod03: 010b2000-010d3ba0: l4re mod02: 01071000-010b16a4: moe mod01: 0105f000-01070538: sigma0 mod00: 01013000-0105e8e4: fiasco Moving 5 modules to 1100000 with offset ed000 moving module 05 { 10d4000-10f5ad8 } -> { 11c1000-11e2ad8 } moving module 04 { 10b2000-10d3ba0 } -> { 119f000-11c0ba0 } moving module 03 { 1071000-10b16a4 } -> { 115e000-119e6a4 } moving module 02 { 105f000-1070538 } -> { 114c000-115d538 } moving module 01 { 1013000-105e8e4 } -> { 1100000-114b8e4 } Scanning fiasco Scanning sigma0 Scanning moe --init=rom/hello Relocated mbi to [0x100e000-0x100e0d6] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x2000 Regions of list regions [ 1000, 19bf] { 9c0} Kern fiasco [ 2000, 5cfff] { 5b000} Kern fiasco [ 90000, 9d193] { d194} Sigma0 sigma0 [ 140000, 18e2db] { 4e2dc} Root moe [ 1000000, 10123eb] { 123ec} Boot bootstrap [ 100e000, 100e1d3] { 1d4} Root Multiboot info [ 119f000, 11e2ad7] { 43ad8} Root Modules Memory API Version: (87) experimental Sigma0 config ip:00090000 sp:0100d744 Roottask config ip:00140120 sp:00000000 Starting kernel fiasco at 00001000 Cache config: ON Hello from Startup::stage2 Initialize page table Vmem_alloc::init() Vmem_alloc::TEST allocate zero-filled page... [0xefc01000] done free zero-filled page... done allocate no-zero-filled page... [0xefc02000] done free no-zero-filled page... done SERIAL ESC: allocated IRQ 1 for serial uart Not using serial hack in slow timer handler. Panic: __div0 Press any key to reboot. I have no experience, I'm not sure that everything is done correctly. #make qemu E=hello O=`pwd`/build MODULE_SEARCH_PATH=/tmp:/home/sasa/fiasco/l4re-core-2011020417/src/kernel/fiasco/build MODULES_LIST=/home/sasa/fiasco/l4re-core-2011020417/src/l4/conf/modules.list I tried to run on a real processor at91sam9m10 and got the same result (I think I wrote all the minimum necessary modules for it) Start SD card AT91Bootstrap... Image size: 0xf6000, load_addr: 0x71000000, ep: 0x71000000 relocating image to proper address, dst: 0x71000000, src: 0x72000040, len: 0xf6000 L4 Bootstrapper Build: #3 Sun Feb 13 14:10:12 MSK 2011, 4.3.3 Scanning up to 64 MB RAM Memory size is 64MB (70000000 - 74000000) RAM: 0000000070000000 - 0000000073ffffff: 65536kB Total RAM: 64MB mod04: 710d4000-710f5ad8: hello mod03: 710b2000-710d3ba0: l4re mod02: 71071000-710b16a4: moe mod01: 7105f000-71070538: sigma0 mod00: 71013000-7105e724: fiasco Moving 5 modules to 71100000 with offset ed000 moving module 05 { 710d4000-710f5ad8 } -> { 711c1000-711e2ad8 } moving module 04 { 710b2000-710d3ba0 } -> { 7119f000-711c0ba0 } moving module 03 { 71071000-710b16a4 } -> { 7115e000-7119e6a4 } moving module 02 { 7105f000-71070538 } -> { 7114c000-7115d538 } moving module 01 { 71013000-7105e724 } -> { 71100000-7114b724 } Scanning fiasco Scanning sigma0 Scanning moe --init=rom/hello Relocated mbi to [0x7100e000-0x7100e0d6] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x70002000 Regions of list regions [ 70001000, 7000193f] { 940} Kern fiasco [ 70002000, 7005cfff] { 5b000} Kern fiasco [ 70090000, 7009d193] { d194} Sigma0 sigma0 [ 70140000, 7018e2db] { 4e2dc} Root moe [ 71000000, 710123eb] { 123ec} Boot bootstrap [ 7100e000, 7100e1d3] { 1d4} Root Multiboot info [ 7119f000, 711e2ad7] { 43ad8} Root Modules Memory API Version: (87) experimental Sigma0 config ip:70090000 sp:7100d744 Roottask config ip:70140120 sp:00000000 Starting kernel fiasco at 70001000 Cache config: ON Hello from Startup::stage2 Initialize page table Vmem_alloc::init() SERIAL ESC: allocated IRQ 1 for serial uart Not using serial hack in slow timer handler. Panic: __div0 Press any key to reboot.

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can't interface I/O address Space
by Jason Philip 06 Feb '11

06 Feb '11

I writing small program to run on top the microkernel, but, I not sure how to interface the I/O space. I acquire I/O space using "L4_IoFpage()" call, but when I attempt interface it do not work. I try use pointer to I/O locations, but I not sure if this is a correct method. Can somebody tell me what is a correct method?

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Fiasco.OC IPC performance
by Chen Tian 06 Feb '11

06 Feb '11

Hello, I am trying to compare the IPC performance between Pistachio and Fiasco.OC. I found the performances are almost the same for the Pingpong benchmark (I modified the one in Pistachio so that it can run with Fiasco.OC as well). I notice that if I turn off "tracebuffer" and "perfmon counter" switches when compiling Pistachio kernel, the IPC of Pistachio is much faster -- about 150x speedup for Pingpong! I tried to do the same thing for Fiasco.OC by turning off debugging related switches. However, I was not able to observe any performance improvement. I wonder if what config options that can dramatically affect the IPC performance for Fiasco.OC. Also, I will appreciate it if anyone could explain to me the major IPC implementation differences. Thanks, Chen

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Can't access memory region
by Jason Philip 03 Feb '11

03 Feb '11

I need to have access to the VGA port and register. The register I need access in the range of 0x300 to 0x400 so I try getting a 1KB page from 300 onward, but it do not work. I suspect it do not work because it is I/O FPage and they have to align to (in this case 1kB) address. Could anyone help me access these port?

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Questions on implementation details of capabilities
by Christoph Szeppek 03 Feb '11

03 Feb '11

Hello! I try to understand how capabilities are enforced by the Fiasco.OC kernel. From what I think I understood, capabilities are created in the kernel space area of an address space (which is the same in every address space) at Config::Caps_start. Each cap is identified by an index in this area and holds a reference to an object of type kobject_iface in its _obj attribute. This is the object this cap is controlling access to. Now I've got a few questions about further details. Where does the translation from address space local to kernel global cap id happen? How does the kernel know threads of which space are allowed to access which cap (mapdb?)? When a thread sends IPC, in which place of the kernel code do these caps get enforced / checked? BR, Christoph

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Fiasco.OC internals
by Amadeo Cuadrado 03 Feb '11

03 Feb '11

Hello, My apologies if this question has been asked before in this list. What would be the most accurate doc that explains in detail the design and implementation of Fiasco.OC internals? Thanks in advance. Amadeo

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Public release of seL4
by Gernot Heiser 02 Feb '11

02 Feb '11

NICTA and Open Kernel Labs have jointly released seL4. For those not aware of seL4, it is an L4 microkernel which is formally verified (meaning that the implementation is mathematically proven to conform to the specification). It is the world's first (and only) OS kernel that is formally verified in this strict sense. The public release includes the formal specification of the kernel (ARM version), kernel binaries for x86 and ARM, and a para-virtualized Linux running on top of seL4/x86. More about seL4: http://ertos.nicta.com.au/research/sel4/ NICTA download site: http://ertos.nicta.com.au/software/seL4/home.pyl Gernot

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Fiasco Kernel extended V2 API vs. Pistachio X2 API
by Daniel Waddington - SISA 27 Jan '11

27 Jan '11

Hi, Can someone briefly explain the basic differences between the current Fiasco kernel API and the Pistachio X2 API? Thanks Daniel Waddington

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I cannot for the life of me compile l4linux
by Daniel F. Haaland 27 Jan '11

27 Jan '11

l4re and fiasco seem to be working just fine (tested by running the hello world in qemu), but trying to add l4linux on top of l4re has caused me a lot of grief and the following error message: Getting required compilation flags failed. L4OBJ: /home/drxl/l4stuff/builddirs/L4Re-R27MP L4_REQUIRED_MODS: stdlibs log l4re_c-util libio shmc /home/drxl/l4stuff/src/l4linux/arch/l4/Makefile:301: *** Aborting.. Stop. make: *** [sub-make] Error 2 zsh: exit 2 make O=$MY_L4LINUX_OBJDIR I've detailed how I got to that point in painstaking detail here: http://blog.fairchild.dk/notes/2011/01/25/getting-l4linux-up-and-running/ In short I've begged, bargained and even resorted to shell-foo like: find . -type f -name 'Makefile' -exec grep -Hn REQUIRE {} \; |\ sed -e 's,$.*$\\$,\1,g' -e 's,^.*=$.*$$,\1,g' | sed -n 'H;${g;s/\n//gp}'| \ sed -e 's,[ ]*$[^ ]*$,\1\n,g' | sort -u | uniq | xargs -I ® svn update ® in the l4/pkg dir, to try and fix any unmet dependencies, but to no avail. So I guess I wouldn't mind a little help at this point. best regards Daniel

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Processor compatibility
by Jason Philip 26 Jan '11

26 Jan '11

Is Pistachio compatible with Intel Celeron processor?

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PCI Bus access
by Jason Philip 25 Jan '11

25 Jan '11

I am planning to interfacing the PCI bus using L4, however, I do not quite know how PCI interface works. I know that there is three memory region: configuration space, I/O space and Memory space, and that configuration space is use to detect and configure the device, but I do not know where any of this space are located and the protocol for interfacing them. Please help.

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Privilege threads
by Jason Philip 24 Jan '11

24 Jan '11

how do you create privileged threads?

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PingPong not working
by Jason Philip 23 Jan '11

23 Jan '11

I tried to build kernel and user level applications, but them don't work. When I boot the kernel using QEMU it tell me "loading kernel" but never go further. I try use user level application from earlier version and they work but I can't get my own build to work, why this happening?

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Issue with building L4RE:multiple definition error
by WangKevis 21 Jan '11

21 Jan '11

Hi, when I was doing the building of L4RE as the building instructions, the follwing problems hit me: make[4]: Entering directory `/home/kaikai/embedded/obj/tuduos/pkg/lua/interpr/OBJ-x86_586-l4f' ... Compiling interpr.o ==> Linking lua /home/kaikai/embedded/obj/tuduos/lib/x86_586/l4f/libl4re-vfs.o.a: In function `__L4_STACK_ADDR__': (*ABS*+0xb0000000): multiple definition of `__L4_STACK_ADDR__' /home/kaikai/embedded/obj/tuduos/lib/x86_586/l4f/libl4re-vfs.o.a: In function `__L4_KIP_ADDR__': (*ABS*+0xaffff000): multiple definition of `__L4_KIP_ADDR__' make[4]: *** [lua] Error 1 make[4]: Leaving directory `/home/kaikai/embedded/obj/tuduos/pkg/lua/interpr/OBJ-x86_586-l4f' make[3]: *** [/home/kaikai/embedded/obj/tuduos/pkg/lua/interpr/OBJ-x86_586-l4f] Error 2 make[3]: Leaving directory `/home/kaikai/embedded/mybuild/src/l4/pkg/lua/interpr' make[2]: *** [interpr] Error 2 王凯凯

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problem building L4Linux, comments welcome
by eric van tassell 19 Jan '11

19 Jan '11

I was endeavoring to follow http://wiki.tudos.org/Quickstart. Below's the tail of the build log. Thanks for any suggestions. L4 source directory: /home/evt/wrk/L4/TUD/forest1/src/l4 PWD=/home/evt/wrk/L4/TUD/forest1/src/l4 make -C /home/evt/wrk/L4/TUD/forest1/src/l4 -f /home/evt/wrk/L4/TUD/forest1/src/l4linux/arch/l4/Makefile.l4conf O=/home/evt/wrk/L4/TUD/forest1/src/l4/out L4X_LOOP_CHECK=1 OUTPUT=/home/evt/wrk/L4/TUD/forest1/src/l4linux/out/Makeconf.l4conf GEN /home/evt/wrk/L4/TUD/forest1/src/l4linux/out/Makeconf.l4conf GEN /home/evt/wrk/L4/TUD/forest1/src/l4linux/out/Makefile scripts/kconfig/conf --silentoldconfig arch/l4/Kconfig Getting required compilation flags failed. L4OBJ: /home/evt/wrk/L4/TUD/forest1/src/l4/out L4_REQUIRED_MODS: stdlibs log l4re_c-util libio shmc rtc /home/evt/wrk/L4/TUD/forest1/src/l4linux/arch/l4/Makefile:301: *** Aborting.. -- - evt (Eric van Tassell) twitter: evt_texelsoft linked-in: linkedin.com/in/evttxl

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