Thank you for the help in my last email. I want to continue the question from my last email.
1. I want to QEMU to accept input from keyboard to emulate and study how to use an configure of IO. I study this as a part of my main goal to access GPIOs of Pandaboard. Well, in my last email i stated that i already include x86-legacy.devs module in modules.list, and define REQUIRES_LIBS=libc_be_file_stdin, and using "default-kernel fiasco -serial_esc" defined. But, it still not respond to any of my keyboard input. So, what did i miss?
2. I have modified omap3 driver that included in the package to be used with omap4460 registers, but i have a few difficulties. There are few missing registers (like Clr_irq_enable1 register that not present in OMAP4460) and i am still cannot comprehend the scm_offset table. Because when i crossreferencing the source with the OMAP3 TRM the i cannot understand the value. My question is. Is it be able to use only some of the defined register to do simple IO task, and enable or disable register ?
Below, i paste the link source :
Thank you for any suggestion and answer
2014-12-05 18:00 GMT+07:00 l4-hackers-request@os.inf.tu-dresden.de:
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Today's Topics:
- Re: L4Re GPIO (Adam Lackorzynski)
- Re: JDB percent CPU usage (Adam Lackorzynski)
Message: 1 Date: Thu, 4 Dec 2014 23:53:01 +0100 From: Adam Lackorzynski adam@os.inf.tu-dresden.de To: l4-hackers@os.inf.tu-dresden.de Subject: Re: L4Re GPIO Message-ID: 20141204225301.GA4644@os.inf.tu-dresden.de Content-Type: text/plain; charset=iso-8859-1
Hi,
On Thu Dec 04, 2014 at 14:57:14 +0700, Erry Pradana Darajati wrote:
I have some follow up question from my last email.
- About GPIO. So IOs defined on LUA script. So in OMAP4460, is gonna be
like this, isn't it ?
Principally yes.
I have a question in line of this code.
GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap46x_chip(function( ) hid = "gpio-omap46x-GPIO1"; compatible = {"ti,omap4-gpio"}; regs = Res.mmio(0x4A310000, 0x4A310194); // This one is range of Address GPIO1 used
Yes.
irq = Res.irq(29); //This one is IRQ of GPIO1 ? What is the meaning
of irq(29) ?
This is the IRQ number for the GPIO chip. The driver in IO will then generate IRQs for the specific pins by reading hardware registers of the GPIO chip.
scm_table = 0; // I still don't understand about this line
This selects the specific GPIO block. It is a driver-internal selection.
end);
end);
And where can i read the reference about another parameters of this ?
(Like
there pins parameter in raspi b. And there are mems instead of regs)
The specific ones are driver specific so you should check the driver in io (pkg/io/server/src/drivers/gpio/*).
I guess a driver for the 4460 won't be so different from the omap3 one so maybe it can be modified.
- I try the L4Re with x86 build run in QEMU. And want it to accept my
keyboard input. So i need to include x86-legacy.devs module in
modules.list
and define REQUIRES_LIBS=libc_be_file_stdin isn't it ? But after i've done it, it still doesn't accept keyboard input. what did
i
miss ?
For what purpose do you want it to accept input? Maybe just a missing -serial_esc option on Fiasco's command line?
Adam
Adam adam@os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/
Message: 2 Date: Thu, 4 Dec 2014 23:57:32 +0100 From: Adam Lackorzynski adam@os.inf.tu-dresden.de To: l4-hackers@os.inf.tu-dresden.de Subject: Re: JDB percent CPU usage Message-ID: 20141204225732.GB4644@os.inf.tu-dresden.de Content-Type: text/plain; charset=iso-8859-1
Hi jason,
On Wed Dec 03, 2014 at 20:11:03 -0500, teclis High Elf wrote:
Is there a way to get percent CPU usage (or any other resource usage )
from
JDB? So if I suspect that one task has run amok and is monopolizing the
CPU
I can search for it using JDB.
CPU usage is not directly possible with jdb as jdb only has a current view with the system being stopped. What usually works quite ok is to check for 'ready' threads (with 'lp' jdb command) a couple of times and see if one or some are ready besides the kernel idle threads all the time.
Adam
Adam adam@os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/
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On Tue Dec 16, 2014 at 16:01:02 +0700, Erry Pradana Darajati wrote:
- I want to QEMU to accept input from keyboard to emulate and study how to
use an configure of IO. I study this as a part of my main goal to access GPIOs of Pandaboard. Well, in my last email i stated that i already include x86-legacy.devs module in modules.list, and define REQUIRES_LIBS=libc_be_file_stdin, and using "default-kernel fiasco -serial_esc" defined. But, it still not respond to any of my keyboard input. So, what did i miss?
The x86-legacy.devs is for x86-based platforms. The pandaboard is ARM based, so you do not need that file there. Also, the input here is also based on the UART that is driven by the kernel, so there's no driver necessary in user-land here. As already questioned in the other mail, how are you trying to get the input in your program?
- I have modified omap3 driver that included in the package to be used
with omap4460 registers, but i have a few difficulties. There are few missing registers (like Clr_irq_enable1 register that not present in OMAP4460) and i am still cannot comprehend the scm_offset table. Because when i crossreferencing the source with the OMAP3 TRM the i cannot understand the value. My question is. Is it be able to use only some of the defined register to do simple IO task, and enable or disable register ?
I've not written the particular code, but the scm_offset seems to select a specific gpio block. For starting to work on a driver I recommend to start with a simple program and directly work on the MMIO. This helps to understand how the device is working. When basic things work, such as switching pins on/off, settings directions, interrupts, etc things can be integrated.
Adam
On 12/21/2014 11:36 PM, Adam Lackorzynski wrote:
On Tue Dec 16, 2014 at 16:01:02 +0700, Erry Pradana Darajati wrote:
[...]
- I have modified omap3 driver that included in the package to be used
with omap4460 registers, but i have a few difficulties. There are few missing registers (like Clr_irq_enable1 register that not present in OMAP4460) and i am still cannot comprehend the scm_offset table. Because when i crossreferencing the source with the OMAP3 TRM the i cannot understand the value. My question is. Is it be able to use only some of the defined register to do simple IO task, and enable or disable register ?
I've not written the particular code, but the scm_offset seems to select a specific gpio block. For starting to work on a driver I recommend to start with a simple program and directly work on the MMIO. This helps to understand how the device is working. When basic things work, such as switching pins on/off, settings directions, interrupts, etc things can be integrated.
On Omap3/4 the pin function and the pull-up-down mode is configured via the System Control Module (scm). There is a 16-bit register for each pin but unfortunately these registers are not in a particular order. So we need an offset table to find the correct register for each pin. The corresponding part for each GPIO chip of the offset table is specified via the 'scm_offset' parameter.
Matthias.
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