March 2015 - l4-hackers - example.com Site

Graphical desktop, l4con, mag
by teclis High Elf 02 Jun '17

02 Jun '17

Guten Tag, I've got the Hello app runing with fiasco and l4re in qemu, how do I get the graphical UI and console running that I see on the screen shots page? Do I need to use l4con and mag? I don't see an entry with l4con in modules.list. danke * <http://german.about.com/library/media/Audio/gutentag.wav>*

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libfs/ FUSE on L4Re
by Stark, Josef 31 May '17

31 May '17

Hello, yesterday I came across a very interesting paper titled "Porting FUSE to L4Re", accessible here: http://os.inf.tu-dresden.de/papers_ps/pester-beleg.pdf For porting FUSE, the author uses a library called "libfs" which provides filesystem request forwarding and processing, if I understood correctly. It reads as if libfs is already included in L4Re. However, I couldn't find neither FUSE nor libfs in the current L4Re snapshot. Are they by any chance publicly available somewhere else, or are both not to be published? Cheers, Josef

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TrustZone example on i.MX6
by Markku Ahvenjärvi 07 Jul '15

07 Jul '15

Hello hackers, I'm trying to run Fiasco.OC in secure world and Linux in non-secure world on i.MX6Q. For this I'm using the TrustZone example (pkg/examples/sys/vm-tz). To secure world I have given 128MB RAM starting from 0x10000000 and I modified the example to give NS world 256MB starting from 0x20000000. I've replaced atags with dtb of my board and it is copied to NS side like kernel and initrd. At first I encountered runtime exception, which I fixed by implementing following to arm_em_tz builds Thread::arch_ext_vcpu_enabled() { return true; } Now I'm having problems at early stages of NS boot, where Linux kernel is checking for the dtb magic. The code loads the dtb magic from the address I'm giving in r2 register (0x21000000), but the magic value usually have one byte or all of them incorrect. I've used JDB to dump the area of dtb after hitting that error and it shows the dtb magic properly. So for some reason the NS-world gets mangled value. Any idea what might be causing this? Thanks, Markku

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Experimenting the vm-tz example on the Freescale i.mx6 SDB
by Mahdi Aichouch 04 May '15

04 May '15

Hello, I am trying to experiment the "vm-tz" example on the Freescale i.mx6 SDB board. At first, my goal is to understand the example, thus I am interested in running a simple test kernel instead of a full linux kernel. Specifically, I am trying to reproduce the experimentation of the article related to the trustzone implementation on Fiasco.OC L4re, "ARM Trustzone as a Virtualization Technique in Embedded Systems". In particular, it is mentioned in the article at the "Implementation" paragraph that "Multiplexing two or more OS is supported by our design." I would like to investigate this point. I created a new entry to generate the vm-tz binary. I added the following entry to the "src/l4/conf/modules.list" file : entry tz_vm roottask moe --init=rom/vm-tz module l4re module vm-tz Is my configuration entry correct, is there any missing modules that are required by the example? I tested the binary on the board using tftp, and I obtained the following results: L4 Bootstrapper Build: #12 Tue Mar 17 12:10:02 CET 2015, 4.8.3 20140320 (prerelease) Scanning up to 1024 MB RAM, starting at offset 32MB Memory size is 1024MB (10000000 - 4fffffff) RAM: 0000000010000000 - 000000004fffffff: 1048576kB Total RAM: 1024MB Scanning fiasco Scanning sigma0 Scanning moe Moving up to 5 modules behind 11100000 moving module 02 { 110a5000-110de63f } -> { 11195000-111ce63f } [235072] moving module 01 { 1109b000-110a438b } -> { 1118b000-1119438b } [37772] moving module 00 { 11044000-1109a0c7 } -> { 11134000-1118a0c7 } [352456] moving module 04 { 1102a000-11043597 } -> { 1111a000-11133597 } [103832] moving module 03 { 11010000-11029473 } -> { 11100000-11119473 } [103540] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x10002000 Regions of list 'regions' [ 10000000, 100000e3] { e4} Root mbi_rt [ 10001000, 10001aff] { b00} Kern fiasco [ 10002000, 10062fff] { 61000} Kern fiasco [ 10090000, 10096edf] { 6ee0} Sigma0 sigma0 [ 10098000, 1009e177] { 6178} Sigma0 sigma0 [ 10140000, 10171d77] { 31d78} Root moe [ 10178000, 101934ab] { 1b4ac} Root moe [ 11000000, 1100f4ff] { f500} Boot bootstrap [ 11100000, 11133fff] { 34000} Root Module API Version: (87) experimental Sigma0 config ip:10090100 sp:00000000 Roottask config ip:10140260 sp:00000000 Starting kernel fiasco at 100012c8 Number of IRQs available at this GIC: 160 FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl L2: ID=410000c7 Type=9e340340 Aux=02070000 WMask=ffff S=0 L2: Type L2C-310 Size = 1024kB Ways=16 Waysize=64 SERIAL ESC: allocated IRQ 58 for serial uart Not using serial hack in slow timer handler. Welcome to Fiasco.OC (arm)! L4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden Rev: rexported compiled with gcc 4.8.3 for i.MX6 [] Build: #3 Wed Mar 11 16:43:41 CET 2015 Calibrating timer loop... done. MDB: use page size: 20 MDB: use page size: 12 SIGMA0: Hello! KIP @ 10002000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [4:10000000;10000fff] [0:10063000;1008ffff] [0:10097000;10097fff] [0:1009f000;1013ffff] [4:10140000;10171fff] [0:10172000;10177fff] [4:10178000;10193fff] [0:10194000;110fffff] [4:11100000;11133fff] [0:11134000;4effffff] IOMEM:---------------------- [0:0;fffffff] [0:50000000;ffffffff] MOE: Hello world MOE: found 1031220 KByte free memory MOE: found RAM from 10000000 to 4f000000 MOE: allocated 1008 KByte for the page array @0x10194000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [11100000-11119474] [C:503000] l4re BOOTFS: [1111a000-11133598] [C:504000] vm-tz MOE: cmdline: moe --init=rom/vm-tz MOE: Starting: rom/vm-tz MOE: loading 'rom/vm-tz' Vmm started terminate called after throwing an instance of 'N2L413Runtime_errorE' MOE: task 270000679 exited with 127 The code stops at the beginning when it tries to create a VM : L4Re::chksys(env->factory()->create_vm(vm)); After reading through the code, I saw that the code example is expecting a linux-image and an initrd to be provided. Is it possible to tell me where these should be added in the build directory? In my test case, the linux-image will be replaced by a simple kernel image. Could someone help me to correct my test case. Many thanks in advance. Best regards, Mahdi

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Re: ARM with Qemu
by Nicolas VARONA 09 Apr '15

09 Apr '15

Hi, Thanks for your answer and your help. >Could also be the uart issue? But entering jdb always works for me. Even if I can't give inputs to the bare metal application on Qemu, I can also enter into the JDB. Is that mean that all interruptions are well handled? So the uart issue seems more probable. >Which kind of panic? I firstly tested my L4linux on Qemu for the Zinq board and the boot finishes well (with the problem of inputs that I told you before). Nonetheless, with the same image on the board, I have this message: [...] Freeing unused kernel memory: 116K (0230f000 - 0232c000) potentially unexpected fatal signal 11. CPU: 0 PID: 1 Comm: init Not tainted 3.16.0-l4 #152 task: 05c23ac0 ti: 05c26000 task.ti: 05c26000 PC is at 0x0 LR is at 0x0 pc : [<00000000>] lr : [<00000000>] psr: 60000010 sp : bf73cef0 ip : 00000000 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : 00000000 r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000 r3 : 0000c50c r2 : 00000000 r1 : 00000000 r0 : 00000000 vcpu: b3000c00 vcpu-state: 00000001 Flags: nZCv IRQs on FIQs on Mode USER_32 ISA ARM Segment user CPU: 0 PID: 1 Comm: init Not tainted 3.16.0-l4 #152 [<0200c9c8>] (unwind_backtrace) from [<020055e8>] (show_stack+0x10/0x14) [<020055e8>] (show_stack) from [<0202844c>] (get_signal_to_deliver+0x204/0x490) [<0202844c>] (get_signal_to_deliver) from [<02006be8>] (do_signal+0x114/0x448) [<02006be8>] (do_signal) from [<0200a210>] (l4x_vcpu_entry_c+0xa94/0x1da8) [<0200a210>] (l4x_vcpu_entry_c) from [<00000000>] ( (null)) Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b CPU: 0 PID: 1 Comm: init Not tainted 3.16.0-l4 #152 [<0200c9c8>] (unwind_backtrace) from [<020055e8>] (show_stack+0x10/0x14) [<020055e8>] (show_stack) from [<022441a4>] (panic+0x7c/0x1e0) [<022441a4>] (panic) from [<0201e6a8>] (do_exit+0x708/0x7a0) [<0201e6a8>] (do_exit) from [<0201e80c>] (do_group_exit+0x3c/0x9c) [<0201e80c>] (do_group_exit) from [<02028390>] (get_signal_to_deliver+0x148/0x490) [<02028390>] (get_signal_to_deliver) from [<02006be8>] (do_signal+0x114/0x448) [<02006be8>] (do_signal) from [<0200a210>] (l4x_vcpu_entry_c+0xa94/0x1da8) [<0200a210>] (l4x_vcpu_entry_c) from [<00000000>] ( (null)) ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b panic: going to sleep forever, bye l4linux | panic: going to sleep forever, bye Thanks in advance for your help, Nicolas >Hi, > >On Mon Mar 02, 2015 at 15:10:04 +0100, Nicolas VARONA wrote: >> I am trying to set up a simulator with Qemu and l4linux ARM to >> simulate the Zynq board. I have successfully compiled Fiasco and L4 >> with the tool chain "arm-linux-gnueabi-gcc". I succeeded to launch >> l4linux but I have no input on l4linux when it's running on Qemu. >> Nevertheless, the fiasco jdb can be invoked. After reading the mailing >> list I changed the hello world program to take inputs and tried a bare >> metal application with l4re with the same result (I didn't modify the >module list). >> >> So, I tried to do the same thing with the board and I have inputs with >> the l4 bare metal application > >So I looked a bit at this and it seems to me that there's something strange >with uart rx in Qemu, or at least which only shows up in Qemu. >I need to investigate that further. > >> and a kernel panic for the l4linux. > >Which kind of panic? > >> I boot >> with the uboot image on it. Nonetheless, using uImage for qemu doesn't >> change anything: >> >> ./qemu-system-arm -M arm-generic-fdt-plnx -m 512M -kernel >> /path/bootstrap.uimage -dtb /path/devicetree.dtb -serial mon:stdio >> >> I tried to compile the u-boot from Xilinx and Qemu freezes when I >> launch the l4 application. > >Could also be the uart issue? But entering jdb always works for me. > >> To be sure I have done things right, I also tried the modified hello >> world program on x86 intel and it works well. Then I launched a >> Petalinux with Qemu and a uImage with uboot and it works. >> >> My Qemu is from Xilinx: QEMU emulator version 2.0.50 > >Oh, good to know. I tried the normal one.

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Microkernel Meetup
by Björn Döbel 04 Apr '15

04 Apr '15

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi all, it is time for another Microkernel Meetup! As many regulars seem to be travelling mid/late April, I suggest we go to B'liebig, Liebigstraße 24 http://b-liebig.de/ either on April 7 or on April 9. Please participate in the Dudle so I can reserve a table: https://dudle.inf.tu-dresden.de/uks0415/ Also, please distribute this email to anyone you think might be interested in coming. Cheers, Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlUSfX0ACgkQP5ijxgQLUNmsjQCeP07bdeWG7cANxiaT2U1DqT+N 9+EAmQH4tcieJL4S1VAiOkOCJaGQqsJG =XTl6 -----END PGP SIGNATURE-----

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Fiasco testcase And L4RE API
by cui.yunfeng＠zte.com.cn 31 Mar '15

31 Mar '15

hi L4 hacker: I am learning Fiasco, there are some question about Fiasco and L4RE. Is there unit test case (such as TDD test case) on development of Fiasco? How to get the unit test case? Is there document about L4RE API interface? I want to compare the L4RE POSIX interface and Linux POSIX interface. Thanks a lot.

2 1

(no subject)
by zhou.li9＠zte.com.cn 31 Mar '15

31 Mar '15

Now I want to debug Fiasco.OC kernel with JDB, the version of Fiasco.OC is 2014092821. Mentioned in a jdb.pdf document section 4.14, need to use RMGR to load the symbol table, but I did not find any manpage on the RMGR. where is the manpage or how to load the symbol table? -------------------------------------------------------- ZTE Information Security Notice: The information contained in this mail (and any attachment transmitted herewith) is privileged and confidential and is intended for the exclusive use of the addressee(s). If you are not an intended recipient, any disclosure, reproduction, distribution or other dissemination or use of the information contained is strictly prohibited. If you have received this mail in error, please delete it and notify us immediately.

2 1

L4 and Lua interaction
by daniel krefft 30 Mar '15

30 Mar '15

Hi there, please can you give us a short overview about the L4 and Lua interaction/integration? The most important aspect is to understand how Lua-Scripts are used to create/manage the VBus. In particular from which module/component are the Lua-Scripts read/processed (NED, SIGMA0)? We found an example about Ankh (ankh.vbus, aw.lua, lwip.lua). Maybe it is possible to exemplify it via Ankh. Regards, Daniel -- Mit freundlichen Grüßen Daniel Krefft ***************************************************************** * Daniel Krefft M.Sc. * * T: +49-89-289-18791 * * * Technische Universitaet Muenchen * Fakultaet fuer Informatik - F13 (Prof. Baumgarten) * Boltzmannstr. 3 * D-85748 Garching bei Muenchen * Germany *****************************************************************

2 1

microkernel as an instance in oracle virtual box
by Gayathri Nagarajan 24 Mar '15

24 Mar '15

Is it possible to run the microkernel Fiasco.oc directly as an instance in Oracle virtual box (just like other operating systems like Ubuntu, windows etc that are executed) ? If so, how do I do it?

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