May 2016 - l4-hackers - example.com Site

Porting Fiasco + L4Re to Raspberry Pi 2
by Antoine DEBUT 26 Nov '17

26 Nov '17

Hello l4-hackers, I am currently working on porting the Fiasco.OC micro kernel onto the Raspberry pi 2. Therefore, I am struggling with memory mapping, and I encounter the following error when launching the default 'hello' entry: L4 Bootstrapper Build: #2 Tue Feb 23 11:57:19 CET 2016, 4.8.3 20140303 (prerelease) Scanning up to 1024 MB RAM, starting at offset 32MB Memory size is 1024MB (00000000 - 3fffffff) RAM: 0000000000000000 - 000000003fffffff: 1048576kB Total RAM: 1024MB Scanning fiasco Scanning sigma0 Scanning moe Moving up to 5 modules behind 1100000 moving module 02 { 10db000-110c4d7 } -> { 11cc000-11fd4d7 } [201944] moving module 01 { 10c9000-10da373 } -> { 11ba000-11cb373 } [70516] moving module 00 { 1043000-10c889f } -> { 1134000-11b989f } [546976] moving module 04 { 1029000-10425af } -> { 111a000-11335af } [103856] moving module 03 { 100f000-102849b } -> { 1100000-111949b } [103580] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x2000 Regions of list 'regions' [ 1000, 1aff] { b00} Kern fiasco [ 2000, 92fff] { 91000} Kern fiasco [ 93000, 930eb] { ec} Root mbi_rt [ c0000, c9c33] { 9c34} Sigma0 sigma0 [ d0000, d6177] { 6178} Sigma0 sigma0 [ 140000, 16905b] { 2905c} Root moe [ 170000, 17b58b] { b58c} Root moe [ 1000000, 100e4ff] { e500} Boot bootstrap [ 1100000, 1133fff] { 34000} Root Module API Version: (87) experimental Sigma0 config ip:000c0100 sp:00000000 Roottask config ip:00140250 sp:00000000 Starting kernel fiasco at 000012b8 Non-HYP kernel detected but running in HYP mode, switching back. Hello from Startup::stage2 Assertion failed at /home/adebut/Documents/snapshotTest/l4re-snapshot-2015123115/src/kernel/fiasco/src/kern/buddy_alloc.cpp:101: (unsigned long)block >= _base Press any key to reboot. I am currently working on the latest snapshot (2015123115), with U-Boot as a bootloader, and testing on a real board (Raspberry Pi 2 model B V1.1). The entry built is the standard 'hello', and I use the ramdisk-arm.rd given in the snapshot. I did add a custom Bsp for the board, mainly based on the first Raspberry Pi except for the Base Address, that is 0x3F000000 instead of the first Pi's 0x20000000. I highly think that it is an address configuration problem, because it first happened when I did expand the RAM size to 1024MB. With further investigation, I found out that it was the kernel memory allocation that causes this error, and suspect an incorrect MMU mapping. This suspicion comes from the fact that the assertion takes the address _base (0xf0400000) and the currently allocated block (0xee100000). I did not modify any parameter in the kern/arm/mem_layout-arm.cpp file on the Fiasco directory, which provides the default ARM addressing. Maybe that's where my error comes from ? How can I correctly configure my memory mapping, besides what I already configure in the Bsp (given in attachment) ? Also, it is the first time that I am assigned for porting a system, do you have some hints, like important steps to follow ? I am pretty sure it is a newbie error, but I cannot figure it out for now :( Thanks in advance for your time, -- Antoine Debut EPITA 2016 - GISTRE

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Graphical desktop, l4con, mag
by teclis High Elf 02 Jun '17

02 Jun '17

Guten Tag, I've got the Hello app runing with fiasco and l4re in qemu, how do I get the graphical UI and console running that I see on the screen shots page? Do I need to use l4con and mag? I don't see an entry with l4con in modules.list. danke * <http://german.about.com/library/media/Audio/gutentag.wav>*

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Benchmarks in l4
by Maxim Baryshnikov 01 Jun '17

01 Jun '17

Hello everybody, Does the L4re contain some kind of simple performance benchmarks which are already prepared to use? I've tried to launch some demos from the ferret package but not succeed... Thank you in advance for any suggestions. Sincerely, Maxim Baryshnikov.

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libfs/ FUSE on L4Re
by Stark, Josef 31 May '17

31 May '17

Hello, yesterday I came across a very interesting paper titled "Porting FUSE to L4Re", accessible here: http://os.inf.tu-dresden.de/papers_ps/pester-beleg.pdf For porting FUSE, the author uses a library called "libfs" which provides filesystem request forwarding and processing, if I understood correctly. It reads as if libfs is already included in L4Re. However, I couldn't find neither FUSE nor libfs in the current L4Re snapshot. Are they by any chance publicly available somewhere else, or are both not to be published? Cheers, Josef

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where can I download the previous version of L4linux?
by li94575 07 Jul '16

07 Jul '16

Hi, I want to use L4linux3.5 and L4linux3.10, but L4linux SVN repository and l4re-snapshot both are the latest release. Can anyone tell me where to download it? Thank you!

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Re: l4-hackers Digest, Vol 157, Issue 10
by Иван Филиппов 28 May '16

28 May '16

adam - maasdam ;-) 2016-05-28 13:00 GMT+03:00, l4-hackers-request(a)os.inf.tu-dresden.de <l4-hackers-request(a)os.inf.tu-dresden.de>: > Send l4-hackers mailing list submissions to > l4-hackers(a)os.inf.tu-dresden.de > > To subscribe or unsubscribe via the World Wide Web, visit > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > or, via email, send a message with subject or body 'help' to > l4-hackers-request(a)os.inf.tu-dresden.de > > You can reach the person managing the list at > l4-hackers-owner(a)os.inf.tu-dresden.de > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of l4-hackers digest..." > > > Today's Topics: > > 1. L4Re Release (Adam Lackorzynski) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Fri, 27 May 2016 13:13:04 +0200 > From: Adam Lackorzynski <adam(a)l4re.org> > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: L4Re Release > Message-ID: <20160527111304.GB12441(a)os.inf.tu-dresden.de> > Content-Type: text/plain; charset=iso-8859-1 > > Hi, > > I'm happy to announce a new L4Re release. > > https://l4re.org/ > > This release adds support for the Imagination Technologies' > MIPS architecture, including support for MIPS' > virtualization architecture VZ to run virtual machines such > as Linux. L4Re is currently available for MIPS32, > MIPS64 is about to follow. The MIPS port is supported by > Imagination Technologies. > > > Further noteworthy changes of this release include: > - L4Linux has been updated to L4Linux-4.6 > - Conversion of debugging interface to capability-based > interface. Programs need to have the 'jdb' capability to > use JDB functionality. > - The virtual machines monitor, now called uvmm, supports > the MIPS and ARM architectures. > - A virtio-based peer-to-peer network component is available > in virtio-net. > - Documentation improvements > - Library updates > - Added ARM platforms: > - NXP Layerscape LS1021A > - i.MX28 > - MIPS platforms: > - Malta > - Sead3 > - Ci20 > - Baikal-T > - Bug fixes and small feature enhancements in the kernel and user-level > components: > - Added atomic IRQ re-attach call > - The vCPU data structures have been revised > > > Adam > > > > ------------------------------ > > Subject: Digest Footer > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > > > ------------------------------ > > End of l4-hackers Digest, Vol 157, Issue 10 > ******************************************* > -- Иван Филиппов

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L4Re Release
by Adam Lackorzynski 27 May '16

27 May '16

Hi, I'm happy to announce a new L4Re release. https://l4re.org/ This release adds support for the Imagination Technologies' MIPS architecture, including support for MIPS' virtualization architecture VZ to run virtual machines such as Linux. L4Re is currently available for MIPS32, MIPS64 is about to follow. The MIPS port is supported by Imagination Technologies. Further noteworthy changes of this release include: - L4Linux has been updated to L4Linux-4.6 - Conversion of debugging interface to capability-based interface. Programs need to have the 'jdb' capability to use JDB functionality. - The virtual machines monitor, now called uvmm, supports the MIPS and ARM architectures. - A virtio-based peer-to-peer network component is available in virtio-net. - Documentation improvements - Library updates - Added ARM platforms: - NXP Layerscape LS1021A - i.MX28 - MIPS platforms: - Malta - Sead3 - Ci20 - Baikal-T - Bug fixes and small feature enhancements in the kernel and user-level components: - Added atomic IRQ re-attach call - The vCPU data structures have been revised Adam

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Flexpage: shared Mem
by ba_f 23 May '16

23 May '16

Hello, writing a L4Linux Driver I'm expiring the C-Interface and low level(?) flexpages. So far, I can push a Dataspace Capability via flexpage, and the receiving server is able to read its content. But, whatever the server writes in that mem-region doesn't appear on the clients side. /* client.c */ l4_fpage_t fpage = l4_obj_fpage( dataspace, 0, L4_CAP_FPAGE_RW ); l4_utcb_mr()->mr[0] = size; l4_utcb_br()->br[0] = fpage.raw; /* server.c */ l4_utcb_br()->br[0] = dataspace | L4_RCV_ITEM_SINGLE_CAP; l4_ipc_wait(l4_utcb(), 0, L4_IPC_NEVER); // allocate, and attach Dataspace ... // read & write Dataspace ... l4_utcb_mr()->mr[0] = returnValue; l4_ipc_reply_and_wait(l4_utcb(), l4_msgtag(0, 1, 0, 0), 0, L4_IPC_NEVER); As I am creating the fpage with L4_CAP_FPAGE_RW my guess was I can write to that mem-region and the client can read my changes. Anyway, maybe I need some more understandings about capabilities & flexpages. (Are there any precise slides or papers about this topic?) So, the client creates a dataspace capability and allocates some memory. But, what happens when the flexpage is pushed to the server? The capability is copied and both pointing to the same allocated memory, or is the Cap and(!) the memory it is pointing to copied to server? Thanks, ba_f

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Question about Fiasco.OC support for SPARC
by deng.chao1＠zte.com.cn 12 May '16

12 May '16

Hi everyone： I want to run Fiasco.OS on SPARC-leon3 platform. It seems that Fiasco.OS already has an unimplemented support for SPARC-leon3 according to the latest snapshot fiasco-2015123115 of Fiasco. Does Fiasco.OS support SPARC now? If it does, how can I get the source? If it doesn't, what are the unimplemented parts according to snapshot fiasco-2015123115? And another question, is there any good machine emulator for SPARC-leon3？ I have tried latest version of QEMU, but It doesn't work well on SPARC-leon3. Thanks Dengchao

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Task Priority Setting
by Nourhan Mohamed 02 May '16

02 May '16

Dear L4Hackers, I have been trying to run 2 simple L4 tasks and give one of them highest scheduling priority and the other one the least. I have tried using the priority attribute in the start script as well as: scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x18, 0x8) with different ranges for each of them but I don't notice any change in their runtimes. Am I missing something here? Thanks in advance, Nourhan

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