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Microkernel Meetup
by Björn Döbel 04 Apr '15

04 Apr '15

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi all, it is time for another Microkernel Meetup! As many regulars seem to be travelling mid/late April, I suggest we go to B'liebig, Liebigstraße 24 http://b-liebig.de/ either on April 7 or on April 9. Please participate in the Dudle so I can reserve a table: https://dudle.inf.tu-dresden.de/uks0415/ Also, please distribute this email to anyone you think might be interested in coming. Cheers, Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlUSfX0ACgkQP5ijxgQLUNmsjQCeP07bdeWG7cANxiaT2U1DqT+N 9+EAmQH4tcieJL4S1VAiOkOCJaGQqsJG =XTl6 -----END PGP SIGNATURE-----

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Denial of service in microkernel
by Gayathri Nagarajan 01 Apr '15

01 Apr '15

I executed fork bomb(a process continually replicates itself to deplete the system resources), a denial of service attack in Linux kernel and the kernel got crashed. This is because of the depletion of resources and starvation. But, upon executing the same application in L4linux under the Fiasco.oc with L4re microkernel architecture, no crashing occurs. What is the reason behind this stability? How does the microkernel(Fiasco.OC) handle the system calls ? # Code for the fork bomb application : #include<unistd.h> int main(void) { while(1) fork(); //system call }

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Fiasco testcase And L4RE API
by cui.yunfeng＠zte.com.cn 31 Mar '15

31 Mar '15

hi L4 hacker: I am learning Fiasco, there are some question about Fiasco and L4RE. Is there unit test case (such as TDD test case) on development of Fiasco? How to get the unit test case? Is there document about L4RE API interface? I want to compare the L4RE POSIX interface and Linux POSIX interface. Thanks a lot.

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(no subject)
by zhou.li9＠zte.com.cn 31 Mar '15

31 Mar '15

Now I want to debug Fiasco.OC kernel with JDB, the version of Fiasco.OC is 2014092821. Mentioned in a jdb.pdf document section 4.14, need to use RMGR to load the symbol table, but I did not find any manpage on the RMGR. where is the manpage or how to load the symbol table? -------------------------------------------------------- ZTE Information Security Notice: The information contained in this mail (and any attachment transmitted herewith) is privileged and confidential and is intended for the exclusive use of the addressee(s). If you are not an intended recipient, any disclosure, reproduction, distribution or other dissemination or use of the information contained is strictly prohibited. If you have received this mail in error, please delete it and notify us immediately.

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L4 and Lua interaction
by daniel krefft 30 Mar '15

30 Mar '15

Hi there, please can you give us a short overview about the L4 and Lua interaction/integration? The most important aspect is to understand how Lua-Scripts are used to create/manage the VBus. In particular from which module/component are the Lua-Scripts read/processed (NED, SIGMA0)? We found an example about Ankh (ankh.vbus, aw.lua, lwip.lua). Maybe it is possible to exemplify it via Ankh. Regards, Daniel -- Mit freundlichen Grüßen Daniel Krefft ***************************************************************** * Daniel Krefft M.Sc. * * T: +49-89-289-18791 * * * Technische Universitaet Muenchen * Fakultaet fuer Informatik - F13 (Prof. Baumgarten) * Boltzmannstr. 3 * D-85748 Garching bei Muenchen * Germany *****************************************************************

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microkernel as an instance in oracle virtual box
by Gayathri Nagarajan 24 Mar '15

24 Mar '15

Is it possible to run the microkernel Fiasco.oc directly as an instance in Oracle virtual box (just like other operating systems like Ubuntu, windows etc that are executed) ? If so, how do I do it?

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Support for Raspberry Pi 2 B and/or Odroid C1
by daniel krefft 24 Mar '15

24 Mar '15

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi there, we're are interested in running Fiasco.OC on the Raspberry Pi 2 (Broadcom BCM2836 ARM Cortex-A7) or Odroid C1 (Amlogic S805 Cortex A5). Is there any support for the boards yet? Best regards, Daniel - -- Mit freundlichen Grüßen Daniel Krefft ***************************************************************** * Daniel Krefft M.Sc. * * T: +49-89-289-18791 * * * Technische Universitaet Muenchen * Fakultaet fuer Informatik - F13 (Prof. Baumgarten) * Boltzmannstr. 3 * D-85748 Garching bei Muenchen * Germany ***************************************************************** -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJVD+5AAAoJEJwTN+De5ZtpDfgH/1x7WIHYutLEWJmP23lhSnAm jp1NLmUL1kaFPGrsTr0Q4WfBtn6iVTFYbmoDXoMZxmen4Ne0SomuftSAHePkBwOm SH6udmQir5b6C0hWJSGdQ0CkY+YemcR3LvM3poNzpJtNAJvTiCRNE6qeI4WZn5TY ocNb3AzzNZ4ruZ6QBdtiwfkpAAABZQSiWM6xtcHIVckGezWuW+qC3ZLfvNK08U/i 4Up0eHIc2dldgrGCvzotC0j6LW7urinVG0e6rBFImrup1wLnTlJAJwua0wzf5uGT omkS1dE4u5RQ7BkYHWfwaAApI0Cm5vNVu90ObfVsBKSLPE1fluxmZ+SNLWEhgt0= =TBGn -----END PGP SIGNATURE-----

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the implemention of l4_ipc_send
by 水镜 24 Mar '15

24 Mar '15

hi, where could i find the implemention of l4_ipc_send?

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Help with RaspberryPI USB on Fiasco.OC+Genode
by Reinier Millo Sánchez 23 Mar '15

23 Mar '15

Hi GenodeOS and L4-Hackers community I'm trying to use DWC_OTG USB Driver for RaspberryPI, using Fiasco.OC as microkernel with Genode. I have tested the USB driver using Genode bare metal hardware on RaspberryPI and works fine. I have reviewed the post published by Simon Arlott about the FIQ and Bell IRQ: http://permalink.gmane.org/gmane.linux.kernel.rpi/438 Also I have reviewed the correction implemented by Norman Feske in the IRQ controller for Genode bare metal hardware: repos/base-hw/src/core/include/spec/rpi/pic.h To use Fiasco.OC as microkernel in Genode I have adapted the patch published in: http://sourceforge.net/p/genode/mailman/message/33071769/ Based on it, i have tried to use the same idea of Norman Feske, modifying the Fiasco.OC's IRQ's controller as shown below: ------ kernel/fiasco/src/kern/arm/bsp/bcm2835/mem_layout-arm-bcm2835.cpp ------ index aab5906..4385ebe 100644 @@ -8,5 +8,6 @@ public: Pic_phys_base = 0x2000b200, Watchdog_phys_base = 0x20100000, Uart_phys_base = 0x20201000, + Usb_dwc_otg_base = 0x20980000, }; }; ---------- kernel/fiasco/src/kern/arm/bsp/bcm2835/pic-arm-bcm2835.cpp ---------- index 20ed280..13fa623 100644 @@ -7,6 +7,83 @@ IMPLEMENTATION [arm && bcm2835]: #include "irq_mgr.h" #include "mmio_register_block.h" #include "kmem.h" +#include "warn.h" + +class Usb_dwc_otg : Mmio_register_block{ +private: + enum{ + Core_irq_status_reg = 0x14, + Guid_reg = 0x3c, + Host_frame_number_reg = 0x408, + }; + bool is_sof() const { return read<Mword>(Core_irq_status_reg)&0x8; } +}; + +PUBLIC +Usb_dwc_otg::Usb_dwc_otg() +: Mmio_register_block(Kmem::mmio_remap(Mem_layout::Usb_dwc_otg_base)) +{ + + write<Mword>(read<Mword>(Guid_reg)&0x3FFFC000, Guid_reg); +} + +PRIVATE +static bool +Usb_dwc_otg::need_trigger_sof(Mword host_frame, Mword scheduled_frame) +{ + Mword const max_frame = 0x3fff; + + if (host_frame < scheduled_frame) { + if (scheduled_frame - host_frame < max_frame / 2) + return false; /* scheduled frame not reached yet */ + else + return true; /* scheduled frame passed, host frame wrapped */ + } else { + if (host_frame - scheduled_frame < max_frame / 2) + return true; /* scheduled frame passed */ + else + return false; /* scheduled frame wrapped, not reached */ + } +} + +PUBLIC +bool +Usb_dwc_otg::handle_sof() +{ + if (!is_sof()) + return false; + + static Mword cnt, stat_cnt, filter_cnt, kick_cnt, trigger_cnt; + + stat_cnt++; + if (stat_cnt == 8000) { + WARN("kicked: %d filtered: %d triggered: %d", kick_cnt, filter_cnt, trigger_cnt); + stat_cnt = 0; + } + + cnt++; + if (cnt == 8*20) { + cnt = 0; + return false; + } + + if (read<Mword>(Guid_reg)&0x40000000) + kick_cnt++; + + if ((!read<Mword>(Guid_reg)&0x80000000) || (read<Mword>(Guid_reg)&0x40000000)) + return false; + + if (Usb_dwc_otg::need_trigger_sof(read<Mword>(Host_frame_number_reg)&0x3fff, read<Mword>(Guid_reg)&0x3fff)) { + trigger_cnt++; + return false; + } + + filter_cnt++; + + write<Mword>(read<Mword>(Core_irq_status_reg)|0x8, Core_irq_status_reg); + + return true; +} class Irq_chip_bcm : public Irq_chip_gen, Mmio_register_block { @@ -29,6 +106,9 @@ public: bool is_edge_triggered(Mword) const { return false; } void set_cpu(Mword, Cpu_number) {} void ack(Mword) { /* ack is empty */ } + +private: + Usb_dwc_otg _usb; }; PUBLIC @@ -97,6 +177,11 @@ Irq_chip_bcm::irq_handler() { b = 0; p = read<Mword>(Irq_pending_1); + if(p==8){ + if(_usb.handle_sof()){ + return; + } + } } else if (p & 0x200) { I have tried to test the *usb_hid *example on Genode using Fiasco.OC as microkernel make run/usb_hid The example compiles fine. When I test it in the emulator QEMU get the following output KERNEL: Warning: kicked: 0 filtered: 0 triggered: 7950 KERNEL: Warning: kicked: 0 filtered: 0 triggered: 15900 KERNEL: Warning: kicked: 0 filtered: 0 triggered: 23850 KERNEL: Warning: kicked: 0 filtered: 0 triggered: 31800 When have tested it on real hardware never get the kernel warning. It seems that the *Kick* and *Num_valid* bits are not modified by the USB driver. After that, I have tried to log the USB driver IRQ, setting #define DEBUG_IRQ 1 in the file repos/dde_linux/src/lib/usb/include/lx_emul.h Setting this value, the USB driver will log every IRQ handled by the function *_handle()* and *_handle_one()***in the USB driver. In the Genode bare metal hardware it works fine, but when tried it with Fiasco.OC, the IRQ handler *_handle()* and *_handle_one()* are never logged. There's something wrong in my implementation? Someone has tested the USB driver using Fiasco.OC and Genode together? Why Fiasco.OC's IRQ's controller is not calling the IRQ's handler defined in the USB driver? I'm using Genode commit 63293950261bfb17497433c36a3d62e6e1d813b3, Fiasco.OC r56 and DWC_OTG commit d08b205cfe01925667f3591117b6d3e1087b4e19. Best regards -- Lic. Reinier Millo Sánchez Centro de Estudios de Informática Universidad Central "Marta Abreu" de Las Villas "antes de discutir ... respira; antes de hablar ... escucha; antes de escribir ... piensa; antes de herir ... siente; antes de rendirte ... intenta; antes de morir ... vive"

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Help to measure the Fiasco.OC's real-time capabilities
by Reinier Millo Sánchez 23 Mar '15

23 Mar '15

Hi L4 Hackers community I want to use Fiasco.OC to construct real-time's systems. I want to do some benchmarks over Fiasco.OC, to measure the performance in different hardware platforms and compare the results with tests made to others solutions based maybe on Linux Kernel. For now i want to test the real-time capabilities on some platforms, measuring some aspects of Fiasco.OC (in time or cycles): - Execution mode switch (user-kernel) - Thread/Context switch on the CPU - Scheduler algorithm - IPC Mechanism - Thread/Task creation/destruction Somebody have measured this elements in Fiasco.OC or can give me some ideas? Best regards -- Lic. Reinier Millo Sánchez Centro de Estudios de Informática Universidad Central "Marta Abreu" de Las Villas "antes de discutir ... respira; antes de hablar ... escucha; antes de escribir ... piensa; antes de herir ... siente; antes de rendirte ... intenta; antes de morir ... vive"

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Moe::Boot_fs::init_stage1()
by 水镜 22 Mar '15

22 Mar '15

Hi, i am reading the source of the moe. there's a line: Moe::Boot_fs::init_stage1();‍ what it is for? when i comment it. the hello example can still run correctly.‍

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the editor for Fiasco.OC
by cui.yunfeng＠zte.com.cn 19 Mar '15

19 Mar '15

I am reading Fiasco.OC source code, but didn't find a suitable editor. As the following code, the eclipse or Source Insight can't identify the class hierarchy. I want to know which editor is used by Fiasco.OC developer, Thanks ! class Kernel_uart { public: }; .... EXTENSION class Kernel_uart : public Uart { private: };

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L4Re Hello World Qemu vs Hardware
by André Bispo 17 Mar '15

17 Mar '15

Hello guys,I was trying to run Fiasco and L4 and i successfully created the ISO image and ran it on QEMU.How can i run it on my pc hardware? Can you guys provide me some steps on how to do it? Thank you in advance,André Bispo.

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Checkpoint/Restore on L4Re
by Stark, Josef 16 Mar '15

16 Mar '15

Hello, I am interested in Checkpoint/Restore-functionality on L4Re. I found the paper "Stay Strong, Stay Safe – Enhancing Reliability of a Secure Operating System" (http://os.inf.tu-dresden.de/papers_ps/vogtdoebel-IIDS2010.pdf) where it is written that such a mechanism was already developed for L4Re. However, I couldn't find such a thing inside the L4Re snapshot. Could someone tell me what the current state of this is, and where to find it (if it's publicly available)? Sincerely, Josef

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Running a task without region manager
by Stark, Josef 16 Mar '15

16 Mar '15

Hey, I am wondering what would happen (i.e. which disadvantages I get) if I tried to run a task directly, without l4re_kernel. More precisely: Ned, file lua_exec.cc, line 408: '_l.launch(&am, "rom/l4re", ldr);': What would happen, if the second argument ("rom/l4re") was replaced by a variable holding the actual binary name that should be started (e.g. "rom/hello"), which thus would be started without l4re? Best regards, Josef

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Disable log color
by teclis High Elf 16 Mar '15

16 Mar '15

Is there a way to disable the log color so that the logger doesn't insert control codes for color into the output stream.

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Networking issues (ankh/lwip/drivers/?)
by Stark, Josef 13 Mar '15

13 Mar '15

Hi all, while experimenting with network apps in L4Re, I experienced some issues: 1. (not important) DHCP isn't working: The lwip example (ankh/examples/lwip) doesn't seem to work, neither with the integrated DHCP-Server of QEMU, nor with a dnsmasq running on a tap interface plugged into a vde_switch. Workaround: Replacing "dhcp_start(&my_netif);" with "netif_set_default(&my_netif); netif_set_up(&my_netif);" and, beforehand, setting the adress manually with "IP4_ADDR()" (#include <ipv4/lwip/ip4_addr.h>). I also couldn't get DNS to work. 2. (not so important) some NIC-drivers aren't working: QEMU-x86 can emulate the following interfaces: ne2k_pci, i82551, i82557b, i82559er, rtl8139, e1000, pcnet and virtio. According to its Makefile, ankh supports the following interfaces: NE2K, LOOP, RTL8139, RTL8169, PCNET, E100, E1000, E1000E and UX. However, of the intersection (ne2k_pci, rtl8139, pcnet und e1000) only ne2k_pci seems to work somewhat reliably. The others simply don't work with or without some errors being shown by ankh. With ne2k_pci I can only get a throughput of about 1MB/s, I'm guessing because the card is pretty old. 3. Sporadic delays/ errors: Although this didn't happen too often, sometimes, when a client tried to send some small data to a server in another QEMU-instance, I experienced delays in the range of about 1 second before the receiver got the data. On other occassions, a connection could not be established at all. However, no error messages were shown. 4. Multithreaded server issues: I couldn't manage to get a multithreaded server to work. Neither a server, a) which receives data on two different ports, each handled in a separate thread, nor b) which receives data on a single port, handles however multiple clients simultaneously via separate threads, did work. Since a) and b) seem somewhat related I will elaborate only on b): As long as just one client is connected to the server, sending and receiving on both ends works fine. As soon as a second client (in another QEMU-instance, all connected via a vde_switch) tries to send data after connecting, both connections from server to the first and second client break down and no data gets through anymore. No errors shown. Finally the write() calls timeout. Just as I wrote this, it did one time actually work, both clients connected, able to send and receive data. But I couldn't reproduce this success. After removing the L4Re-specific parts of the code I compiled and ran it on Linux, where it does work flawlessly, even with 6 simultaneous client processes, not just 2. I'm not sure why these issues occur, either there are bugs somewhere in L4Re's network stack or the NIC drivers, but it's also perfectly possible that I made some mistakes or that vde_switch doesn't work correctly (Although I did test whichever was possible (e.g. 4.a ) also only using simple QEMU TCP sockets). In order to be able to reproduce the results, I attached my configuration (see below and attachments). Hopefully, someone can tell me what's going on here. I would really be glad. Thank you! Josef ---------------------------------------- Configuration: First of all, I run "sudo vde_switch -daemon -mod 660 -group users". This is only neccessary once; the vde_switch is then used by all QEMU-instances. To start the scenario, I use a simple script (see attachment run.sh), which starts all the QEMU-instances and sets different MAC-adresses for each instance (in cooperation with Makeconf.boot). server.c and client.c are heavily based on the lwip example. While server_linux.c and client_linux.c are the stripped-down files I used for testing the network code on linux, all the other attached files are needed for running the L4Re-scenario.

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dde kit
by Daniel Krefft 13 Mar '15

13 Mar '15

Hi there, we want to use the ddekit in one of our courses next summer term. So, to get comfortable with the setup and the toolchain I would like to ask if a step by step guide to get the ddekit up and running exists? Best regards, Daniel -- ***************************************************************** * Daniel Krefft M.Sc. * * T: +49-89-289-18791 * * * Technische Universitaet Muenchen * Fakultaet fuer Informatik - F13 (Prof. Baumgarten) * Boltzmannstr. 3 * D-85748 Garching bei Muenchen * Germany *****************************************************************

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Re: Porting Fiasco.OC to RISC-V - Questions
by Hesham ALMatary 12 Mar '15

12 Mar '15

Hi Adam, Thanks for your reply. I thought it would be a good idea to start with L4Re to familiarize myself with Fiasco.OC/L4Re structure, and chose to start with L4Re because it doesn't need a lot of architecture dependent code. So, after your reply, I'd work on getting bootstrap working and loading the "to-be-evolved" Fiasco.OC RISC-V kernel. This would allow me to debug and test Fiasco.OC/risc-v as I add new code/features their. Best, Hesham On Thu, Mar 12, 2015 at 12:48 PM, Hesham ALMatary <heshamelmatary(a)gmail.com> wrote: > Hi Adam, > > Thanks for your reply. I thought it would be a good idea to start with > L4Re to familiarize myself with Fiasco.OC/L4Re structure, and chose to > start with L4Re because it doesn't need a lot of architecture > dependent code. So, after your reply, I'd work on getting bootstrap > working and loading the "to-be-evolved" Fiasco.OC RISC-V kernel. This > would allow me to debug and test Fiasco.OC/risc-v as I add new > code/features their. > > Best, > Hesham > > On Wed, Mar 11, 2015 at 11:14 PM, Adam Lackorzynski > <adam(a)os.inf.tu-dresden.de> wrote: >> Hi, >> >> On Wed Mar 11, 2015 at 17:53:58 +0000, Hesham ALMatary wrote: >>> I'm considering porting Fiasco.OC/L4Re to RISC-V architecture (for >>> both my research and GSoC). So, I started reading the documentation >>> and building the environment (For Fiasco.OC and RISC-V tools), and >>> QEMU (the emulator that I'll use initially) is running Hello World >>> example just fine. >>> >>> After some reading, I wanted to start adding support for building L4Re >>> for RISC-V (is this a good start?), and I came up with some questions. >>> >>> There are two variants of RISC-V ABI (32 and 64 bit) should I provide >>> both or just 64-bit version? >> >> For starting, just choose one. The other type could be done later. >> >>> What are the minimal packages and/or Fiasco.OC system components that >>> need to be implemented to get Hello World working? Please correct me >>> if the following L4Re list is not right (contains more than needed, or >>> lack others): >>> >>> "bootstrap, sigma0, moe, Log, libc, libc_minimal, cxx_util, cxx_io, >>> cxx_base, cxx_io_kdebug,l4sys-direct, l4sys" >> >> Good list. To find out the exact list you can just do >> "make O=... sigma0 moe bootstrap l4re_kernel hello" and then see in the >> build directory what was actually built. >> >> But actually for starting, you just need boostrap because then comes the >> kernel that needs to work before anything more needs to be done for the >> user level components. >> >>> Some of the packages are architecture dependent which need some code >>> from other projects (like uclibc), should I add them all? FYI, newlib >>> has support for riscv, but uclibc doesn't, >> >> True that uclibc does not support riscv natively. But there's nearly no >> architecture dependent code needed, so this is not really an issue. >> >>> how can I make the build >>> system choose specific packages for the target architecture (riscv in >>> this case) and maybe neglect building others? >> >> One way is putting 'broken' files in to package's root directory (e.g. >> l4/pkg/hello/broken). Then there's the SYSTEMS variable which defines >> for which architecture a library/program can be compiled for. Its >> default is all architecture, so by not changing the default and just >> adding riscv-l4f where you want it could also be a way. >> >> >> >> Adam >> -- >> Adam adam(a)os.inf.tu-dresden.de >> Lackorzynski http://os.inf.tu-dresden.de/~adam/ >> >> _______________________________________________ >> l4-hackers mailing list >> l4-hackers(a)os.inf.tu-dresden.de >> http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > > > > -- > Hesham -- Hesham

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Porting Fiasco.OC to RISC-V - Questions
by Hesham ALMatary 12 Mar '15

12 Mar '15

Hi all, I'm considering porting Fiasco.OC/L4Re to RISC-V architecture (for both my research and GSoC). So, I started reading the documentation and building the environment (For Fiasco.OC and RISC-V tools), and QEMU (the emulator that I'll use initially) is running Hello World example just fine. After some reading, I wanted to start adding support for building L4Re for RISC-V (is this a good start?), and I came up with some questions. There are two variants of RISC-V ABI (32 and 64 bit) should I provide both or just 64-bit version? What are the minimal packages and/or Fiasco.OC system components that need to be implemented to get Hello World working? Please correct me if the following L4Re list is not right (contains more than needed, or lack others): "bootstrap, sigma0, moe, Log, libc, libc_minimal, cxx_util, cxx_io, cxx_base, cxx_io_kdebug,l4sys-direct, l4sys" Some of the packages are architecture dependent which need some code from other projects (like uclibc), should I add them all? FYI, newlib has support for riscv, but uclibc doesn't, how can I make the build system choose specific packages for the target architecture (riscv in this case) and maybe neglect building others? Any other feedback or comments are welcomed. -- Hesham

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shared dataspace for l4re_kernel/ registering additional caps in ned
by Stark, Josef 12 Mar '15

12 Mar '15

Hello all, for a project, I want to be able to load (elf-)binaries not only from the filesystem, but also from the network (receive binary, then start it.) For this, I will write a L4 app (let's call it "manager" for now) which handles the network part and then tells ned to start the received binary via a special "filename". I already modified ned so that its LUA-interface is exposed to other apps via a capability. But here comes the first problem: Normally you specify the capability table of a task and an IPC channel in the lua-config file, which ned reads. Ned then prepares the channel and the caps table and starts the task, which then can register the capability. Otherwise, registering fails (the example would do a printf("Could not register my service, is there a 'calc_server' in the caps table?\n");) So... how do I specify which capabilities ned itself can have/register? Currently, I need to have a lua-config which tells ned to start another instance of ned with the required permission to register the capability. But is there any way to avoid having two ned instances and making the first (and only) instance able to register the cap? Second problem: I found out, that ned (also moe) doesn't start the desired app directly but instead starts the l4re binary (source located in src/l4/pkg/l4re_kernel), passing it the filename of the desired binary. l4re, once started, gets the dataspace of this file and then ultimately starts the app. For my purpose, I would modify l4re_kernel so that if it detects the special "filename" mentioned above, it does not read the file from the filesystem but loads the binary that the "manager" received over the network. To get the data from the manager to the l4re_kernel instance, I thought that a shared dataspace or a shared memory area l4shmc_area_t like in prdocons.c example would be suitable. However, again, both of these things normally require special parameters in the lua config file (as can be seen in the examples), but I have no clue how to do this to l4re_kernel since it is not loaded from such a file, but loaded implicitly each time a new task is started. (so I guess this makes it even harder than the problem with ned since ned is only started once.) Does anyone have ideas on how to solve these? If someone finds that I phrased this too opaque, please let me know. Best regards, Josef Stark

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add new package
by 水镜 11 Mar '15

11 Mar '15

hi ,i want to add a new package which is a lib. i use the log package as my base. now my package can be compiled. but when i want to use it in the moe, i got this errors: Library dependencies missing: libdbgobj in directory '/home/watermirror/source/src/l4re/pkg/moe/server/src'; aborting. /home/watermirror/source/src/l4re/mk/binary.inc:363: *** Cflags dependencies missing: libdbgobj in directory '/home/watermirror/source/src/l4re/pkg/moe/server/src'; aborting.. how to solve this problem?

2 1

seL4 and mysql
by André Bispo 06 Mar '15

06 Mar '15

Hello guys, I'm a student and i'm looking at the possibility of using an L4 microkernel in my thesis, my goal is to take advantage of isolation mechanism to in order to increase privacy in databases. But i have a couple of questions. 1) How feasible is the idea of having a MySQL database with a libOS running on top of seL4 microkernel? If it can be done, where should i start? Any tutorial? 2) if seL4 does not allow me to do it, is there another microkernel in the family of L4 better suited for this task? Thank you in advance. Best regards, Andre Bispo.

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Where could i found the class implemention
by 水镜 05 Mar '15

05 Mar '15

hi, i am reading the source of clntsrv in pkg/examples directory. there are a lot of classes in the server.cc and client.cc which i could not found the implemention file, such as L4::Server_object. How could i get these?

2 1

how to get the log from serial
by 水镜 05 Mar '15

05 Mar '15

hi, how to get all the output log when startup helloworld example? i have build the iso file use command :make grub2iso.then boot this iso using vmware.‍ i can get the output log from serial when startup linux.

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