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Source Code of the Monitoring Frameworks FERRET and HAECER
by Karl Steger 13 Jan '15

13 Jan '15

Hi L4 hackers, Would it be possible to make the source code of the monitoring frameworks FERRET [http://os.inf.tu-dresden.de/papers_ps/pohlack-phd.pdf] and HAECER [http://os.inf.tu-dresden.de/papers_ps/haehnel-diplom.pdf] public? I would like to develop a generic monitoring framework with similar capabilities for L4Re. Even if the code was not up to date with the current release or still pertained to L4Env, it would help me greatly. Thanks and regards, Karl

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Problem with running client-server application in l4re
by Gayathri Nagarajan 13 Jan '15

13 Jan '15

I am able to generate "clntsrv.iso" image for the clntsrv application given in l4/pkg/examples directory. But when i execute in qemu, i get * BOOTFS: [1418000-154fef5] [C:503000] l4re* * BOOTFS: [1550000-162e6e6] [C:504000] clntsrv-client* * BOOTFS: [162f000-1714483] [C:505000] clntsrv-server* *No fpage received* *MOE: cmdline: moe --init=rom/clntsrv-server* *MOE: Starting: rom/clntsrv-server * *MOE: loading 'rom/clntsrv-server'* *Could not register my service, is there a 'calc_server' in the caps table?* *MOE: task 1565571 exited with 1* Please help... Gayathri

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PF_RING installation on l4re
by Vidya Lakshmi 07 Jan '15

07 Jan '15

sir, I'm very new to fiasco microkernel. I need assistance for running PF_RING on top of l4re. Please give us guidelines/procedure for the same. Thanks in advance.

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Re: L4Re GPIO
by Erry Pradana Darajati 05 Jan '15

05 Jan '15

>Hi >This piece of code is missing the mapping of the GPIO4's MMIO region. For your >client program to successfully access the GPIO chip you need to create a virtual >device in IO's lua configuration file. Then you attach this device to a virtual bus. In the >startup script you hand IO's capability to that virtual bus to the 'vbus' cap of your >client. Then you client can query its vbus to discover connected devices and their >resources (see documentation of libvbus for reference). Then your client can map the >GPIO's chip MMIO region. > >Best, >Matthias. Thank you for the explanation. I am reading through the libvbus doc right now. I'm still not fully understand but if i conclude the method to access the gpio of omap4460 in Pandaboard is : Define the res.mmio(address) in lua .dev script. Make vbus capabilities in .cfg. Make a program that can access GPIO via vbus with a client-server concept? I'm sorry i'm not fully understand about this, but what is the server of this client i am making. Also, before i your email, i already 'porting' a omap4460-chip driver in io module. and editing the .devs file so it matches with the memory of omap4460 (The two file is attached). Is my step right, and after that what should i do to be able to access it via my main program. When i try to compile the omap44x2.c it give me error like attached below. Is it because i'm not insert all of the virtual function in my program ? because actually i am not really in my goal in the mean time. I really appreciate and say biggest thanks with any of your suggestion and answer P.S : I am attaching my current main program just in case. And i still access it directly. without main2.c : http://pastebin.com/eZKqy1LE omap44x2.c : http://pastebin.com/0hupnnyR arm-omap4.devs : http://pastebin.com/pK6k7F5y error output : http://pastebin.com/s2skR3wu

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L4Android on Pandaboard
by Lin 05 Jan '15

05 Jan '15

Hi hackers, I'm trying to get L4Android working on a PandaBoard ES(OMAP 4460). I managed to run Fiasco and L4Linux successfully, but L4Android give me some error: Welcome to Fiasco.OC (arm)! L4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden Rev: unknown compiled with gcc 4.7.3 for Pandaboard [] Build: #1 Tue Dec 23 16:44:35 CST 2014 Per_cpu_data_alloc: (orig: 0xf005e290-0xf005ec58) Allocate 2504 bytes (2KB) for CPU[2] local storage (offset=118bd70, 0xf11ea000-0xf11ea9c8) Number of CPUs: 2 Calibrating timer loop... Per_cpu_data_alloc: (orig: 0xf005e290-0xf005ec58) Allocate 2504 bytes (2KB) for CPU[1] local storage (offset=118dd70, 0xf11ec000-0xf11ec9c8) done. FPU1: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl MDB: use page size: 20 Cache config: ON MDB: use page size: 12 ID_PFR[01]: 00001231 00000011S ID_[DA]FR0: 00010444 00000000 IID_MMFR[04]: 00100103 20000000 01230000 00102111 GCPU[1]: goes to idle loop MA0: Hello! KIP @ 80002000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [4:80000000;80000fff] [0:8006f000;8008ffff] [0:80097000;80097fff] [0:8009f000;8013ffff] [4:80140000;8016efff] [0:8016f000;8016ffff] [4:80170000;80186fff] [0:80187000;810fffff] [4:81100000;8451bfff] [0:8451c000;bbffffff] IOMEM:---------------------- [0:0;7fffffff] [0:bd000000;ffffffff] MOE: Hello world MOE: found 928900 KByte free memory MOE: found RAM from 80000000 to bc000000 MOE: allocated 960 KByte for the page array @0x80187000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [81100000-81119458] [C:503000] l4re BOOTFS: [8111a000-8116cc04] [C:504000] ned BOOTFS: [8116d000-812bb454] [C:505000] io BOOTFS: [812bc000-81353c44] [C:506000] mag BOOTFS: [81354000-81375624] [C:507000] fb-drv BOOTFS: [81376000-81376666] [C:508000] l4_gingerbread-arm.cfg BOOTFS: [81377000-81377589] [C:509000] arm-rv-eb-mc.devs BOOTFS: [81378000-8137810a] [C:50a000] l4_android-arm.vbus BOOTFS: [81379000-8177247c] [C:50b000] l4linux.android-arm BOOTFS: [81773000-81873000] [C:50c000] root-arm-ginger.img BOOTFS: [81873000-8451c000] [C:50d000] system-arm-ginger.img MOE: cmdline: moe rom/l4_gingerbread-arm.cfg MOE: Starting: rom/ned rom/l4_gingerbread-arm.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/l4_gingerbread-arm.cfg' io | Io service io | Ready. Waiting for request. mag | Hello from MAG fb | Using LCD driver: ARM AMBA PrimeCell 11x Here is my modules.list file: entry lx_ginger-arm roottask moe rom/l4_gingerbread-arm.cfg kernel fiasco -serial_esc module l4re module ned module io module mag module fb-drv module l4_gingerbread-arm.cfg #from L4Android website module arm-rv-eb-mc.devs #from l4re-snapshot-2014092821/src/l4/pkg/io/config module l4_android-arm.vbus #from l4re-snapshot-2014092821/src/l4/pkg/io/config module l4linux.android-arm module root-arm-ginger.img module system-arm-ginger.img Any ideas on what's going wrong or next steps I can take to diagnose the issue? Thanks! Best regards, Lin

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Re: Iostream and string in L4Re
by Erry Pradana Darajati 05 Jan '15

05 Jan '15

Hi, I already fix the line to this line >> REQUIRES_LIBS += libc_be_file_stdin libstdc++ but it still gave error. But the error is not in the compiler. It's on the linker. My code is like this : char cmd[12] ; printf("Initialization Finished\n"); while(1) { printf("erry@erry-OS : \t"); gets(cmd); if(strcmp(cmd,"clear")==0) { ............. It gives undefined referenced error to gets in main.o (Liunker error not compiler error). Where do i go wrong. And also, how to use getline() in this scope ? >> And also, how to make hello-cfg be able to accept keyboard input. I have >> already include libc_be_file_stdin and include line below in my hello.cfg >> but it still not working : >> >> *L4.default_loader:start({ caps = { log = L4.Env.log,},l4re_dbg = >> L4.Dbg.Warn,log = { "l4linux", "yellow" },}, "rom/hello");* > >That looks ok to me. How are you trying to get the input in your >program? I'm trying to get input using getchar(). But when i load the kernel. It's still skips the input sequence and going into loop (I'm accpeting the keyboard input inside While(1)) Thank you for any help -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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Re: L4Re GPIO
by Erry Pradana Darajati 28 Dec '14

28 Dec '14

>> 1. I want to QEMU to accept input from keyboard to emulate and study how to >> use an configure of IO. I study this as a part of my main goal to access >> GPIOs of Pandaboard. Well, in my last email i stated that i already include > x86-legacy.devs module in modules.list, and define >> REQUIRES_LIBS=libc_be_file_ >stdin, and using "default-kernel fiasco >> -serial_esc" defined. But, it still not respond to any of my keyboard >> input. So, what did i miss? > >The x86-legacy.devs is for x86-based platforms. The pandaboard is ARM >based, so you do not need that file there. Also, the input here is also >based on the UART that is driven by the kernel, so there's no driver >necessary in user-land here. As already questioned in the other mail, >how are you trying to get the input in your program? Yes, I am testing this scenario in QEMU using x86 Build. The purpose of this testing is to understand how to access and use the IO using L4Re. Because i'm still not fully understand about it. So i'm trying to make a L4RE Build x86, boot it in the QEMU and directly access using keyboard input (not via serial). But i still cannot do that. In Pandaboard ARM. i am already understand and be able to access keyboard via UART3 >> 2. I have modified omap3 driver that included in the package to be used >> with omap4460 registers, but i have a few difficulties. There are few >> missing registers (like Clr_irq_enable1 register that not present in >> OMAP4460) and i am still cannot comprehend the scm_offset table. Because >> when i crossreferencing the source with the OMAP3 TRM the i cannot >> understand the value. My question is. Is it be able to use only some of the >> defined register to do simple IO task, and enable or disable register ? > >I've not written the particular code, but the scm_offset seems to select >a specific gpio block. >For starting to work on a driver I recommend to start with a simple >program and directly work on the MMIO. This helps to understand how the >device is working. When basic things work, such as switching pins >on/off, settings directions, interrupts, etc things can be integrated. I am studying to directly access the GPIO. So if i wrote simple program (let's say main.c program in testGPIO module that i created myself). I don't need to call the .devs and .io or call the driver module ? And also, i already make successful block code to access GPIO but not using L4Re API. But it cannot be implemented in L4Re Block code. It's something like this : http://pastebin.com/TMc9ieBr Thank you, and i really appreciate any answer and helps. -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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Paper: undermine memory isolation in Fiasco OC covert channels
by teclis High Elf 23 Dec '14

23 Dec '14

Hi, These researchers from TU Berlin claim to be able to undermine memory isolation in Fiasco OC through the use of covert channels. I'd be very interested to hear the opinion of the Fiasco experts. (Could a system built on Fiasco be hardened against such an attack be adding access control for UDP ports)?? http://eprint.iacr.org/2014/984.pdf

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Re: L4Re GPIO
by Erry Pradana Darajati 22 Dec '14

22 Dec '14

Thank you for the help in my last email. I want to continue the question from my last email. 1. I want to QEMU to accept input from keyboard to emulate and study how to use an configure of IO. I study this as a part of my main goal to access GPIOs of Pandaboard. Well, in my last email i stated that i already include x86-legacy.devs module in modules.list, and define REQUIRES_LIBS=libc_be_file_stdin, and using "default-kernel fiasco -serial_esc" defined. But, it still not respond to any of my keyboard input. So, what did i miss? 2. I have modified omap3 driver that included in the package to be used with omap4460 registers, but i have a few difficulties. There are few missing registers (like Clr_irq_enable1 register that not present in OMAP4460) and i am still cannot comprehend the scm_offset table. Because when i crossreferencing the source with the OMAP3 TRM the i cannot understand the value. My question is. Is it be able to use only some of the defined register to do simple IO task, and enable or disable register ? Below, i paste the link source : http://pastebin.com/fPSmZQBu Thank you for any suggestion and answer 2014-12-05 18:00 GMT+07:00 <l4-hackers-request(a)os.inf.tu-dresden.de>: > > Send l4-hackers mailing list submissions to > l4-hackers(a)os.inf.tu-dresden.de > > To subscribe or unsubscribe via the World Wide Web, visit > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > or, via email, send a message with subject or body 'help' to > l4-hackers-request(a)os.inf.tu-dresden.de > > You can reach the person managing the list at > l4-hackers-owner(a)os.inf.tu-dresden.de > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of l4-hackers digest..." > > > Today's Topics: > > 1. Re: L4Re GPIO (Adam Lackorzynski) > 2. Re: JDB percent CPU usage (Adam Lackorzynski) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Thu, 4 Dec 2014 23:53:01 +0100 > From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: Re: L4Re GPIO > Message-ID: <20141204225301.GA4644(a)os.inf.tu-dresden.de> > Content-Type: text/plain; charset=iso-8859-1 > > Hi, > > On Thu Dec 04, 2014 at 14:57:14 +0700, Erry Pradana Darajati wrote: > > I have some follow up question from my last email. > > > > 1. About GPIO. So IOs defined on LUA script. So in OMAP4460, is gonna be > > like this, isn't it ? > > Principally yes. > > > I have a question in line of this code. > > > > GPIO = Hw.Device(function() > > GPIO1 = Hw.Gpio_omap46x_chip(function( > > ) > > hid = "gpio-omap46x-GPIO1"; > > compatible = {"ti,omap4-gpio"}; > > regs = Res.mmio(0x4A310000, 0x4A310194); // This one is range of > > Address GPIO1 used > > Yes. > > > irq = Res.irq(29); //This one is IRQ of GPIO1 ? What is the meaning > > of irq(29) ? > > This is the IRQ number for the GPIO chip. The driver in IO will then > generate IRQs for the specific pins by reading hardware registers of the > GPIO chip. > > > scm_table = 0; // I still don't understand about this line > > This selects the specific GPIO block. It is a driver-internal selection. > > > end); > > end); > > > > And where can i read the reference about another parameters of this ? > (Like > > there pins parameter in raspi b. And there are mems instead of regs) > > The specific ones are driver specific so you should check the driver in > io (pkg/io/server/src/drivers/gpio/*). > > I guess a driver for the 4460 won't be so different from the omap3 one > so maybe it can be modified. > > > 2. I try the L4Re with x86 build run in QEMU. And want it to accept my > > keyboard input. So i need to include x86-legacy.devs module in > modules.list > > and define REQUIRES_LIBS=libc_be_file_stdin isn't it ? > > But after i've done it, it still doesn't accept keyboard input. what did > i > > miss ? > > For what purpose do you want it to accept input? Maybe just a missing > -serial_esc option on Fiasco's command line? > > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > > > ------------------------------ > > Message: 2 > Date: Thu, 4 Dec 2014 23:57:32 +0100 > From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: Re: JDB percent CPU usage > Message-ID: <20141204225732.GB4644(a)os.inf.tu-dresden.de> > Content-Type: text/plain; charset=iso-8859-1 > > Hi jason, > > On Wed Dec 03, 2014 at 20:11:03 -0500, teclis High Elf wrote: > > Is there a way to get percent CPU usage (or any other resource usage ) > from > > JDB? So if I suspect that one task has run amok and is monopolizing the > CPU > > I can search for it using JDB. > > CPU usage is not directly possible with jdb as jdb only has a current > view with the system being stopped. What usually works quite ok is to > check for 'ready' threads (with 'lp' jdb command) a couple > of times and see if one or some are ready besides the kernel idle > threads all the time. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > > > ------------------------------ > > Subject: Digest Footer > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > > > ------------------------------ > > End of l4-hackers Digest, Vol 140, Issue 5 > ****************************************** > -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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JDB and sigma0
by teclis High Elf 21 Dec '14

21 Dec '14

Is there a way to use JDB to query sigma0 to see which task owns an address? Say for example I have a virtualization system built using Fiasco L4Re and all I have is the instruction pointer for where a potential problem, possibly a memory leak. Is there a way to use JDB to find out which task the L4Re system thinks owns that address?

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iostream and string in L4Re
by Erry Pradana Darajati 21 Dec '14

21 Dec '14

Hello, L4-hackers. i have a short question. Is iostream and string functions present in L4Re. Since i cannot use it. I have already included the line below in my makefile : *REQUIRES_LIBS += libc_be_file_stdin libstdc++ cxx_libc_io cxx_io* And also, how to make hello-cfg be able to accept keyboard input. I have already include libc_be_file_stdin and include line below in my hello.cfg but it still not working : *L4.default_loader:start({ caps = { log = L4.Env.log,},l4re_dbg = L4.Dbg.Warn,log = { "l4linux", "yellow" },}, "rom/hello");* Thank you for the answers -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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Problem with running hello world application in l4re
by Gayathri Nagarajan 21 Dec '14

21 Dec '14

I am running ubunthu in 32-bit Oracle VM, but using 64-bit host windows 8. When I use *1. l4re-build$ make grub2iso E=hello MODULE_SEARCH_PATH=/src/kernel/fiasco/mybuild * I get.... make[1]: Entering directory `/home/ubunthu/src/l4' Processing entry 'hello' Could not find 'fiasco' with path ':/home/ubunthu/src/l4/path/to/builddir/bin/x86_586:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586/l4f:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586/l4f' make[1]: *** [grub2iso] Error 1 make[1]: Leaving directory `/home/ubunthu/src/l4' make: *** [grub2iso] Error 2 *2. l4re-build$ make qemu E=hello MODULE_SEARCH_PATH=/src/kernel/fiasco/mybuild* I get.... make[1]: Entering directory `/home/ubunthu/src/l4' Could not find 'fiasco' with path '/path/to/fiasco-build:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586/l4f:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586/l4f' make[1]: *** [qemu] Error 1 make[1]: Leaving directory `/home/ubunthu/src/l4' make: *** [qemu] Error 2 Gayathri

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DARPA funds building stuff on seL4
by Gernot Heiser 18 Dec '14

18 Dec '14

DARPA has just issued a SBIR call titled "Secure Software Components Leveraging the seL4 Microkernel”, see https://www.dodsbir.net/sitis/display_topic.asp?Bookmark=45918 The SBIR program funds “small” enterprises (that’s <500 employees in US speak) that are majority US-owned. The program clearly aims at developing an ecosystem around seL4. In the past US company that won SBIR projects sub-contracted some of the work to NICTA, so there seems to be no problem in involving foreign entities as subcontractors. Gernot

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Re: Need help profiling with Valgrind
by Björn Döbel 12 Dec '14

12 Dec '14

Dear Reinier, Am 05.11.2014 um 23:22 schrieb Reinier Millo Sánchez: > Hello Aaron > I'm working in a project to develop an embedded operating system for > real time purposes using Fiasco.OC as microkernel. I have reviewed you > article "Capability Wrangling Made Easy: Debugging on a Microkernel with > Valgrind". I'm interested to do son profiling tests with Fiasco.OC and > Linux Kernel, using Valgrind. Do you have ported Valgrind to the > Fiasco.OC microkernel interface? Is the port available? please let us use the l4-hackers mailing list for further discussion. Indeed we ported Valgrind to Fiasco.OC and L4Re. Its source code is available in the L4Re SVN in l4/pkg/valgrind. As you might have noticed, our paper was in 2010 and if I remember correctly, the Valgrind version in the repository was last updated around 2011. It might still work, but you may also encounter problems. Feel free to try this out and let us know about any questions you have. Apart from that there may be other ways of achieving your profiling needs on top of Fiasco.OC. What exactly would you want to do? Kind regards, Bjoern

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JDB percent CPU usage
by teclis High Elf 04 Dec '14

04 Dec '14

Is there a way to get percent CPU usage (or any other resource usage ) from JDB? So if I suspect that one task has run amok and is monopolizing the CPU I can search for it using JDB. danke sehr

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L4Re GPIO
by Erry Pradana Darajati 04 Dec '14

04 Dec '14

Hi, L4 Hackers Thanks for the answer on my last email. I have some follow up question from my last email. 1. About GPIO. So IOs defined on LUA script. So in OMAP4460, is gonna be like this, isn't it ? I have a question in line of this code. GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap46x_chip(function( ) hid = "gpio-omap46x-GPIO1"; compatible = {"ti,omap4-gpio"}; regs = Res.mmio(0x4A310000, 0x4A310194); // This one is range of Address GPIO1 used irq = Res.irq(29); //This one is IRQ of GPIO1 ? What is the meaning of irq(29) ? scm_table = 0; // I still don't understand about this line end); end); And where can i read the reference about another parameters of this ? (Like there pins parameter in raspi b. And there are mems instead of regs) 2. I try the L4Re with x86 build run in QEMU. And want it to accept my keyboard input. So i need to include x86-legacy.devs module in modules.list and define REQUIRES_LIBS=libc_be_file_stdin isn't it ? But after i've done it, it still doesn't accept keyboard input. what did i miss ? I appreciate any answer and reference. And thanks for the answer -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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Fail to run compiled ARM on Odroid Q2
by Zachary 03 Dec '14

03 Dec '14

Hi, I want to use fastboot to run the Hello demo of Fiasco on Odroid-Q2 board[1]. However, I failed. Firstly, I use make fastboot_rawimage E=hello MODULE_SEARCH_PATH=... The UART output is: Starting download of 935936 bytes downloading of 935936 bytes finished Kernel size: 000e4000 Ramdisk size: 00000000 Booting raw image.. Boot with zImage Wrong Ramdisk Image Format [err] boot_get_ramdisk Starting kernel ... Hello from Startup::stage2 Per_cpu_data_alloc: (orig: 0xf0060ad0-0xf0061550) Number of IRQs available at this GIC: 160 FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl KERNEL: Warning: No page-fault handler for 0xee202108, error 0x94000848, pc f004 It is said the format is wrong, so I change to make fastboot_uimage E=hello MODULE_SEARCH_PATH=... The UART output: downloading of 937984 bytes finished Kernel size: 000e4040 Ramdisk size: 00000000 Booting kernel.. ## Booting kernel from Legacy Image at 40008000 ... Image Name: L4 Image #4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 933888 Bytes = 912 KiB Load Address: 41000000 Entry Point: 41000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK And nothing happen. So what`s the problem? Thanks, Best Regards, Zachary [1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G135278861948&…

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Re: [ASK] Basic L4Re
by Matthias Lange 01 Dec '14

01 Dec '14

Hi, I'm posting this on l4-hackers also, as it might be of interest for other people as well. On 11/27/2014 04:27 PM, Erry Pradana Darajati wrote: > Greeting Mr. Matthias, > Thank you for the help in my last email. I have already solve some of my > problem thanks to your help. > But i still have some problem and question : > > 1. About the IO server you mentioned before. I still cannot fully > comprehend about the OMAP3 driver you said earlier. As i study in > OMAP4460 TRM, i have know the memory that directly accessed to make GPIO > of OMAP4460 (Pandaboard) works. And i already make it works with a > hardcoding (code without L4Re API) by assign directly the memory address > of GPIO. Can you help me to short explain or gave me a reference about > IO server and how to use it to access the memory address of GPIO ? I am not exactly sure what you mean. Instances of the GPIO driver are created through Lua configuration files. You can see an example in io/config/plat-rpi_b/hw_devices.io. There you can also specify the memory base address of the GPIO chip. An example for Omap3 looks like this: GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap35x_chip(function() hid = "gpio-omap35x-GPIO1"; compatible = {"ti,omap3-gpio"}; regs = Res.mmio(0x48310000, 0x48310fff); irq = Res.irq(29); scm_table = 0; end); end); > 2. I still studied the basic of L4Re, and try to run an hello-cfg entry > in modules.list. But when i run using make qemu, it gave an error like > this. > "make[1]: Entering directory `/media/chiqiVstorage/l4resnap/src/l4' > Could not find 'hello.cfg' with path > '/home/erry/l4resnap/src/kernel/fiasco/build86/:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2/l4f:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2/l4f' > make[1]: *** [qemu] Error 1 > make[1]: Leaving directory `/media/chiqiVstorage/l4resnap/src/l4' > make: *** [qemu] Error 2" > > where did i go wrong ? You need to add /media/chiqiVstorage/l4resnap/src/l4/conf/examples to your MODULE_SEARCH_PATH. Best, Matthias. > Sorry for the basic question. Any answer and response is really helping > me understand this research and project better, and i really appreciate > that. > > 2014-10-13 15:23 GMT+07:00 Matthias Lange > <matthias.lange(a)kernkonzept.com <mailto:matthias.lange@kernkonzept.com>>: > > Hi, > > On Sat, Oct 11, 2014 at 01:21:11AM +0700, Erry Pradana Darajati wrote: > > Hello L4 Hackers > > > > I am working on a project with L4Re in Pandaboard for my College Final > > Project. And right now i am in a stuck. > > > > So far, i have already know how to boot, print and read from the serial > > port (UART3) of pandaboard. But i can't understand the fundamental / basic > > of L4Re itself. > > A good starting point is the L4Re documentation [0]. This should get you > started. > > > Like how to make a new program outside the main program of "hello" (i am > > using hello code all of this time to experimenting). And also how to access > > the memory of the host computer using L4Re code. > > Just create a new directory within you pkg directory. From there you > can call > '../../mk/tmpl/inst' which installs the default directory hierarchy and > Makefiles. > > > Because the main goal of the project i am working on is be able to access > > the GPIO of Pandaboard. > > The io server already provides infrastructure and the API for GPIO > drivers. > Please have a look at the existing BCM2835 and OMAP3 drivers. > > > And also, is there is any way to recompile L4Re without recompiling all of > > the module it use. Because in my computer it took a time to recompile even > > the change is only a line of code > > You have multiple possibilities. Change into your pkg's directory > and call > 'make -jX O=/path/to/obj/dir' or from your build directory you can > call 'make > -jX S=YOUR_PKG_NAME'. Note that the latter will not check and > rebuild the pkg's > dependencies. > > Matthias. > > [0] http://os.inf.tu-dresden.de/L4Re/doc/ > > > -- > Matthias Lange, matthias.lange(a)kernkonzept.com > <mailto:matthias.lange@kernkonzept.com>, +49 - 351 - 41 88 86 14 > > Kernkonzept GmbH. Sitz: Dresden. Amtsgericht Dresden, HRB 31129. > Geschäftsführer: Dr.-Ing. Michael Hohmuth > > > > > -- > /Regards,/ > /Erry Pradana Darajati | *Student of Computer Engineering*/ > /*Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*/

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Server loop does not call dispatch only when running in pthread
by Tobias Sturm 24 Nov '14

24 Nov '14

Hi, I want to have the loop() method of a Registry_server instance inside a pthread. When the client sends messages, I get the IPC error 35 (could not figure out what that error code means). As soon as the loop() is invoked in my main thread, messages come through. Here is some pseudo code: start_thread() { //pack args int err = pthread_create(&my_thread, NULL, &thread_fn, &args); printf("pthread_create says %d", err); } thread_fn(args) { L4Re::Util::Registry_server<>* svr = args.server; server_obj* my_server = args.server_obj_instance; svr->registry()->register_obj(my_server, "foo"); svr->loop(); } class server_obj : public L4::Server_object { public: int dispatch( ... ); } server_obj::dispatch(...) { //never called } Thanks, Tobi

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Run and debug Fiasco.OC kernel and L4Re using a DSTREAM JTAG device and the ARM DS-5 IDE
by Mahdi Aichouch 21 Nov '14

21 Nov '14

Hello to everyone, I have a Freescale i.MX 6 ARM Cortex A9 Sabre SD board. I would like to test the Hello World example using the generated bootstrap.elf binary. I compiled the fiasco kernel and the l4re framework for the i.MX 6 ARM Cortex-A9 using the menu configuration in both cases. Instead of using an SD card to run the binary on the board, I would like to flash the RAM with the binary using the DSTREAM JTAG device and the ARM DS-5 IDE. I connected the board to my host using the mini-usb to serial cable, and I used minicom tool as a serial terminal. I tried to run the binary using the DS-5 debugger while the board is connected through JTAG, but I didn't see any debug message on the serial terminal. The source code I am using is from the "l4re-snapshot-2014092821". My questions: 1) Does anyone tried to run and debug fiasco kernel + l4re on a board using a JTAG device? What are the steps that I am missing? 2) The debug tool print a message saying that "WARNING(IMG53): bootstrap.elf has no source level debug information", what are the options required to include these information compiling the fiasco kernel + l4re? Thank you very much in advance. Best regards, Mehdi PS: screenshot of the IDE debugger view

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SMP
by teclis High Elf 11 Nov '14

11 Nov '14

How does the fiasco L4Re do SMP? Are there commands for CPU affinity? How can I assign a specific process to a CPU? thanks,

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Second UART and console
by teclis High Elf 10 Nov '14

10 Nov '14

Hi, I have a board with two UARTs on it and I need a second independent console connected to the other UART ( I have multiple virtual machines and I want to give each their own console). What would be the best approach for this? I see the UART drivers are linked into bootstrap. Does the same driver from bootstrap remain resident in memory and become part of the address space of con once its starts? Would I need to spawn a separate instance of con or could it be modified to support multiple consoles? thanks

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memory layout
by Tobias Woelfel 08 Nov '14

08 Nov '14

Hello everybody, I am still working on the port for openrisc and have now some questions concerning the memory layout. (kern/xxx/mem_layout-xxx.cpp) What parts are necessary, and what do they mean? For example in the arm architecture there is Map_x, Caps_x, Kernel_x, Pmem_x... Are there any restrictions on how big/small one area has to be? What is the phys_to_pmem function supposed to do? (what does pmem stand for?) Thanks Tobias

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How to monitor thread scheduling and the criticality of tasks?
by Karl Steger 05 Nov '14

05 Nov '14

Hi L4 hackers, How can you monitor how threads are scheduled for execution in L4Re? The trace buffer does not seem to offer information about the criticality of tasks. The l4re-snapshot-2014092821, however, refers to a monitoring framework named "ferret" in /obj/l4linux/ux/source/arch/l4/Kconfig but does not provide its source code. Is ferret publicly available? Do you know of any alternatives? Thanks and regards, Karl

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Re: Question about schedule policy
by Björn Döbel 05 Nov '14

05 Nov '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, On 05.11.2014 04:18, Kevin wrote: > Thanks for your answer, please always reply to the mailing list. The answers may also be interesting to other people. > Maybe my question is confused. I know the concept of class > "Thread",It'sa runnable, schedulable activity, and a Task has many > Threads, and Task is just some address spaces. > > So, my question is: If there are many Tasks, for example, Task A > and Task B, and I want each Thread of Task A has a higher priority > than B's, what should I do? Fiasco schedules threads in a priority-based, round-robin fashion. That means it always selects the thread with the highest priority (per CPU). If multiple threads with the same prio exist, they get equal shares of the CPU. You can set a thread's priority upon creation using the l4_scheduler_*() system calls. There are examples of that in l4/pkg/examples - grepping for 'scheduler_' should do the trick. Furthermore, you can also set the prio of threads within the Lua init scripts. For that purpose you do something like: loader:startv({ caps = ..., log = ..., scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x90, 0x80) }, ...); This sets up a scheduler environment for your new program. The numeric parameters are max_prio and base_prio. When you later specify priorities using the scheduler interface in your program, the actual prio of your threads will be calculated: prio := base_prio + selected_prio; if (prio > max_prio) prio := max_prio; > anyway, can we schedule these Threads by group? not just set the > scheduling parameters of Thread one by one. You need to set the scheduling parameters for every newly created thread separately. If you use the pthread interface, this will be done by the library and all threads will have the same prio. In combination with the Lua scheduler settings this might be what you want. Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlRZ61EACgkQP5ijxgQLUNn58ACfXN2gmSGxUMD602bB2h26mIbq VssAniec6EQs4q1VTo/0zVBj1mgQgm0Q =oY4R -----END PGP SIGNATURE-----

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