l4-hackers

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2827 discussions

L4 & ADX
by Frederic BOYER 29 Jun '04

29 Jun '04

Hello L4 hackers ! I restarted to work on my project ADX (write a real time unix like OS on top of L4). In fact I restart from scratch. I did not work on it since two years, and all my old sources died with my old computer and its hard drive. I plan to port GNAT run-time on top of L4 and begin to write the servers on top of it. do this projet interest any body ? Thanks to contact me and give me your feeling about this project. Frederic BOYER. "This message, including any attachments may contain confidential and privileged material; it is intended only for the person to whom it is addressed. Its contents do not constitute a commitment by Credit Agricole Cheuvreux except where provided for in a written agreement. Credit Agricole Cheuvreux assumes no liability or responsibility for the consequences arising out of a delay and/or loss in transit of this message, or for corruption or other error(s) arising in its transmission and for any misuse or fraudulent use which may be made thereof. If you are not the intended recipient, please contact us and abstain from any disclosure, use or dissemination. To the extent that this message contains research information and/or recommendations, these are provided on the same basis as Credit Agricole Cheuvreux's published research and the recipient must have regard to all disclosures and disclaimers contained therein."

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KernelInterface @ IA32
by Louis 16 Jun '04

16 Jun '04

Hi L4 hackers, I'm a newbie in L4 and reading L4 X.2 spec. In IA32 interface, KernelInterface is implemented by 'lock: nop'. That really confuses me. Is it not just a placeholder? Any special side-effect? I can not find any clue in IA32 manuals. Yours truly, - Louis

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ANNOUNCE: L4Ka::Pistachio version 0.4
by Espen Skoglund 04 Jun '04

04 Jun '04

The L4Ka team is happy to announce the release of L4Ka::Pistachio version 0.4. With L4Ka::Pistachio the L4Ka team aims at providing a robust, portable, high performance implementation of the L4 Version 4 API. It has been a long time since our last release, but we hope that all the new functionality and bug fixes were worth the wait. Among other things, the version 0.4 release adds support for 3 new hardware architectures. All in all the L4Ka::Pistachio kernel now runs on the following architectures: o Intel IA32 (Pentium and higher) o Intel IA64 (Itanium1, Itanium2, Ski) o AMD64 [NEW] o PowerPC 32bit (IBM 750) o PowerPC 64bit (Power3, Power4) [NEW] o Alpha (21164) o MIPS 64bit (R4000, VR41xx, R5000) o ARM (SA1100, XScale, ARM925T) [NEW] L4Ka::Pistachio version 0.4 incorporates a number of enhancements, modifications, and bug fixes. The following is a list of the major architecture independent changes since the last release: o Most system calls have been extended to report error codes upon failure. This substantially improves the ease of application development. o The kernel now implements "over-mapping" of flexpages correctly. Over-mapping occurs when a new page frame is mapped into the location of an already existing page frame in the destination address space. o Better support for reporting and resetting reference bits. o The ExchangeRegisters system call has been modified so that it can no longer activate inactive threads. o The L4 Version 4 API now specifies an architecture independent protocol for communicating boot loader specific data to the application programs. This protocol is supported by several L4 bootloaders (including kickstart). o Sigma0 now implements setting of memory attributes. o A bug (actually several bugs) in sigma0 would in some cases cause sigma0 to refuse to hand out certain memory regions, or cause incorrect memory to be handed out. o A new 'grabmem' example application has been added to the distribution. The following is a list of architecture specific changes and additions: Alpha: o Added FPU support. o Implemented SystemClock system call. AMD64: o This release adds support for the AMD64 architecture to L4Ka::Pistachio. o The AMD64 kernel is almost feature complete. It only lacks support for I/O flexpages and implementations of the Lipc, ProcessorControl and MemoryControl system calls. It also does not support SMP yet. o The kernel also features a hand-optimized fast IPC path. ARM: o This release adds support for the ARM architecture to L4Ka::Pistachio. o PLEB (Intel StrongARM SA-1100), Intel XScale IXP425 and TI OMAP1510 (ARM925T) platform support is included. o The kernel features fast address-space switching (FASS) [1] as a compile option. o The kernel is currently missing a fast-IPC path. Even without this optimization, context-switching and IPC performance across address spaces, when FASS is used appropriately, improves on any existing ARM implementation of L4 by approximately two orders-of-magnitude. o As with other architectures in L4Ka::Pistachio, currently no LIPC optimization is implemented - the LIPC path is identical to the IPC path. IA32: o Added a proper implementation of the SystemClock system call. o The support for small address spaces has been greatly improved. o Fixed a bug in the interrupt handing code that caused edge triggered interrupts to be handled incorrectly. o The kickstart utility now handles a number of command line options (see http://l4ka.org/projects/pistachio/kickstart.php for details). IA64: o The kernel now supports lazy handling of the upper 96 floating-point registers. o Preliminary support for performance profiling has been added. o Fixed a bug in the fast-IPC path that could cause interrupt handling to crash the kernel. o Low-level performance optimizations. o Fixed SystemClock system call to always report correct times. MIPS 64bit: o The kernel has been fixed to compile without debugging. o Added support for NEC VR41XX processors. o Changed the system call encoding. o The fast-IPC path has been fixed. o Reworked the exception handling code. o More accurate timer implementation. o Floating point support. o SMP support. PowerPC 32bit: o The kernel can run without debugging and without the debugger. o Proper exception message dispatching, including support for the system call exception. o Added correct implementation of the SystemClock system call. o Can prevent verbose kernel initialization. o Added a user-level I/O driver for the psim COM port, which can be used when the kernel is compiled without debug support. o Code restructuring to (1) minimize code, (2) improve readability, and (3) parameterize more kernel features. PowerPC 64bit: o This release adds support for the 64 bit PowerPC architecture to L4Ka::Pistachio. o The kernel supports Power3 and Power4 architectures (no SMP). o Optimized selective SLB replacement context switching on Power4. For more information on L4Ka::Pistachio and the L4 Version 4 API in general, refer to the L4Ka::Pistachio whitepaper: http://l4ka.org/projects/pistachio/pistachio-whitepaper.pdf L4Ka::Pistachio is available under the two-clause BSD license. Source and binary distributions, documentation, and other online resources can be found on the L4Ka website: http://l4ka.org/ The latest version of L4Ka::Pistachio, including any changes since the latest release, is also available through a public read-only CVS repository. See our website for instructions on how to access the public CVS. Happy hacking, The L4Ka Development Team [1] A. Wiggins, H. Tuch, V. Uhlig, and G. Heiser. Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor. In Eighth Asia-Pacific Computer Systems Architecture Conference (ACSAC'03), Aizu-Wakamatsu City, Japan, September 23-26, 2003.

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Re: ARM Port of L4/Linux?
by Yann Dirson 04 Jun '04

04 Jun '04

Hi Dave, You'll find more info about L4 for various archs on http://os.inf.tu-dresden.de/L4/impl.html L4Ka::Pistachio is also told to work on ARM, but not the 0.3 release AFAIK - see http://l4hq.org/arch/arm/ HTH, -- Yann Dirson <ydirson(a)altern.org> | Why make M$-Bill richer & richer ? Debian-related: <dirson(a)debian.org> | Support Debian GNU/Linux: Pro: <yann.dirson(a)fr.alcove.com> | Freedom, Power, Stability, Gratuity http://ydirson.free.fr/ | Check <http://www.debian.org/>

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bochs/plex86 vs. qemu
by Yann Dirson 03 Jun '04

03 Jun '04

Hi Fiasco team, I see in http://os.inf.tu-dresden.de/fiasco/wishlist.html that someone had the idea that porting plex86 to L4 would be useful. Incidently, I had a similar idea a couple of weeks ago, but I was more thinking about qemu, so I was wondering whether qemu had been considered here. One major benefit I see is that qemu is a fast multi-architecture emulator (although only x86 support is complete for now, powerpc appears to be on good tracks), and would make it possible to run OS for arbitrary processors. Interested people can check it a thttp://fabrice.bellard.free.fr/qemu/ Best regards, -- Yann Dirson <ydirson(a)altern.org> | Why make M$-Bill richer & richer ? Debian-related: <dirson(a)debian.org> | Support Debian GNU/Linux: Pro: <yann.dirson(a)fr.alcove.com> | Freedom, Power, Stability, Gratuity http://ydirson.free.fr/ | Check <http://www.debian.org/>

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ARM Port of L4/Linux?
by David Krause 29 May '04

29 May '04

As far as I can tell, L4/Linux only runs on x86. Is there an ARM port in existence, or in progress that a kind soul on this list could point me to? Thanks in advance, -- Dave

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ipc- where to send message(ipc).
by manish regmi 27 May '04

27 May '04

thanks, i got it. The client need to request tid of the server to name space server. But how much does it slows down a system. For example servers like i/o severs and fileservers need to be frequently called. Some systems like QNX decreases the no. of message passing by directly sending messages to file descriptor(fd) once a file is opened.i.e. directly send to i/o manager. will it be good to implement? thanks >Manish, > >(You were asking both the list and me, so I repeat here) > > > I am new to l4. Is it true that the allocation of tid is given to user. >How >[...] > > >Kind of. As Espen said, the Microkernel provides no name space (except its >namespaces for kernel resources such as threads, tasks and memory). >This must be done at user level. > >*One* scheme is to have names ("strings") for servers, and identify >servers (their offered services) by these names. Then servers have to >register their (string, thread_id) pair at a nameserver, and clients have >to ask the nameserver for the (string -> thread_id) translation. Of >course, the nameserver must somehow be found. In the case of DROPS (our >OS on top of L4), this nameserver is registered at rmgr, and rmgr has a >fixed and well-known threadid. Thus, name resolution works as follows: >The client asks the rmgr (threadid 4.0 per definition) for the threadid of >the nameserver, and then the nameserver for the threadid of the target >server. The rmgr does not have the flexibility we need for dynamic name >registering, therefore the nameserver. > >*Other* policies could for instance be one hierarchical namespace, >resolved by a root nameserver and client nameservers. The root nameserver >(and the client nameservers) could provide mounting other namespaces. This >way one could construct a namespace comparable to the UNIX filesystem >namespace. Drivers could per definition be found under a name like >'/dev/*'. A user-land file system could provide the part of the namespace >for /home/, another for /proc/, and another for /usr/. > >You should watch our seminar page, in a couple of weeks some slides about >namespace issues should show up. > > >Regards, >Jork > _________________________________________________________________ Help STOP SPAM with the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail

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ipc- where to send message(ipc).
by manish regmi 26 May '04

26 May '04

hi, I am new to l4. Is it true that the allocation of tid is given to user. How do i know the tid of the server i am sending a msg to? What should i do for a robust design. Giving a static tid for server threads is not flexible. What would be a more flexible way. What have others done. thanks. _________________________________________________________________ Tired of spam? Get advanced junk mail protection with MSN 8. http://join.msn.com/?page=features/junkmail

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ipc- where to send message(ipc).
by manish regmi 25 May '04

25 May '04

hi, L4 send a message using a thread id. how will an application developer will know where to send the thread. he needs to know the tid of the server which is making a receive call. how to we know at runtime, which thread of File server(say) is receiveing a read() request. I mean how is namespace resolved in l4. thanks _________________________________________________________________ The new MSN 8: smart spam protection and 2 months FREE* http://join.msn.com/?page=features/junkmail

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L4Linux booting problems
by Luis Araujo 25 May '04

25 May '04

Hi, i got a problem with L4Linux while booting, Im using: L4Ka::Pistachio Downloaded from CVS 23 - 05 - 2004 Compiling Pistachio and L4Linux with gcc-3.3.1 Debian3.0 ramdisk1.0 This is the grub menu.lst: title=L4Linux on L4Ka::Pistachio with Debian ramdisk kernel=/l4boot/kickstart module=/l4boot/ia32-kernel module=/l4boot/sigma0 module=/l4boot/vmlinuz.VX2 devfs=mount ramdisk_size=65536 root=/dev/ram0 rw console=herc console=tty module=/l4boot/ramdisk.gz Everything goes fine during configuration and compilation, and it starts up booting with no problem at all, until it reaches "Starting kswapd" , then it stops in that line, do i need to set (or unset) something in the configuration? Any help is appreciated, Thanks -- Luis

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