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L4 Bootsrap Fiasco Addr
by Wölfel, Tobias 10 Oct '14

10 Oct '14

Hello All, I am working on porting Fiasco.OC to openrisc (or1k), but are stucked at booting the kernel. The problem is that the addr in boot_info.kernel_start is pointing to the beginning of the bootsrap, and therefore it will not start the kernel. In startup.cc there is the mbi, mb_info and mb_mod, which I suppose is the place where the addr is coming from. But where is it set exactly? For or1k IMAGE_MODE is used. The output of the bootstrapping is at the end. Thanks a lot for the help, Tobias " Loading fiasco [0x1103000-0x1104000] [0x1104000-0x11040ac] [0x11040ac-0x112c340] [0x112c340-0x1134468] [0x1135000-0x1135a84] [0x1135a84-0x1136000] boot_info.kernel_start 100 Loading sigma0 [0x100000-0x107ff4] [0x108000-0x10c17c] Loading foo find kernel info page... found kernel info page at 0x1103000 Regions of list 'regions' [ 100, 1d403] { 1d304} Boot bootstrap [ 128ac, 1291e] { 73} Boot mbi [ 17000, 171ab] { 1ac} Root Multiboot info [ 1d058, 1d0af] { 58} Boot mbi [ 100000, 10c17b] { c17c} Sigma0 sigma0 [ 1100000, 11001d3] { 1d4} Root Module [ 1103000, 1135fff] { 33000} Kern fiasco API Version: (87) experimental Sigma0 config ip:00100344 sp:0001b040 Roottask config ip:00000000 sp:00000000 Starting kernel fiasco at 00000100 "

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Thread synchronization with in the same address space
by teclis High Elf 10 Oct '14

10 Oct '14

I have two threads running in the same server. On thread handles incoming ipc messages from the clients in different address spaces and the other thread does the work. The thread handling the incoming ipc needs to pass an integer value to the worker thread. Could I synchronize them using int l4util_cmpxchg32 <https://os.inf.tu-dresden.de/L4Re/doc/group__l4util__atomic.html#gacb4a5e47…> (volatile l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> *dest, l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> cmp_val, l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> new_val) the worker thread could then check the value of dest to get the integer. Would the worker thread need to use an atomic read function when it reads the value of dest and if so which function would the worker thread use for the atomic read? thanks,

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examples/libs/l4re/c++/shared_ds/ds_clnt.cc
by teclis High Elf 10 Oct '14

10 Oct '14

>From examples/libs/l4re/c++/shared_ds/ds_clnt.cc line 49 : L4::Cap<L4::Irq> irq = L4Re::Util::cap_alloc.alloc<L4::Irq>(); It seems this template name L4::Cap and the function name L4Re::Util::cap_alloc are a bit misleading or only designate a sub-set of the objects functionality. In this line you are not just requesting permissions but getting a Unix style file handle that you then use to issue commands to the server on line 92: irq->trigger(); Is my understanding correct? At line 49 you are opening L4 equivalent of a Unix style file handle for sending commands to a server and not requesting permissions or am I over simplifying. thanks

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contiguous memory blocks and zero copy
by teclis High Elf 09 Oct '14

09 Oct '14

How does L4Re handle contiguous memory blocks? What are the system calls used to allocate and manage contiguous memory? Is it possible to do zero copy data transfer between drivers and if so how is it done in Fiasco (so in linux world you would say no copy_to_user() and copy_from_user() ) thanks,

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l4linux shutdown cleanup
by Masti Ramya Jayaram 09 Oct '14

09 Oct '14

Dear all, I would like to perform some cleanup operations after l4linux shuts down..such as zero out all the memory it used and re-encrypt the original vmlinux image. I would like to know how I could do this from sigma0 preferably or even in the fiasco kernel. Could anyone point me to where the clean up procedure (release of resources) occurs once l4linux shuts down? Thanks, Ramya

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JDB and thread ids
by teclis High Elf 09 Oct '14

09 Oct '14

What command in JDB gives me a list of thread IDs I can use with the other thread commands. I tried the list tasks and didn't see anything that looked like a thread id.

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Re: Graphical desktop, l4con, mag
by 000SKY 09 Oct '14

09 Oct '14

>>>> > > > fbdrv | To force a specific setting use a '-m <mode>' option. >>>> > > > fbdrv | L4Re[rm]: mapping for page fault failed with -34 @1a0000 >>>> > > > pc=1006452 >>>> > > > fbdrv | L4Re: unhandled exception: pc=0x1006452 There is a way to fix it. You can modify x86-legacy.devs,as follows: VGA = Hw.Device { hid = "PNP0900"; Res.io(0x3b0, 0x3bf); -- MDA Res.io(0x3c0, 0x3df); -- EGA/VGA Res.io(0x1ce, 0x1d0); -- Vbox Res.io(0x402, 0x402); -- QEMU Debug Port Res.mmio(0xa0000, 0xbffff); --Here lost a parameters. Changed to Res.mmio(0xa0000, 0xbffff,0xc000); },

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Ned,moe, l4linux interaction
by Masti Ramya Jayaram 01 Oct '14

01 Oct '14

Dear all, I see that in the default l4linux configuration, it uses ned, moe to start up. However, I am not sure about the run-time interaction between them. More specifically, a. Does l4linux need them during its run-time? For example, does l4linux go directly to sigma0 for memory or does it go through ned? b. Do ned and moe get killed once they start l4linux or not? Thanks, ramya

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Difference between capability and memory mapping
by Yuxin Ren 01 Oct '14

01 Oct '14

Hi All, I found in the kernel, the capability mapping and memory mapping have very similar code path. But I found their performance difference is around 1000 cycles. Is this true? If it is true, why do they have such large difference? If this gap does not make sense, it should be a bug in my test. Thank you very much. Best, Yuxin

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Repository Update
by Adam Lackorzynski 28 Sep '14

28 Sep '14

Hi, the repository and snapshots have been updated and I'm happy to announce a couple of new features: - L4Re supports ARM virtualization (HYP mode) now. There's a 'vmm' package that allows to run unmodified Linux, however, it might still have some rough edges. - With that ARM exception error codes have been changed to use HYP's HSR style, also for non-HYP kernels! - gcc-4.9 support, including libstdc++, and preparations for gcc-5 - EFI is available as a boot method now, both in 32 and 64 bit modes - x86 power management has been improved - Stackprotector support is available in L4Re now - The console server 'cons' has been added - Fiasco runs on more ARM targets, including Xilinx Zynq (Zedboard, Parallela), OMAP5, Allwinner (Cubieboard, Cubietruck) - More examples have been added - 3rd-party packages have been updated - L4Linux has been upgraded to version 3.16. Adam -- Adam adam(a)os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/

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