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Re: [ASK] Basic L4Re
by Matthias Lange 01 Dec '14

01 Dec '14

Hi, I'm posting this on l4-hackers also, as it might be of interest for other people as well. On 11/27/2014 04:27 PM, Erry Pradana Darajati wrote: > Greeting Mr. Matthias, > Thank you for the help in my last email. I have already solve some of my > problem thanks to your help. > But i still have some problem and question : > > 1. About the IO server you mentioned before. I still cannot fully > comprehend about the OMAP3 driver you said earlier. As i study in > OMAP4460 TRM, i have know the memory that directly accessed to make GPIO > of OMAP4460 (Pandaboard) works. And i already make it works with a > hardcoding (code without L4Re API) by assign directly the memory address > of GPIO. Can you help me to short explain or gave me a reference about > IO server and how to use it to access the memory address of GPIO ? I am not exactly sure what you mean. Instances of the GPIO driver are created through Lua configuration files. You can see an example in io/config/plat-rpi_b/hw_devices.io. There you can also specify the memory base address of the GPIO chip. An example for Omap3 looks like this: GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap35x_chip(function() hid = "gpio-omap35x-GPIO1"; compatible = {"ti,omap3-gpio"}; regs = Res.mmio(0x48310000, 0x48310fff); irq = Res.irq(29); scm_table = 0; end); end); > 2. I still studied the basic of L4Re, and try to run an hello-cfg entry > in modules.list. But when i run using make qemu, it gave an error like > this. > "make[1]: Entering directory `/media/chiqiVstorage/l4resnap/src/l4' > Could not find 'hello.cfg' with path > '/home/erry/l4resnap/src/kernel/fiasco/build86/:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2/l4f:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2/l4f' > make[1]: *** [qemu] Error 1 > make[1]: Leaving directory `/media/chiqiVstorage/l4resnap/src/l4' > make: *** [qemu] Error 2" > > where did i go wrong ? You need to add /media/chiqiVstorage/l4resnap/src/l4/conf/examples to your MODULE_SEARCH_PATH. Best, Matthias. > Sorry for the basic question. Any answer and response is really helping > me understand this research and project better, and i really appreciate > that. > > 2014-10-13 15:23 GMT+07:00 Matthias Lange > <matthias.lange(a)kernkonzept.com <mailto:matthias.lange@kernkonzept.com>>: > > Hi, > > On Sat, Oct 11, 2014 at 01:21:11AM +0700, Erry Pradana Darajati wrote: > > Hello L4 Hackers > > > > I am working on a project with L4Re in Pandaboard for my College Final > > Project. And right now i am in a stuck. > > > > So far, i have already know how to boot, print and read from the serial > > port (UART3) of pandaboard. But i can't understand the fundamental / basic > > of L4Re itself. > > A good starting point is the L4Re documentation [0]. This should get you > started. > > > Like how to make a new program outside the main program of "hello" (i am > > using hello code all of this time to experimenting). And also how to access > > the memory of the host computer using L4Re code. > > Just create a new directory within you pkg directory. From there you > can call > '../../mk/tmpl/inst' which installs the default directory hierarchy and > Makefiles. > > > Because the main goal of the project i am working on is be able to access > > the GPIO of Pandaboard. > > The io server already provides infrastructure and the API for GPIO > drivers. > Please have a look at the existing BCM2835 and OMAP3 drivers. > > > And also, is there is any way to recompile L4Re without recompiling all of > > the module it use. Because in my computer it took a time to recompile even > > the change is only a line of code > > You have multiple possibilities. Change into your pkg's directory > and call > 'make -jX O=/path/to/obj/dir' or from your build directory you can > call 'make > -jX S=YOUR_PKG_NAME'. Note that the latter will not check and > rebuild the pkg's > dependencies. > > Matthias. > > [0] http://os.inf.tu-dresden.de/L4Re/doc/ > > > -- > Matthias Lange, matthias.lange(a)kernkonzept.com > <mailto:matthias.lange@kernkonzept.com>, +49 - 351 - 41 88 86 14 > > Kernkonzept GmbH. Sitz: Dresden. Amtsgericht Dresden, HRB 31129. > Geschäftsführer: Dr.-Ing. Michael Hohmuth > > > > > -- > /Regards,/ > /Erry Pradana Darajati | *Student of Computer Engineering*/ > /*Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*/

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Server loop does not call dispatch only when running in pthread
by Tobias Sturm 24 Nov '14

24 Nov '14

Hi, I want to have the loop() method of a Registry_server instance inside a pthread. When the client sends messages, I get the IPC error 35 (could not figure out what that error code means). As soon as the loop() is invoked in my main thread, messages come through. Here is some pseudo code: start_thread() { //pack args int err = pthread_create(&my_thread, NULL, &thread_fn, &args); printf("pthread_create says %d", err); } thread_fn(args) { L4Re::Util::Registry_server<>* svr = args.server; server_obj* my_server = args.server_obj_instance; svr->registry()->register_obj(my_server, "foo"); svr->loop(); } class server_obj : public L4::Server_object { public: int dispatch( ... ); } server_obj::dispatch(...) { //never called } Thanks, Tobi

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Run and debug Fiasco.OC kernel and L4Re using a DSTREAM JTAG device and the ARM DS-5 IDE
by Mahdi Aichouch 21 Nov '14

21 Nov '14

Hello to everyone, I have a Freescale i.MX 6 ARM Cortex A9 Sabre SD board. I would like to test the Hello World example using the generated bootstrap.elf binary. I compiled the fiasco kernel and the l4re framework for the i.MX 6 ARM Cortex-A9 using the menu configuration in both cases. Instead of using an SD card to run the binary on the board, I would like to flash the RAM with the binary using the DSTREAM JTAG device and the ARM DS-5 IDE. I connected the board to my host using the mini-usb to serial cable, and I used minicom tool as a serial terminal. I tried to run the binary using the DS-5 debugger while the board is connected through JTAG, but I didn't see any debug message on the serial terminal. The source code I am using is from the "l4re-snapshot-2014092821". My questions: 1) Does anyone tried to run and debug fiasco kernel + l4re on a board using a JTAG device? What are the steps that I am missing? 2) The debug tool print a message saying that "WARNING(IMG53): bootstrap.elf has no source level debug information", what are the options required to include these information compiling the fiasco kernel + l4re? Thank you very much in advance. Best regards, Mehdi PS: screenshot of the IDE debugger view

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SMP
by teclis High Elf 11 Nov '14

11 Nov '14

How does the fiasco L4Re do SMP? Are there commands for CPU affinity? How can I assign a specific process to a CPU? thanks,

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Second UART and console
by teclis High Elf 10 Nov '14

10 Nov '14

Hi, I have a board with two UARTs on it and I need a second independent console connected to the other UART ( I have multiple virtual machines and I want to give each their own console). What would be the best approach for this? I see the UART drivers are linked into bootstrap. Does the same driver from bootstrap remain resident in memory and become part of the address space of con once its starts? Would I need to spawn a separate instance of con or could it be modified to support multiple consoles? thanks

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memory layout
by Tobias Woelfel 07 Nov '14

07 Nov '14

Hello everybody, I am still working on the port for openrisc and have now some questions concerning the memory layout. (kern/xxx/mem_layout-xxx.cpp) What parts are necessary, and what do they mean? For example in the arm architecture there is Map_x, Caps_x, Kernel_x, Pmem_x... Are there any restrictions on how big/small one area has to be? What is the phys_to_pmem function supposed to do? (what does pmem stand for?) Thanks Tobias

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How to monitor thread scheduling and the criticality of tasks?
by Karl Steger 05 Nov '14

05 Nov '14

Hi L4 hackers, How can you monitor how threads are scheduled for execution in L4Re? The trace buffer does not seem to offer information about the criticality of tasks. The l4re-snapshot-2014092821, however, refers to a monitoring framework named "ferret" in /obj/l4linux/ux/source/arch/l4/Kconfig but does not provide its source code. Is ferret publicly available? Do you know of any alternatives? Thanks and regards, Karl

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Re: Question about schedule policy
by Björn Döbel 05 Nov '14

05 Nov '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, On 05.11.2014 04:18, Kevin wrote: > Thanks for your answer, please always reply to the mailing list. The answers may also be interesting to other people. > Maybe my question is confused. I know the concept of class > "Thread",It'sa runnable, schedulable activity, and a Task has many > Threads, and Task is just some address spaces. > > So, my question is: If there are many Tasks, for example, Task A > and Task B, and I want each Thread of Task A has a higher priority > than B's, what should I do? Fiasco schedules threads in a priority-based, round-robin fashion. That means it always selects the thread with the highest priority (per CPU). If multiple threads with the same prio exist, they get equal shares of the CPU. You can set a thread's priority upon creation using the l4_scheduler_*() system calls. There are examples of that in l4/pkg/examples - grepping for 'scheduler_' should do the trick. Furthermore, you can also set the prio of threads within the Lua init scripts. For that purpose you do something like: loader:startv({ caps = ..., log = ..., scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x90, 0x80) }, ...); This sets up a scheduler environment for your new program. The numeric parameters are max_prio and base_prio. When you later specify priorities using the scheduler interface in your program, the actual prio of your threads will be calculated: prio := base_prio + selected_prio; if (prio > max_prio) prio := max_prio; > anyway, can we schedule these Threads by group? not just set the > scheduling parameters of Thread one by one. You need to set the scheduling parameters for every newly created thread separately. If you use the pthread interface, this will be done by the library and all threads will have the same prio. In combination with the Lua scheduler settings this might be what you want. Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlRZ61EACgkQP5ijxgQLUNn58ACfXN2gmSGxUMD602bB2h26mIbq VssAniec6EQs4q1VTo/0zVBj1mgQgm0Q =oY4R -----END PGP SIGNATURE-----

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Question about schedule policy
by Kevin 04 Nov '14

04 Nov '14

Hello, I know the class "Task" in fiasco is equaled with the word "Domain" in VMM, but I can't find some schedule policy about Task in fiasco, all I find is scheduling about Thread in class Context and sched_context. So, is there any schedule policy about Task? thanks, kevin

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is there a way to run the compiled arm on Nexus S ?
by cem akpolat 03 Nov '14

03 Nov '14

Dear all, I have compiled couple of days ago l4android for arm architecture, and now I want to boot it on Nexus S, however, I couldn't find a way to tun bootstrapLinuxAndroid.elf file on arm based architecture. I have already seen in some research papers (one of them is as follows). http://www.isti.tu-berlin.de/fileadmin/fg214/liebergeld/spsm03-lange.pdf How could be l4android booted on the Nexus S? Thanks, Best Regards, Cem Akpolat

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