Hello l4-hackers,
I am currently working on porting the Fiasco.OC micro kernel onto the
Raspberry pi 2.
Therefore, I am struggling with memory mapping, and I encounter the
following error when launching the default 'hello' entry:
L4 Bootstrapper
Build: #2 Tue Feb 23 11:57:19 CET 2016, 4.8.3 20140303 (prerelease)
Scanning up to 1024 MB RAM, starting at offset 32MB
Memory size is 1024MB (00000000 - 3fffffff)
RAM: 0000000000000000 - 000000003fffffff: 1048576kB
Total RAM: 1024MB
…
[View More]Scanning fiasco
Scanning sigma0
Scanning moe
Moving up to 5 modules behind 1100000
moving module 02 { 10db000-110c4d7 } -> { 11cc000-11fd4d7 } [201944]
moving module 01 { 10c9000-10da373 } -> { 11ba000-11cb373 } [70516]
moving module 00 { 1043000-10c889f } -> { 1134000-11b989f } [546976]
moving module 04 { 1029000-10425af } -> { 111a000-11335af } [103856]
moving module 03 { 100f000-102849b } -> { 1100000-111949b } [103580]
Loading fiasco
Loading sigma0
Loading moe
find kernel info page...
found kernel info page at 0x2000
Regions of list 'regions'
[ 1000, 1aff] { b00} Kern fiasco
[ 2000, 92fff] { 91000} Kern fiasco
[ 93000, 930eb] { ec} Root mbi_rt
[ c0000, c9c33] { 9c34} Sigma0 sigma0
[ d0000, d6177] { 6178} Sigma0 sigma0
[ 140000, 16905b] { 2905c} Root moe
[ 170000, 17b58b] { b58c} Root moe
[ 1000000, 100e4ff] { e500} Boot bootstrap
[ 1100000, 1133fff] { 34000} Root Module
API Version: (87) experimental
Sigma0 config ip:000c0100 sp:00000000
Roottask config ip:00140250 sp:00000000
Starting kernel fiasco at 000012b8
Non-HYP kernel detected but running in HYP mode, switching back.
Hello from Startup::stage2
Assertion failed
at /home/adebut/Documents/snapshotTest/l4re-snapshot-2015123115/src/kernel/fiasco/src/kern/buddy_alloc.cpp:101:
(unsigned long)block >= _base
Press any key to reboot.
I am currently working on the latest snapshot (2015123115), with
U-Boot as a bootloader, and testing on a real board (Raspberry Pi 2
model B V1.1). The entry built is the standard 'hello', and I use the
ramdisk-arm.rd given in the snapshot.
I did add a custom Bsp for the board, mainly based on the first
Raspberry Pi except for the Base Address, that is 0x3F000000
instead of the first Pi's 0x20000000.
I highly think that it is an address configuration problem, because it
first happened when I did expand the RAM size to 1024MB.
With further investigation, I found out that it was the kernel memory
allocation that causes this error, and suspect an incorrect MMU mapping.
This suspicion comes from the fact that the assertion takes the address
_base (0xf0400000) and the currently allocated block (0xee100000).
I did not modify any parameter in the kern/arm/mem_layout-arm.cpp file
on the Fiasco directory, which provides the default ARM addressing.
Maybe that's where my error comes from ? How can I correctly configure
my memory mapping, besides what I already configure in the Bsp (given in
attachment) ?
Also, it is the first time that I am assigned for porting a system, do
you have some hints, like important steps to follow ?
I am pretty sure it is a newbie error, but I cannot figure it out for
now :(
Thanks in advance for your time,
--
Antoine Debut
EPITA 2016 - GISTRE
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Hello everyone,
I am having trouble getting the network to work on L4Linux running on
the zedboard. I have enabled the macb driver which my net card needs, I
have created a device tree telling l4linux where to find the device and
I have written the io configuration.
The problem is that L4linux doesn't have access to the 3 clocks it needs
for the network device to work. Those are "pclk", "hclk", "tx_clk". I
understand that I have to assign those clocks to l4linux. But how can I
do that? I …
[View More]cannot find any examples of assigning clocks. Won't this
create an issue to the Fiasco kernel? Should the driver use "l4kipclk"
instead of "pclk"?
Below you will find the dmesg output, my io files, my cfg file and the
device tree.
Thank you for your time and help!
Manolis
----dmesg output part begin----
__l4x_ioremap: Mapping physaddr e000b000 [0x1000 Bytes, e000b000+001000]
to 00002000+000000
/amba/ethernet@e000b000: could not find phandle
ERROR: could not get clock /amba/ethernet@e000b000:pclk(0)
macb e000b000.ethernet: failed to get macb_clk (4294967294)
macb: probe of e000b000.ethernet failed with error -2
----dmesg output part end----
---- zynq.dts begin ----
{
model = "L4Linux (DT)";
compatible = "L4Linux";
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
amba {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <0x3>;
ranges;
ethernet@e000b000 {
compatible = "cdns,zynq-gem", "cdns,gem", "cdns,macb";
reg = <0xe000b000 0x1000>;
status = "okay";
interrupts = <0x0 0x16 0x4>;
clocks = <0x1 0x1e 0x1 0x1e 0x1 0xd>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
phy-mode = "rgmii-id";
phy-handle = <0x4>;
ethernet-phy@0 {
reg = <0x0>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
};
};
};
---- zynq.dts end ----
---- zedboard.devs begin ----
local Res = Io.Res
local Hw = Io.Hw
Io.hw_add_devices(function()
NIC = Hw.Device(function()
compatible = {"cdns,zynq-gem", "cdns,gem", "cdns,macb"};
Property.hid = "cdns,zynq-gem";
Property.flags = Io.Hw_device_DF_dma_supported;
Resource.irq = Io.Res.irq(54);
Resource.mem = Res.mmio(0xe000b000, 0xe000bfff);
end);
end);
---- zedboard.devs end ----
---- hw_devices.io begin ----
local Hw = Io.system_bus()
Io.add_vbus("l4linux", Io.Vi.System_bus
{
ethernet = wrap(Hw.NIC);
})
---- hw_devices.io end ----
---- l4lx.cfg begin ----
local L4 = require("L4");
local loader = L4.default_loader;
local lxname = "vmlinuz";
-- Start io
vbus_l4linux = loader:new_channel();
local vbus_input = loader:new_channel();
loader:start(
{
caps = {
sigma0 = L4.cast(L4.Proto.Factory,
L4.Env.sigma0):create(L4.Proto.Sigma0);
icu = L4.Env.icu;
input = vbus_input:svr();
l4linux = vbus_l4linux:svr();
},
log = { "IO", "y" },
l4re_dbg = L4.Dbg.Warn,
}, "rom/io rom/zedboard.devs rom/hw_devices.io");
L4.default_loader:start(
{ caps = {
vbus = vbus_l4linux;
},
l4re_dbg = L4.Dbg.Warn,
log = L4.Env.log:m("rws"),
},
"rom/vmlinuz mem=312M console=ttyLv0 " ..
"l4x_dtb=rom/zynq-zed.dtb " ..
"l4x_rd=rom/ramdisk-" .. L4.Info.arch() .. ".rd "
.. "root=1:0 ramdisk_size=5000");
---- l4lx.cfg end ----
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