l4-hackers

l4-hackers@os.inf.tu-dresden.de

2 participants
2880 discussions

Obtaining and accessing device abstractions in L4Re
by Paul Boddie 22 Jul '17

22 Jul '17

Hello, I've been trying to write some drivers in L4Re, starting out with a GPIO driver for a currently-unsupported board, and I think I have mostly understood the concepts involved. Fortunately, there are already a couple of drivers to borrow ideas from... pkg/io/io/server/src/drivers/gpio/bcm2835.cc pkg/io/io/server/src/drivers/gpio/omap.cc And if I am not mistaken, such drivers can be accessed from other components by just doing something like this (testing for validity as we go): vbus = l4re_env_get_cap("vbus"); l4vbus_get_device_by_hid(vbus, 0, &gpio_handle, gpio_hid, 0, 0); l4vbus_gpio_set(vbus, gpio_handle, gpio_reg, value); It appears that if I just declare the device appropriately in my board's hw_devices.io file, I should be able to get a handle for it using code like the above. And all access can apparently be done via the l4vbus_gpio functions with this handle. (I was also wondering if it was possible to actually instantiate or obtain a device directly instead of obtaining a handle, for code written in C++, but the above is easily good enough at the moment.) But now I want to make another, non-GPIO, driver abstraction, instead of directly accessing the mapped memory regions concerned (which I see that some of the drivers do). It seems like I should be able to... * define a class for the abstraction inheriting from Hw::Device * declare the device in hw_devices.io using this class * provide various properties in the hw_devices.io declaration (for configuration purposes) * read the properties in the actual class implementation * access registers in memory just as the GPIO drivers do I think I can muddle through all this. But how should another component access methods provided by this driver? Do I have to implement functionality like that provided by the following files...? pkg/io/libvbus/lib/src/vbus_gpio.cc pkg/io/libvbus/include/vbus_gpio-ops.h pkg/io/io/server/src/virt/gpio/vgpio.cc Does any of this make any sense? :-) I'm just getting started here, but thanks are due in advance for any advice anyone may have! Paul

2 3

Booting L4Re on the CI20: Panic in sigma0
by Paul Boddie 21 Jul '17

21 Jul '17

Hello, I've been trying to get Fiasco.OC and L4Re booting on the MIPS Creator CI20, starting out by building the "hello" example. The first obstacle was actually seeing the serial output, where the board appears to be configured to output to UART4 in the bootstrap package, but booting from an SD card produced no output. Although I thought I had messed up the preparation of the image, or that U-Boot was being fussy about the image addresses and failing to execute the payload, switching to UART0 and rewiring my connection got me some output. For reference, changing the UART involves a couple of modifications to pkg/bootstrap/server/src/platform/ci20.cc as follows: - kuart.base_address = 0x10034000; // UART4 + kuart.base_address = 0x10030000; // UART0 - kuart.irqno = 34; + kuart.irqno = 51; // UART0: 32 + 19 But now I appear to experience a panic in sigma0 as it starts up, with the message... Warning: Sigma0 raised an exception --> HALT Here are the regions: Regions of list 'regions' [ 0, 1db] { 1dc} Kern fiasco [ 1000, 10eb] { ec} Root mbi_rt [ 10000, 9d09f] { 8d0a0} Kern fiasco [ 140000, 184773] { 44774} Root moe [ 190000, 197f3f] { 7f40} Root moe [ 200000, 20be17] { be18} Sigma0 sigma0 [ 210000, 2161bf] { 61c0} Sigma0 sigma0 [ 2d0000, 2e33df] { 133e0} Boot bootstrap [ 1100000, 1164fff] { 65000} Root Module And the registers look like this: 00[ 0]: 00000000 at[ 1]: 80022e50 v0[ 2]: 00000001 v1[ 3]: 80000000 a0[ 4]: 00010000 a1[ 5]: 002000e0 a2[ 6]: ffffffe7 a3[ 7]: 00000401 t0[ 8]: 00000000 t1[ 9]: 00000401 t2[10]: 00000413 t3[11]: 82152f38 t4[12]: 82152000 t5[13]: 801873bc t6[14]: fffffffe t7[15]: 801873bc s0[16]: 82152f60 s1[17]: 00000400 s2[18]: 00000001 s3[19]: 00000000 s4[20]: 80090000 s5[21]: 00000000 s6[22]: 00000fa0 s7[23]: 00000000 t8[24]: 8008519c t9[25]: 800a0000 k0[26]: ffffffff k1[27]: ffffffff gp[28]: 800b7f80 sp[29]: 00000000 fp[30]: 80185000 ra[31]: 80010000 HI: 00000000 LO: 000003a8 Status 00000413 Cause 00000010 EPC 002000ec The EPC indeed appears to reference sigma0, with the Cause indicating an erroneous data or instruction fetch operation. Looking at the disassembly of sigma0... 002000e0 <__start>: 2000e0: 3c1c0001 lui gp,0x1 2000e4: 279c7f80 addiu gp,gp,32640 2000e8: 0399e021 addu gp,gp,t9 2000ec: 8f9d8018 lw sp,-32744(gp) 2000f0: 8f99801c lw t9,-32740(gp) 2000f4: 27bdfff0 addiu sp,sp,-16 2000f8: 0320f809 jalr t9 2000fc: 00000000 nop ...it appears that the problem occurs when the global offset table is accessed. The global pointer gets computed as... 0x10000 + 32640 + 0x800a0000 = 0x800b7f80 ...with the load-relative operation accessing... 0x800b7f80 - 32744 = 0x800aff98 It is presumably this address that is illegal within the failing thread of execution. I've been looking at the debugger documentation... http://l4re.org/fiasco/doc/jdb.pdf ...but I'm not sure I'm doing the right things to see the state of the machine. Attempting to dump the memory at that address appears to indicate inaccessible memory, but I imagine that this region might not be mapped within whichever "task" is active. Does anyone have any suggestions about how I can troubleshoot this problem? Thanks in advance, Paul

3 12

Open a shell for a an individual task
by Hennebold, Christoph 08 Jul '17

08 Jul '17

Hello, I'am trying to write an interactive client/server system which consists of a client component that runs its own shell, and the corresponding server which provides various interfaces. I was wondering if it is possible to spawn a shell for the client during the initialization with Ned or if it is possible at all? (Besides running Ned in interactive mode) Best regards!

2 2

Re: Define Addr. Space of Task
by ba_f 08 Jul '17

08 Jul '17

Hello again, this topic is still open. So, how can I link a Task to a specific address space? > Hi Adam, > > >> Linking a program to a specific location is well possible. >> However, the extra memory region is not part of the normal RAM but an >> extra piece of memory? How is it accessed? And how big is it? >> >> Adam > > > Yes, the secure ram is separate from the ordinary DRAM. > But, access to it is address based via ARM AXI. > > My design has a trusted L4re-App. > And i want to link the trusted app alone to the secure ram. > I argue that ordinary DRAM is easy to read out for an attacker that has > local access to the platform. > The secure ram is less easy to read-out, so the trusted app would be > more secure. > > > > > Greets, > > ba_f Thank you, ba_f

2 1

L4Re IPC share memory that share file in one Linux filesystem and be visible to other Linuxes
by Joyce Peng(彭美僑) 07 Jul '17

07 Jul '17

Hi L4, I want to share a file in one Linux filesystem and be visible to other Linuxes that all run on top Fiasco.OC. It seems an IPC communication between L4re vm tasks. And access a file in Linux filesystem is a mechanism of kernel block device driver. But I only notice two char device drivers that use L4re library l4shmc in L4linux. It is l4ser_shm and l4shmnet. May you give some information about this work how to work. Thanks. Joyce.peng(彭美僑)

2 3

Unit testing guidelines or resource
by jrodriguez＠uns.edu.ar 05 Jul '17

05 Jul '17

Hi L4 team, I'm looking forward for information about existent or recommended methodology to perform systematic test on single fiasco component or L4Re service. From what I see, there is not other option than running on qemu or target host. What I would really like is to get sort of fiasco&L4Re mock to be able to run systematic unit test on user level app but on my PC (avoiding the emulator). Any recommendation on this regard? Thought about fiasco UX, but not sure if that feature is still maintained. And if I jump into the complex task of designing this mock, any recommendation about l4re service which is more "isolated" from microkernel to take it as initial use case for such development? Well that's all by now. Thanks in advance for any feedback Best Agustin

2 1

Problem with L4re and L4Linux on Qemu/VMware
by Daniel (Xiaolong) Wang 27 Jun '17

27 Jun '17

Hi all, I’m sorry to bother, again… But I keep getting problems hope you can give me some advice. I’m trying to test out L4re +L4Linux on X86 and ARM i.MX6. I downloaded the newest l4re-snapshot-2006082114. I built Fiasco with Intel Pentium Pro and Virtualization (did not change anything else). I built L4re with Pentium Pro type CPU (everything else are default settings). Then I built L4Linux with the L4re builddir. I turned off 64-bit kernel, CPU selected Pentium-Pro, turned off most of the settings as the warning instructed. These are the settings of L4Linux that I enabled: Processor type and features: * DMA memory allocation support * Processor feature human-readable name * Fast CPU feature tests * Support for extended X86 platform * Single-depth WCHAN output * High memory support is OFF * Enable bounce buffers * X86 architectural random number generator * Enable seccomp to safety compute untrusted bytecode * Enable the LDT Power Management and ACPI options: * Suspend to RAM and standby * device power management core functionality * CPU Frequency scaling is OFF Bus Options: * PCI support * PCI access mode is Direct I was able to compile all three parts and build both iso image (for vmware fusion on macOS) and qemu simulator. I first tested hello, hello-cfg, hello-shared, frame buffer-example-x86, all of those works as expected. However when I tried to build L4Linux-basic and L4Linux-mag-x86. Not of them works. for L4Linux-mag-x86 the system shows a diagram “system is booting” then hang forever. for L4Linux-basic the image boot but freeze soon. The screen shows: l4cdds: No name given, not starting brd: module loaded l4cdds: no name given, not starting moused: ps/2 mouse device common for all mice l4x: Faking dummy RTC rtc_cmos rtc_cmos: rtc core: registered rtc_cmos as rtc0 rtc_cmos rtc_cmos: only 24-hr supported rtc_l4x: l4x-rtc: Could not find ‘rtc’ cap rtc_l4x: probe of rtc-l4x failed with error -2 NET: Registered protocol family 17 L4IRQ: set irq type of 64 to 1 RAMDISK: ext2 filesystem found at block 0 RAMDISK: Loading 3072KiB [1 disk] into ram disk… done. VFS: Mounted root (ext2 filesystem) on device 1:0. Freeing unused kernel memory 188K (00494000 - 004c3000) Write protecting the kernel text: 2684K Write protecting the kernel read-only data 768k rodata_test: test data was not read only Please press Enter to activate this console. clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x2845e81c5f6, max-idle_ns: 440795276432 ns clocksource: Switched to clocksource tsc Initially I thought it might related RTC so I checked out all Real time clock in L4Linux, but it still the same. Any help would be appreciated. Thanks -Dan

3 8

IRQ objects
by David Werner 23 Jun '17

23 Jun '17

Hi L4-hackers, i am currently working on a checkpoint/restore component (for the Genode framework) which aims at the migration of processes/components. When I first start the target component of the checkpointer, its object looks like this: 000204 :0016e* Gate 0015f* Gate 00158* Gate 00152* Gate 000208 :00154* Gate 0017e* Gate 0017f* Gate 00179* Gate 00020c :00180* Gate 00188* Gate -- -- 000210 : -- -- 0018a* Gate 0018c* Gate 000214 :0018e* Gate 00196* Gate 00145* Gate 00144* IRQ 000218 :00198* Gate -- -- -- 00021c : -- 0019c* Gate -- -- At position 000217 is an IRQ object which is used for signaling. I would like to know if this IRQ object carries any information which I need to store in order to recreate a new IRQ object for the restarted component. If you are interested in more context you can take a look at: https://sourceforge.net/p/genode/mailman/message/35904942/ Kind Regards, David Werner

2 1

L4re and L4Linux Compatible issue
by Daniel (Xiaolong) Wang 21 Jun '17

21 Jun '17

Hi all, I’m trying to use L4re to run L4linux. I successfully built the fiasco kernel and l4re with the default setting from the newest l4re-snapshot. However when I try to build L4linux it shows it shows: “ld: skipping incompatible /home/daniel/Desktop/l4re-snapshot/src/l4/builddir/lib/x86_pentium4/l4f/libl4sys-direct.a when searching for -ll4sys-direct” "ld: skipping incompatible /home/daniel/Desktop/l4re-snapshot/src/l4/builddir/lib/x86_pentium4/l4f/libl4sys.a when searching for -ll4sys" "ld: cannot find -ll4sys” I assume it is the platform of L4re I built is not compatible with the L4Linux settings. I built L4re for x86_586 and x86_pentium4. My question is that is there a compatible X86 CPU platform the works for both L4re and L4Linux? Should I built AMD64 instead? Thanks -Dan

2 2

L4re with L4Linux
by Daniel (Xiaolong) Wang 20 Jun '17

20 Jun '17

Hi all, I’m new to L4re. I would like to use L4re as a microvisor and run L4linux VM. Is there any tutorial shows how to build the system like that? Thanks -Dan

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