Hello l4-hackers,
I am currently working on porting the Fiasco.OC micro kernel onto the
Raspberry pi 2.
Therefore, I am struggling with memory mapping, and I encounter the
following error when launching the default 'hello' entry:
L4 Bootstrapper
Build: #2 Tue Feb 23 11:57:19 CET 2016, 4.8.3 20140303 (prerelease)
Scanning up to 1024 MB RAM, starting at offset 32MB
Memory size is 1024MB (00000000 - 3fffffff)
RAM: 0000000000000000 - 000000003fffffff: 1048576kB
Total RAM: 1024MB
…
[View More]Scanning fiasco
Scanning sigma0
Scanning moe
Moving up to 5 modules behind 1100000
moving module 02 { 10db000-110c4d7 } -> { 11cc000-11fd4d7 } [201944]
moving module 01 { 10c9000-10da373 } -> { 11ba000-11cb373 } [70516]
moving module 00 { 1043000-10c889f } -> { 1134000-11b989f } [546976]
moving module 04 { 1029000-10425af } -> { 111a000-11335af } [103856]
moving module 03 { 100f000-102849b } -> { 1100000-111949b } [103580]
Loading fiasco
Loading sigma0
Loading moe
find kernel info page...
found kernel info page at 0x2000
Regions of list 'regions'
[ 1000, 1aff] { b00} Kern fiasco
[ 2000, 92fff] { 91000} Kern fiasco
[ 93000, 930eb] { ec} Root mbi_rt
[ c0000, c9c33] { 9c34} Sigma0 sigma0
[ d0000, d6177] { 6178} Sigma0 sigma0
[ 140000, 16905b] { 2905c} Root moe
[ 170000, 17b58b] { b58c} Root moe
[ 1000000, 100e4ff] { e500} Boot bootstrap
[ 1100000, 1133fff] { 34000} Root Module
API Version: (87) experimental
Sigma0 config ip:000c0100 sp:00000000
Roottask config ip:00140250 sp:00000000
Starting kernel fiasco at 000012b8
Non-HYP kernel detected but running in HYP mode, switching back.
Hello from Startup::stage2
Assertion failed
at /home/adebut/Documents/snapshotTest/l4re-snapshot-2015123115/src/kernel/fiasco/src/kern/buddy_alloc.cpp:101:
(unsigned long)block >= _base
Press any key to reboot.
I am currently working on the latest snapshot (2015123115), with
U-Boot as a bootloader, and testing on a real board (Raspberry Pi 2
model B V1.1). The entry built is the standard 'hello', and I use the
ramdisk-arm.rd given in the snapshot.
I did add a custom Bsp for the board, mainly based on the first
Raspberry Pi except for the Base Address, that is 0x3F000000
instead of the first Pi's 0x20000000.
I highly think that it is an address configuration problem, because it
first happened when I did expand the RAM size to 1024MB.
With further investigation, I found out that it was the kernel memory
allocation that causes this error, and suspect an incorrect MMU mapping.
This suspicion comes from the fact that the assertion takes the address
_base (0xf0400000) and the currently allocated block (0xee100000).
I did not modify any parameter in the kern/arm/mem_layout-arm.cpp file
on the Fiasco directory, which provides the default ARM addressing.
Maybe that's where my error comes from ? How can I correctly configure
my memory mapping, besides what I already configure in the Bsp (given in
attachment) ?
Also, it is the first time that I am assigned for porting a system, do
you have some hints, like important steps to follow ?
I am pretty sure it is a newbie error, but I cannot figure it out for
now :(
Thanks in advance for your time,
--
Antoine Debut
EPITA 2016 - GISTRE
[View Less]
Guten Tag,
I've got the Hello app runing with fiasco and l4re in qemu, how do I get
the graphical UI and console running that I see on the screen shots page?
Do I need to use l4con and mag? I don't see an entry with l4con in
modules.list.
danke
* <http://german.about.com/library/media/Audio/gutentag.wav>*
Hello everybody,
Does the L4re contain some kind of simple performance benchmarks
which are already prepared to use? I've tried to launch some demos from
the ferret package but not succeed...
Thank you in advance for any suggestions.
Sincerely,
Maxim Baryshnikov.
Hello,
yesterday I came across a very interesting paper titled "Porting FUSE to L4Re", accessible here: http://os.inf.tu-dresden.de/papers_ps/pester-beleg.pdf
For porting FUSE, the author uses a library called "libfs" which provides filesystem request forwarding and processing, if I understood correctly. It reads as if libfs is already included in L4Re.
However, I couldn't find neither FUSE nor libfs in the current L4Re snapshot. Are they by any chance publicly available somewhere else, or are …
[View More]both not to be published?
Cheers,
Josef
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Hi,
After read the basic ideas of L4Linux I have some questions related to it.
Is L4Linux run as a paravirtualization VM on L4Re? Then the traditional
Linux Process just still compiled against Linux system and put them
together with L4Linux disk image?
so it means L4Re works like qemu and Linuxl?
or L4Re works as a micro kernel operating system, and L4Linux run as a
process on it, all devices handled to L4Linux to reuse the drivers of
L4Linux? and the previous Linux process
compiled with …
[View More]Linux, but run direct on L4Re as L4 processes which
communicate with L4Linux through IPC?
it is quite confused after read a little of the codes, in L4Linux, seems
there is some injection of L4 task stuffs inside thread_struct of Linux,
but also have some vCPU related stuffs,
can you help me about what is the real behavior of L4Linux?
I'm sorry to ask this basic questions, but after some digging I feel quite
confused about how it works.
Thanks
Br
Alex
[View Less]
Hi,
is it possible to have partitioned scheduling in the way that one can use different schedulers for different cpu-cores?
And if yes, can I do the mapping from scheduler to core on runtime or is it done at compile time?
Thanks,
Stefan
hi, l4-hackers.
I am now using l4v2 API with L4/Fiasco. I know that on L4 v.2 API, the
thread is created if set eip/esp/pager/preempter to real values. And it
seems that likewise, thread can be suspended if setting these values to
invalid ones. But as I tried it, setting the running thread eip/esp to
-1 causes double page fault in that thread. Setting them to 0 does not
change these values (though, in headers' comments, documented value is
~0). Setting pager/preempter to L4_INVALID_ID …
[View More]also causes double page
fault. This is strange, as docs/comments state the converse.
So, is it possible anyhow to suspend/resume the running thread from
another thread? I know, that the thread can be suspended if entering
unconditional l4_ipc_wait(), but this is from the inside that thread.
How could it be done from an outside thread?
Thanks in advance,
valery
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Hello L4-hackers ,
I'm writing a Genode component which should access and modify the Run
queues of the scheduler.
Based on what I have read and looked there will be one scheduler for
each processor. How to access the different scheduler objects and Run
queues from Genode side?
I have looked through the code and able to print the run queue from the
ready_queue_fp.cpp.
But how do you access 2 run queues when number of processors is more than
one?
And what is the easy way to manipulate these …
[View More]from Genode component.?
PS: I have read Genode book and have a basic idea of Genode architecture.
Best regards,
Guru
[View Less]
Hi all,
I am curious memory mapping/unmapping performance.
Are there any applications that stress the memory mapping and unmapping utility?
Thanks a lot!
Yuxin