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does the driver directly operate the device?
by gaober 27 Apr '13

27 Apr '13

hi! drivers in linux are in kernel mode.but in a microkernel-based system,drivers are like apps,do they operate the device directly?or the microkernel will do something to operate device.

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l4linux and sysenter
by Ryan Brown 24 Apr '13

24 Apr '13

Thanks for the ptrace fix, that really helped with debugging. We were seeing programs crash at the first system call when using some versions of glibc, but not others. It seems the difference is that the working glibc's are compiled without vdso support. When glibc tries to use the vdso for system calls, it crashes at the sysenter instruction. If we start l4linux with vdso32=0, the program is able to run. Is sysenter expected to work under l4linux? It looks like it requires using msr's, so perhaps l4linux isn't able to setup sysenter? Should it be installing the int80 vdso function instead? While investigating the vdso stuff to I also became curious. How difficult would it be to set up an l4 specific vdso? I assume just using l4 ipc directly would be more efficient than using int80? Thanks, Ryan Brown

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How to start 2 or more VMs
by Chao-Jui Chang 18 Apr '13

18 Apr '13

Hi hackers, Is there any document that describes how to start 2 or more VMs on Fiasco.OC ? Is it possible to switch consoles between VMs ? Could you point out the direction to me? Thanks, Chao-Jui

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Question about L4/Fiasco
by Samir Boulhram 17 Apr '13

17 Apr '13

Hello, I'm trying to change the scheduler of the L4/Fiasco. I'm aim is to make an RM scheduler policy for schedule 3 VMs. My problem is that I don't have any idea of where I have to start my work. Can you help me please ? -- Kind regards, Samir B.

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l4re compilation order
by gaober 16 Apr '13

16 Apr '13

hi! i have some doubt about the buliding of l4re.who decides the order of the l4re pkg complie?if i want to make pkg drivers earliear than pkg input,hao can i do? does the /pkg/XXX/Control mean anything? and in the obj directory, there are .pc files like libdrivers-input.pc etc.what do they work? Wilbert Gao

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Ring 0 task
by Daniel Waddington - SISA 15 Apr '13

15 Apr '13

Hi, How do you create ring 0 tasks with Fiasco.OC? (I want them to execute rdmsr/wrmsr) Thanks Daniel

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ptrace
by Ryan Brown 15 Apr '13

15 Apr '13

Are there issues using ptrace under l4linux? I'm trying to debug a process using gdbserver, but when I use stepi (PTRACE_SINGLESTEP) it seems to run until the next system call. Has anyone else seen this? Is there some way to use the fiasco debugger to debug an l4linux process?

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RCU performance
by Christian Prochaska 11 Apr '13

11 Apr '13

Hello, when building Fiasco.OC with multiprocessor support enabled, the unmapping of an IPC gate via 'l4_task_unmap()' appears to require at least 3 timer interrupts to occur until completion, which can make a noticable difference in overall execution time compared to the uniprocessor configuration (extreme example: https://github.com/genodelabs/genode/issues/712, in a more realistic scenario (compiling an application) the difference was still like ~2 minutes execution time with the uniprocessor configuration vs. ~6 minutes with the multiprocessor configuration). I've attached the debug output I got while trying to understand what's going on and which shows some of the RCU-related activities after each of the 3 timer interrupts (patch used for the debug messages: https://github.com/cproc/foc/commit/fa7b6f823cb29c0fc1db389ceb956d554d9e154…). According to these messages, the quiescent period had ended after the second timer interrupt and I wonder if it is really necessary to wait for a third timer interrupt before executing the corresponding callbacks. Would it work correctly with the attached patch, too? Christian

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compile l4 source files: idl-parser-driver.hh:62:1: error
by yuqing wang 09 Apr '13

09 Apr '13

Hi, when I compile TUDOS/lEnv tree downloaded form svn.tudo.org , many errors apear in /todu/dice/src/parser/idl: {{{ g++ -DHAVE_CONFIG_H -I. -I. -I../../.. -I../../../src -Wall -I../../../src -g -O2 -MT idl-parser.tab.o -MD -MP -MF .deps/idl-parser.tab.Tpo -c -o idl-parser.tab.o idl-parser.tab.cc In file included from idl-parser.yy:109:0: idl-parser-driver.hh:62:1: error： ‘token_type’ in ‘class yy::idl_parser’ does not name a type idl-parser.tab.cc: in function‘virtual int yy::idl_parser::parse()’: idl-parser.tab.cc:352:42: error： ‘idllex' not declared in this scope make[7]: *** [idl-parser.tab.o] Error 1 make[7]: Leaving directory ‘/todu/dice/src/parser/idl’ make[6]: *** [all-recursive] Error 1 make[6]: Leaving directory ‘todu/dice/src/parser’ }}} Any help is appreciated yuqing wang

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L4android mlock on vectors page causes unresolvable page fault
by Matthias Petschick 08 Apr '13

08 Apr '13

Hello, while experimenting with lvm, I noticed that mlocking the vectors page at 0xbffff000 from user space causes an unresolvable page fault (see full trace below). In particular, the lvcreate process attempts to lock its mapped memory regions when activating a volume, which includes the vectors page. While debugging this, I further noticed that L4android maps the vectors page to 0xbffff000 by default instead of 0xffff0000, configurable via CONFIG_VECTORS_BASE, however references to the hard-coded address 0xffff0000 remain in some places under arch/l4, e.g. in devicemaps_init() in arch/l4/mm/arch-arm/mmu.c. Without further investigating how the vectors page addressing is treated in L4android, I cannot say whether this is related or not. The pc in the backtrace is in special_mapping_fault, apparently because the vma for the vectors page was installed with a NULL pointer for its pages array, hence vm_private_data is also NULL when dereferenced by special_mapping_fault in if (*pages). The oops itself seems to be triggered because pfa is 0x1 and l4x_handle_pagefault refuses to resolve pagefaults for addresses < L4_PAGESIZE. Here's the associated trace: Page fault (non-resolved): pfa=1 pc=108df14 Internal error: Boom!: 410007 [#5] SMP Modules linked in: CPU: 0 Tainted: G D W (3.1.10-l4-dirty #8) PC is at special_mapping_fault+0x80/0xe0 LR is at __do_fault+0x68/0x464 pc : [<0108df14>] lr : [<01088b50>] psr: 6000001f sp : 132dbda8 ip : 00000000 fp : 0bd4eff8 r10: 00000000 r9 : 0137a1ac r8 : 00000008 r7 : 00000000 r6 : bffff000 r5 : 0605ae20 r4 : 01d38288 r3 : 000bffff r2 : 000bffff r1 : 132dbdc8 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SYS_32 ISA ARM Segment user Process lvcreate (pid: 395, stack limit = 0x132da2f0) Stack: (0x132dbda8 to 0x132dc000) bda0: 014e54a0 00000000 01d38288 01088b50 000284d0 01fa6cc0 bdc0: 132da000 01fa6700 00000008 000bffff bffff000 00000000 014a8e20 00000000 bde0: 01d38288 00000008 0bd4eff8 060d97fc 0605ae20 000bffff 00000000 0108bfb8 be00: 000bffff 00000008 00000000 01600000 014c60e0 bffff000 0bd4c000 0605ae20 be20: 000005ff 0bd4eff8 01d38288 00000008 00000000 0108c138 0bd4eff8 00000008 be40: 00000052 01d38288 01fa6cc0 bffff000 0605ae20 132dbedc 0605ae20 0108c34c be60: 132da000 00000000 00000001 00000010 00000000 00000000 014cf754 bffff000 be80: 00000001 01d382a0 0605ae20 132dbedc 00000001 0605ae20 0605ae58 0108cff4 bea0: 00000052 00000000 00000000 132dbedc 0605ae5c 01d38288 c0000000 c0000000 bec0: bffff000 0108d068 132dbedc 132da000 00001000 00000000 00000000 00000001 bee0: 0605ae5c 00000096 bffff000 0108d8f0 00001000 0000a790 000ed0d7 00001000 bf00: 132da000 0100f854 00001000 000ed0d7 00000000 00000000 00000000 40095068 bf20: 132da000 132dbfb0 01fa6cc0 132da000 014ec0e8 133ea36c 00000000 0bec6000 bf40: 00000000 00000000 00000000 00000000 00000000 01195d88 00000000 68732363 bf60: 00000000 00000000 00000000 00000000 01fa6cc0 01fa6cc0 b3000c00 132da000 bf80: b3000e00 ef000000 00000000 f1886fb8 ffff0200 60000010 0100d84c b3000c00 bfa0: 000ed0b3 f1886fec 000ba4c8 00079560 bffff000 00001000 0000a790 000c681c bfc0: 00001000 000ed0d7 000bc08c 00000096 00000072 000ed0b3 000ad844 000ba4c8 bfe0: 000bc0e0 bf87c608 00079560 40191234 60000010 bffff000 00000000 00000000 [<0108df14>] (special_mapping_fault+0x80/0xe0) from [<01088b50>] (__do_fault+0x68/0x464) [<01088b50>] (__do_fault+0x68/0x464) from [<0108bfb8>] (handle_pte_fault+0xb0/0x1a0) [<0108bfb8>] (handle_pte_fault+0xb0/0x1a0) from [<0108c138>] (handle_mm_fault+0x90/0xc0) [<0108c138>] (handle_mm_fault+0x90/0xc0) from [<0108c34c>] (__get_user_pages+0x12c/0x2f8) [<0108c34c>] (__get_user_pages+0x12c/0x2f8) from [<0108cff4>] (__mlock_vma_pages_range.clone.2+0x78/0x80) [<0108cff4>] (__mlock_vma_pages_range.clone.2+0x78/0x80) from [<0108d068>] (do_mlock_pages+0x6c/0x148) [<0108d068>] (do_mlock_pages+0x6c/0x148) from [<0100f854>] (l4x_vcpu_entry_c+0xc74/0x1f90) [<0100f854>] (l4x_vcpu_entry_c+0xc74/0x1f90) from [<00079560>] (0x79560) Code: e1a02003 e1a0c003 e2400001 1afffff3 (e59c4000) ---[ end trace 47d173d365d03980 ]--- Segmentation fault Maybe someone with a better understanding of how L4android treats the vectors page has an idea what's going wrong here? Cheers, Matthias

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How to access SD card on ARM board
by Chao-Jui Chang 08 Apr '13

08 Apr '13

Hi hackers, I want to use SD card as root file system for L4Linux. Base on my understand, we can use IO assignment in libio and let L4Linux kernel to access the devices directly. If this is correct, then next we need to choose correct driver in L4Linux's config menu. However, some device is platform specific, for example, "SDHCI support on Samsung S3C SoC" requires PLAT_SAMSUNG. This option is not available in L4Linux config menu. I have tried to modify the dependence in kernel's Kconfig, but it results in lots of compiler error, such as missing header files. Is this the correct way to achieve my goal? Or I need to make the driver as part of l4re ? Thanks, Chao-Jui

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Re: how to debug fiasco kernel
by Björn Döbel 07 Apr '13

07 Apr '13

Hi Keqin Sun, > Hi Bjoern, > This is a screenshot(Please see the attachment "debug.png") when I used gdb. > There is no room for me to resume execution using 'g' command. The prompt of > JDB appears only after I typed 'ESC' button and nothing happened when I resume > execution(Please see the attachment "debug2.png"). you set a breakpoint on the main() function, but if you did as I told you before, the enter_kdebug() you use to actually set the breakpoint is _after_ this function entry. Therefore you do not see the breakpoint being hit. If you are worried that "hello world" is not being printed as it should, I'd recommend you try to run the application without GDB and the enter_kdebug() line first. If this fails, something else is wrong in your setup. Bjoern

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Re: how to debug fiasco kernel
by Martin Unzner 07 Apr '13

07 Apr '13

I use GDB stubs exclusively, in Bochs as well as in QEMU (I did not try L4/Fiasco on other virtual machines so far, and only a few times on physical hardware). There are approaches for debugging in the L4 runtime environment, such as Valgrind and probably also GDB (although I am not sure about that). They are usually quite old and not all of them still work. If you like, you can take a look at some of the work presented at http://www.inf.tu-dresden.de/index.php?node_id=1701 and http://www.inf.tu-dresden.de/index.php?node_id=1429 . Anyway, at least with simple applications, my first approach is usually a close examination of the code: go through all your setup, and if you are unsure at some point whether you did it right or not, try to type your problem into Google. If you cannot find anything, send an e-mail to the list. People here are usually very nice and patient and they will be happy to help. Regards! Martin P.S.: I answered you using the mailing list, and I would like to ask you to use the "Reply to list" or "Reply to all" button of your e-mail client, so that everyone can follow the discussion and benefit from our findings. Am 02.04.2013 04:49, schrieb Jian Liu: > > 2013/4/2 Martin Unzner <munzner(a)os.inf.tu-dresden.de > <mailto:munzner@os.inf.tu-dresden.de>> > > > you mention bochsdbg, so maybe you want to use the Bochs GDB stub? > http://bochs.sourceforge.net/doc/docbook/user/debugging-with-gdb.html > tells you how to do so. Using GDB, you can debug all kinds of > programs on source code level. > > > Hi Martin, > > I am also wonder besides bochs, if there are other ways to > debug fiasco system on source code level. What is your usual method to > do it? > > Best, > > Jian

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how to debug fiasco kernel
by Keqin Sun 01 Apr '13

01 Apr '13

Hi, I have two questions about how to debug fiasco kernel. a) Are there any debugging tools? For example, I can use bochsdbg to debug linux kernel. b) It is difficult for me to debug applications or kernel using JDB because the JDB shows lots of memory address rather than source code. what shall I do if I want more source code information when I debug. Best regards, Jimmy Sun

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[Fiasco.OC] Desctruction of objects created by factory
by Sergey Grekhov 27 Mar '13

27 Mar '13

Hello, L4 hackers! I have a question about Fiasco.OC. I am a bit stuck in understanding of how objects created by factory are destroyed? For example, we have a call from user space l4_factory_create_thread(). It creates object in Fiasco (file fiasco/src/kernel/factory.cpp) and map it using call map() from fiasco/src/kernel/map_util.cpp. However, the procedure of destruction of created objects (tasks, threads, gates, irqs, vms) is not clear: it seems that there is some kind of the "garbage collector", but I can not figure out some important things. Particularly: 1) where is the code which essentially destroys created objects (call destructors)? 2) what conditions make "garbage collection" to start? 3) how "garbage collection" can be forced from user-space? As a use-case, I can propose the fork-bomb test from Genode framework: it creates lots of new Genode threads (thus, it makes a lot of new thread/gate/irq objects in Fiasco.OC). Thanks in advance for your answer. -- Best regards, Sergey Grekhov

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Question regarding L4_err class usage in method commit_result.
by Sergey Grekhov 22 Mar '13

22 Mar '13

Hello, L4 experts! I have a question regarding method Kobject_iface::commit_result() in the code of Fiasco.OC. One can easily find in the code something similar to following: return commit_result(-L4_err::EPerm); And this call is very confusing: it looks like returning message tag with error, but in fact the error bit (0x8000) is not set. Moreover, some values from L4_err is intersection with enumeration L4_msg_tag::Protocol because of: 1) sign '-' used when commiting result; 2) place where both values are saved - bits 31...16 of the message tag. And, finally, there are lots of returns similar to mentioned one (return commit_result(-L4_err::EPerm)) and there are no _any_ code which checks presence of these errors in the tag. I am very confused about these strange values saved in L4_msg_tag and it appears to me that in these cases should be used method Kobject_iface::commit_error(). Can someone explain the logic behind returning values defined in class L4_err? -- Best regards, Sergey Grekhov

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repomgr log
by Jack Andrews 19 Mar '13

19 Mar '13

hi, thanks for fiasco - it will be a lot of fun for me. first question: is my output of repomgr normal? (see below). it seems to be doing things more than once. $ svn cat http://svn.tudos.org/repos/oc/tudos/trunk/repomgr | perl - init http://svn.tudos.org/repos/oc/tudos fiasco l4re localdir: src Checked out revision 49. Creating ./kernel Updating 'kernel': A kernel Updated to revision 49. Creating ./kernel/fiasco Updating 'fiasco': A fiasco Updated to revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco Updating 'fiasco': At revision 49. Creating ./kernel Updating 'kernel': At revision 49. Creating ./kernel/fiasco [snip] thanks, jack

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Merging sigma0 and roottask
by Norman Feske 19 Mar '13

19 Mar '13

Hello Fiasco.OC developers, hereby, I'd like to propose a slight architectural change regarding the roles of sigma0 and roottask in Fiasco.OC-based systems. During our work with using the kernel for Genode, we repeatedly encountered problems that were somehow related to sigma0, in particular the priority inversion problem we reported last year (http://os.inf.tu-dresden.de/pipermail/l4-hackers/2012/005348.html) and a recent issue related to inconsistencies of caching attributes on ARM, which led to subtle memory corruptions. Both problems were pretty hard to debug and took us a lot of time. Knowing about those issues, there are of course ways to deal with them. The priority inversion problem could be solved by assigning the highest priority to sigma0. The cache attribute problem can principally be dealt with by managing the cache flushing manually and making sure not to touch the wrong cache lines. But this remains to be a mine field. Because roottask has all memory mapped, dangling pointers may go unnoticed, yet produce unwanted caching effects. In our experience, these kinds of problems remain largely invisible until the system gets highly dynamic (e.g., if the role of RAM for DMA buffers or normal memory changes at runtime). But once they occur, they become a nuisance. Without sigma0, our life would have been easier. With no sigma0 thread, there wouldn't have been a priority inversion problem. And without the sigma0 protocol that is unaware of caching attributes, we could easily maintain the consistent use of those attributes among all processes including roottask. Besides hitting the issues mentioned above, we found that the use of sigma0 implies two further problems. First, because roottask can hand out memory not before obtaining it from sigma0, all physical memory must be mapped within roottask. So the virtual memory of roottask limits the amount of physical memory usable in the system. And second, because roottask must maintain all those mappings with maximum privileges, a bug in roottask can silently corrupt arbitrary memory. Motivated by these observations, I conducted the experiment to remove sigma0 from the picture and see where this would lead us. Kernel changes -------------- The (preliminary) patch of the kernel and bootstrap is actually pretty small: https://github.com/nfeske/foc/commit/7599e863c2feb07a34b891499982f4ffb58ff3… I kept the term "sigma0" in place to keep the patch simple. In the following, the terms "sigma0" and "roottask" always refer to the first user-land process started by the kernel. Originally, sigma0 was paged with one-to-one mappings by the kernel and would use the normal map operation with a sigma0-virtual address as source of the mapping. Here, the new solution differs in that all memory mappings originating from sigma0 are now directly coming from the physical address space. This requires one kernel-internal interface change concerning the 'Mem_space::v_fabricate_map' function. This function is used in two situations, map and unmap. When mapping, it is used to determine the physical frame for the virtual address specified as source for the mapping. For the new version of sigma0, this makes no sense because the source address does not refer to sigma0's virtual address space. When unmapping, however, this function is used to look up the physical frame for the virtual page to unmap. In this case, the argument refers to an actual sigma0-virtual address. Consequently, the function cannot accommodate both use cases. Therefore, I introduced a new 'v_fabricate_map_src' function that accompanies the 'v_fabricate' function. For all processes other than sigma0, both functions are doing the same thing. But for sigma0, the 'map_src' function interprets the address argument as a physical address. Because this function is used to determine the mapping source, I have used the suffix "_map_src". The second noteworthy change is the distinction between sigma0 threads with a pager and those without a pager. The original version of sigma0 had no notion of a pager. There was only a single thread, paged by the kernel. Now, if roottask is sigma0, there are several threads. Most of them can be paged by a local pager in roottask. To distinguish both cases, I needed to introduce an 'is_null' accessor.function to the 'Context_ptr' class. User-land changes ----------------- The implications to Genode's version of roottask (called core) are more substantial but in very positive ways: The initialization of core's allocators used to required an interplay between core and sigma0. Because there is no longer a need to have all memory mapped in core, we can simply drop this whole procedure and just use the memory descriptors provided by the KIP. After an initialization phase where core faults-in its own image and the KIP via the kernel, core drops its privileges by assigning a core-local pager to all core threads. So any invalid access gets detected right away. Browsing through the page table of core using the kernel debugger is like visiting a desert. In contrast to the original version, it has become easy to maintain an overview of the mappings within core. The revocation of memory mappings used to rely on the in-kernel mapping database. This won't work for core anymore because core does not maintain mappings for the memory handed out to other processes. Instead, core uses 'l4_task_unmap' to flush mappings from non-core processes as needed. This is similar to how Genode works on OKL4. Still, non-core processes may create further mappings, which are captured by the in-kernel mapping database. Current state and open questions -------------------------------- With the current state of the implementation, the complete software stack of Genode runs without sigma0. This includes L4Linux. So I am pretty confident that the removal of sigma0 from the system does not imply functional disadvantages. That said, there are a few remaining questions that I'd like to discuss. First, the sole use of 'l4_task_unmap' to remotely flush memory mappings in other processes means that we must no longer provide the option of granting memory mappings. Otherwise, a process that received a mapping from roottask could "steal" the physical memory by granting it to someone else. Roottask would not know about that, and an attempt to flush the mappings in the original receiver of the mapping would just target a hole in the address space. My question is: "Can we live without granting memory?" or the other way: "What is a known use case for granting memory?" Second, the new situation triggers some code paths in the kernel that were not used before. Apparently, the unmapping of memory from sigma0 was not considered. This is where I hit a few assertions in the kernel. Right now, I have just worked around these assertions by uncommenting the offending code in 'kernel/fiasco/src/kern/map_util.cpp'. I understand that this is just a stop-gap solution. Would you like to lend a helping hand to find out... "How to support unmap from sigma0 in a clean way?" I would like to avoid Genode from diverging too much from the semantics of the official Fiasco.OC kernel. Hence, I would appreciate your consideration: "Would you like to follow a similar path with L4Re?" That would be very nice. But even if this should not be the case, I would find your rationale behind sticking with sigma0 very valuable to know, e.g., for reconsidering my plan. Regards Norman -- Dr.-Ing. Norman Feske Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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how to config L4Linux and Fiasco to access TCP/IP
by Jian Liu 18 Mar '13

18 Mar '13

Dear all, I am wonder how to config Fiasco and L4Linux to access intnet from a termail/Firefox in the sytem. I know we can set ifconfig and use "wget" in Genode. But is there a such solution for Fiasco and L4Linux? Which version can work and how to config them, E.g. menu.lst? Thanks. Best, Jian LIU ---- email to: gjk.liu(a)gmail.com

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how to compiler
by fiasco 17 Mar '13

17 Mar '13

Hi, I want to know whether the l4re and fiasco.oc have some practical application which is open source. I want to build some useful pkg application for demo. The example like "Hello, world" is too small.thanks.

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How to compiler DROPS
by fiasco 11 Mar '13

11 Mar '13

Hi, Now, I learn how to compiler DROPS, but I can not get the manual book which could guide me to compiler the DROPS and boot it form cd rom. Could someone give me a help? The document I need is how to compiler DROPS, create iso image and boot it. The target compiler DROPS is listed: http://os.inf.tu-dresden.de/drops/download.html

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boot image
by fiasco 11 Mar '13

11 Mar '13

Hi, I find that some webpage is deleted which is about how to compiler, create iso, boot the DROPS. Could someone give me some doc, thanks, The DROPS is listed below: http://demo.tudos.org/eng_download.html

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Re: memory problem about s5pv210 porting
by meng-qy 05 Mar '13

05 Mar '13

Hi,Adam, The problem has been solved, thank you for your supports! Indeed, that fault is caused by cache. In file "pagetable-arch", the code only flush dcache and do not flush icache which leads to this unstable phenomenon. Now, the system seem to ok after I adding it. Steven Meng On 2013年03月01日 19:00, l4-hackers-request(a)os.inf.tu-dresden.de wrote: > On Thu Feb 28, 2013 at 21:33:53 +0800, meng-qy wrote: >> > Thank you for your suggestion! Following your guidance, I log the PF info when system dead like this: >> > >> > test 1: >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 144 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 143 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 142 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 141 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 140 >> > test 2: >> > pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 105 >> > pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 104 >> > pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 103 >> > pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 102 >> > test 3: >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 116 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 115 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 114 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 113 >> > pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 112 >> > >> > What is spc? pc or sp ? I objdump the image, and did not found that address. > pc is the program counter, sp is the stack pointer, spc is a kernel > internal data structure (Space). So this is a code pagefault, likely in > the roottask/moe. > >> > However, we can't get more info in dump file because the file didn't include any symbol table(Can we >> > dump the symbol table by adding some compile option? ). > Use fiasco.image file for the kernel. > >> > At last, different from other chip, we found that address >> > e0000000-fb000000 in s5pv210 is some important register, and the >> > kernel seem to map that address, it doesn't matter? > What you describe are physical addresses, the kernel uses virtual ones, > i.e. the virtual address does not point to the physical address. So yes, > it does not matter. > > > > > Adam > -- Adam adam(a)os.inf.tu-dresden.de Lackorzynski > http://os.inf.tu-dresden.de/~adam/ --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

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Genode OS Framework version 13.02 released
by Sebastian Sumpf 03 Mar '13

03 Mar '13

We are pleased to announce the release of Genode version 13.02. The most prominent features are the improved handling of dynamic workloads on the NOVA hypervisor, IOMMU support as well as the integration of Markus Pateymüller's work on the Vancouver VMM. Fiasco.OC has been updated to the most recent version and there are new platforms available for our custom kernel. The full story can be explored in the release notes: http://genode.org/documentation/release-notes/13.02 Release-notes summary: - DMA protection via IOMMU (NOVA/x86) - Full virtualization via the Vancouver VMM (NOVA/x86) - Redesigned audio-output support for low latency - Base API and OS infrastructure - New fault-detection facility - New mechanism for file-system notifications - New terminal multiplexer - Device drivers - ACPI support for 64-bit machines - New OMAP4 UART driver - USB support for Samsung Exynos 5250 - Base platforms - Custom kernel platform with added support for Samsung Exynos 5250 and Freescale i.MX53 - NOVA kernel improved for highly dynamic workloads - Fiasco.OC kernel forked, Exynos-5250 support added - Improved memory management on Linux Enjoy, Sebastian -- Sebastian Sumpf Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

3 3

Re: Fiasco.OC performance issues
by Sebastian Sumpf 03 Mar '13

03 Mar '13

On 01/29/2013 12:09 AM, Adam Lackorzynski wrote: > On Fri Jan 25, 2013 at 00:00:26 +0100, Sebastian Sumpf wrote: >> On 01/17/2013 11:31 PM, Adam Lackorzynski wrote: >>> On Thu Jan 17, 2013 at 17:03:36 +0100, Sebastian Sumpf wrote: >>>> I recently upgraded Fiasco.OC to SVN revision 42 and experience some >>>> pretty severe performance degradation compared to revision 40 on the >>>> Pandaboard (SMP). It seems that 'simga0' and the root task stall for 5 >>>> to 10 seconds during boot up. I tracked the issue down to be caused by >>>> the initial mapping operations, especially our root task maps all the >>>> available memory during bootstrap. Within the kernel the >>>> 'Context::xcpu_tlb_flush' is called for each mapping. The function sends >>>> an IPI (to CPU1 which is idle) and then waits for an IPI in order to >>>> signal the end of the operation. The whole operation seems to have >>>> gotten slower compared to revision 40, but I could not find many >>>> differences in the IPI-handling code. Do you have any ideas or >>>> suggestions what could cause the delay (maybe scheduling changes) and >>>> how to fix it? >>> >>> I noticed a similar/same thing but hadn't time to investigate yet. >> >> Okay, I just wanted to make sure that the problem is not at our side nor >> at our usage pattern. >> Another thing I wonder is: Since you now have second level cache support >> for the PandaBoard, how do I map DMA memory to a client? The problem >> seems to be that sigma0 maps all memory as cached. So what we have been >> trying to do is this: When someone requests DMA memory we map the page >> as uncached and then call 'l4_cache_dma_coherent' afterwards. This >> doesn't seem to work out well for our drivers. The thing I think I could >> gather is that memory that is mapped cached (sigma0, roottask) and >> uncached (client) at the same time has an undefined behavior (I might be >> wrong here) on ARM. So, what is the protocol to implement this on >> Fiasco.OC/L4RE setups? > > Indeed, having memory with different attributes must be avoided. > But it's also about accessing that memory. So for example for sigma0 > this isn't a problem because sigma0 does not touch the memory itself. > Is your roottask accessing the memory, i.e. pulling it into caches? Yes this is the problem we're trying to solve. We don't have a notice of normal RAM and DMA pools within our roottask (if we had this, the question of how to dimension DMA pools would arise, also this seems to be an ARM only issue). So here is what we did with L1 caches enabled only: Acquire the memory in roottask, map it to the client as non-cacheable, zero out the memory (as it might have been previously used as normal RAM and for security reasons), clean and invalidate the data-cache. With the L2-cache enabled on PandaBoard, I tried to use the 'l4_cache_dma_coherent' function to accomplish the same behavior, which worked out well for the L1-case ... but it didn't. So, what am I doing wrong here, or isn't this supported anyways? Thanks a lot, Sebstian

3 7

How to start a program in a application ?
by Jason.han 02 Mar '13

02 Mar '13

Hi all, I want to start a program in my application ,(e.g task A--->start task B) I can't get enough information in latest source version , so I wonder if some know whether there is some system call like fork() or APIs to do this. Please give me some suggestion ,and example it preferred . --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

RE: Re: [ARM11] Question for the ARM 11 GPIO MAPPING
by Jason.han 02 Mar '13

02 Mar '13

Dear Adam : Thank you very much ! Now I have understand the IO MAPPING rules . All IO address mapping is only recognized by first 5 bits ,the last three bit is no mean for address(only for flags) . I mapping the S3C6410 GPIO ,Video-control ,Sfr once again . Now i can make the LCD bright and run the spectrum in real hardware . Thanks . Best regards ~~ ------------------------------ Message: 2 Date: Wed, 27 Feb 2013 22:13:47 +0100 From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> To: l4-hackers(a)os.inf.tu-dresden.de Subject: Re: [ARM11] Question for the ARM 11 GPIO MAPPING Message-ID: <20130227211347.GA6841(a)os.inf.tu-dresden.de> Content-Type: text/plain; charset=iso-8859-1 Hi, On Tue Feb 26, 2013 at 20:10:15 +0800, Jason.han wrote: >> Now I have GPIO Mapping problems happened when >> run the L4re in Arm 11 (6410 ). >> >> .devs ==> Res.mmio(0x7f008100, 0x7f00813f); >> .lcd.c ==>l4io_request_iomem(0x7f008100, 0x03f, >> L4IO_MEM_NONCACHED, &lcd_gpio_virt_base); >> >> when >> "l4_mem_write(lcd_gpio_virt_base+0x00,L4_MEM_WIDTH_4BYTE,0xaaaaaaaa); >> download in real-hw board : the core will died as it : >> >> Ned: loading file: 'rom/arm-rv-lcd.cfg' >> >> hello | Hello World! >> IO | Dev_factory: register factory for N2Hw6DeviceE >> IO | GTF: register factory for 7Pci_dev >> IO | GTF: register factory for N2Hw12Msi_resourceE >> IO | Dev_factory: register factory for N2Hw11Gpio_deviceE >> IO | Io service >> IO | Ready. Waiting for request. >> fbdrv | Using LCD driver: S3C6410 >> fbdrv | lcd_control_virt_base is 0x3000 >> fbdrv | lcd_gpio_virt_base is 0x4000 >> fbdrv | Video memory is at virtual 0x5000 (size: 0x3fc00 Bytes) >> fbdrv | Physical video memory is at 0x50394000 ==>core died >> >> after delete it and only use l4_mem_read , value always is >> >> IO | Ready. Waiting for request. >> >> fbdrv | Using LCD driver: S3C6410 >> fbdrv | lcd_control_virt_base is 0x3000 >> fbdrv | lcd_gpio_virt_base is 0x4000 >> fbdrv | Video memory is at virtual 0x5000 (size: 0x3fc00 Bytes) >> fbdrv | Physical video memory is at 0x50395000 >> fbdrv | 0 value is 0x220022 ==> core run is ok. >> >> In the range of the GPIO ,whatever I defined , the >> lcd_gpio_virt_base + offset (value 0) is always 0x220022 ,can't >> be written . >> the lcd_gpio_virt_base + offset (value 0x04) is always 0x23 ,can >> be written ,but value never be changed . >> From Offset (value 0x08) is normal . why only GPIO like this ,I >> write some time and control -register always OK. >> >> Do you know Why , Can you give me some advices ? Thank you . >> >> I also try to .devs ==> Res.mmio(0x7f008000, 0x7f00813f); >> .lcd.c ==>l4io_request_iomem(0x7f008000, >> 0x03f, L4IO_MEM_NONCACHED, &lcd_gpio_virt_base); >> when >> "l4_mem_write(lcd_gpio_virt_base+0x100,L4_MEM_WIDTH_4BYTE,0xaaaaaaaa); >> The offset 0x00 ,and 0x04 same problem ,but now I can write >> 0xaaaaaaaa for this IO port, even though working not well . > What I notice is that you want to have 0x7f008100, however, mappings are > page granular, i.e. lower 3 digits are 0. The output says the virt_base > is 0x4000, so you probably want to access 0x4100. Maybe the device at > offset 0 is behaving like what you're seeing. > > > > > Adam --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

1 0

memory problem for s5pv210 porting
by meng-qy 01 Mar '13

01 Mar '13

Hi, Adam, Thank you for your suggestion! Following your guidance, I log the PF info when system dead like this: test 1: pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 144 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 143 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 142 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 141 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 140 test 2: pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 105 pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 104 pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 103 pf: 000a pfa=20144128 ip=20144128 (r-) spc=0xf12e475c 102 test 3: pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 116 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 115 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 114 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 113 pf: 000a pfa=2016a8f8 ip=2016a8f8 (r-) spc=0xf12e475c 112 What is spc? pc or sp ? I objdump the image, and did not found that address. However, we can't get more info in dump file because the file didn't include any symbol table(Can we dump the symbol table by adding some compile option? ). At last, different from other chip, we found that address e0000000-fb000000 in s5pv210 is some important register, and the kernel seem to map that address, it doesn't matter? Steven Meng > On Tue Feb 26, 2013 at 19:33:49 +0800, meng-qy wrote: >> Hello,l4-hackers, >> >> We are working at porting fiasco to s5pv210 platform. Now, we >> encounter a unstable problem when fiasco booting. Sometimes, the >> system seems ok. But more often, the system dead in different >> places when start moe. We trace the program and find that the system >> halts in function "handle_page_fault" of >> sigma0(dir=/l4/pkg/sigma0/server/src/memmap.cc). The log is >> described more specifically as following: >> >> case 1: Page fault >> ........ >> Calibrating timer loop... done. >> SIGMA0: Hello! >> KIP @ 20002000 >> allocated 4KB for maintenance structures >> SIGMA0: Dump of all resource maps >> RAM:------------------------ >> [0:20000000;20000fff] >> [0:20065000;2008ffff] >> [0:20097000;20097fff] >> [0:2009f000;2013ffff] >> [4:20140000;20171fff] >> [0:20172000;20177fff] >> [4:20178000;2018efff] >> [0:2018f000;21010fff] >> [4:21011000;21011fff] >> [0:21012000;210fffff] >> [4:21100000;21133fff] >> [0:21134000;3effffff] >> IOMEM:---------------------- >> [0:0;1fffffff] >> [0:40000000;ffffffff] >> SIGMA0: alloc addr ok, addr is 20140000 //which we add in func >> handle_page_fault >> SIGMA0: alloc addr ok, addr is 2017d000 >> SIGMA0: alloc addr ok, addr is 2017c000 >> SIGMA0: alloc addr ok, addr is 2016e000 >> SIGMA0: alloc addr ok, addr is 2016f000 >> SIGMA0: alloc addr ok, addr is 20169000 >> SIGMA0: alloc addr ok, addr is 2016c000 >> SIGMA0: alloc addr ok, addr is 2016b000 >> MOE: Hello world >> SIGMA0: Page fault, did not find page at 200020e0 for 4 >> SIGMA0: Page fault, did not find page at 200020e0 for 4 >> SIGMA0: Page fault, did not find page at 200020e0 for 4 >> SIGMA0: Page fault, did not find page at 200020e0 for 4 >> SIGMA0: Page fault, did not find page at 200020e0 for 4 // >> endless loop >> SIGMA0: Page fault, did not find page at 200020e0 for 4 > > The second case smells like cache/tlb issue but I wouldn't understand > why this would be a problem. And the case above looks rather not like > that. 20002000 is the kip and there should not be a page-fault there. > In jdb, you should log page-faults (P*) to check (with shift-T) for any > repeating patterns (e.g. same pc or similar). > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > > > ------------------------------ > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > > > End of l4-hackers Digest, Vol 118, Issue 14 > ******************************************* --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

memory problem for s5pv210 porting
by meng-qy 27 Feb '13

27 Feb '13

Hello,l4-hackers, We are working at porting fiasco to s5pv210 platform. Now, we encounter a unstable problem when fiasco booting. Sometimes, the system seems ok. But more often, the system dead in different places when start moe. We trace the program and find that the system halts in function "handle_page_fault" of sigma0(dir=/l4/pkg/sigma0/server/src/memmap.cc). The log is described more specifically as following: case 1: Page fault ........ Calibrating timer loop... done. SIGMA0: Hello! KIP @ 20002000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:20000000;20000fff] [0:20065000;2008ffff] [0:20097000;20097fff] [0:2009f000;2013ffff] [4:20140000;20171fff] [0:20172000;20177fff] [4:20178000;2018efff] [0:2018f000;21010fff] [4:21011000;21011fff] [0:21012000;210fffff] [4:21100000;21133fff] [0:21134000;3effffff] IOMEM:---------------------- [0:0;1fffffff] [0:40000000;ffffffff] SIGMA0: alloc addr ok, addr is 20140000 //which we add in func handle_page_fault SIGMA0: alloc addr ok, addr is 2017d000 SIGMA0: alloc addr ok, addr is 20167000 SIGMA0: alloc addr ok, addr is 2018e000 SIGMA0: alloc addr ok, addr is 20166000 SIGMA0: alloc addr ok, addr is 20179000 SIGMA0: alloc addr ok, addr is 20178000 SIGMA0: alloc addr ok, addr is 2018d000 SIGMA0: alloc addr ok, addr is 20145000 SIGMA0: alloc addr ok, addr is 20163000 SIGMA0: alloc addr ok, addr is 20162000 SIGMA0: alloc addr ok, addr is 20141000 SIGMA0: alloc addr ok, addr is 20164000 SIGMA0: alloc addr ok, addr is 20143000 SIGMA0: alloc addr ok, addr is 20149000 SIGMA0: alloc addr ok, addr is 2014a000 SIGMA0: alloc addr ok, addr is 2017e000 SIGMA0: alloc addr ok, addr is 20153000 SIGMA0: alloc addr ok, addr is 2014b000 SIGMA0: alloc addr ok, addr is 2014d000 SIGMA0: alloc addr ok, addr is 2014e000 SIGMA0: alloc addr ok, addr is 2014f000 SIGMA0: alloc addr ok, addr is 20150000 SIGMA0: alloc addr ok, addr is 20152000 SIGMA0: alloc addr ok, addr is 20154000 SIGMA0: alloc addr ok, addr is 20155000 SIGMA0: alloc addr ok, addr is 20156000 SIGMA0: alloc addr ok, addr is 20160000 SIGMA0: alloc addr ok, addr is 20168000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2016e000 SIGMA0: alloc addr ok, addr is 2016f000 SIGMA0: alloc addr ok, addr is 20169000 SIGMA0: alloc addr ok, addr is 2016c000 SIGMA0: alloc addr ok, addr is 2016b000 MOE: Hello world SIGMA0: Page fault, did not find page at 200020e0 for 4 SIGMA0: Page fault, did not find page at 200020e0 for 4 SIGMA0: Page fault, did not find page at 200020e0 for 4 SIGMA0: Page fault, did not find page at 200020e0 for 4 SIGMA0: Page fault, did not find page at 200020e0 for 4 // endless loop SIGMA0: Page fault, did not find page at 200020e0 for 4 case 2: alloc ok ...... IOMEM:---------------------- [0:0;1fffffff] [0:40000000;ffffffff] SIGMA0: alloc addr ok, addr is 20140000 SIGMA0: alloc addr ok, addr is 2017d000 SIGMA0: alloc addr ok, addr is 20167000 SIGMA0: alloc addr ok, addr is 2018e000 SIGMA0: alloc addr ok, addr is 20166000 SIGMA0: alloc addr ok, addr is 20179000 SIGMA0: alloc addr ok, addr is 20178000 SIGMA0: alloc addr ok, addr is 2018d000 SIGMA0: alloc addr ok, addr is 20145000 SIGMA0: alloc addr ok, addr is 20163000 SIGMA0: alloc addr ok, addr is 20162000 SIGMA0: alloc addr ok, addr is 20141000 SIGMA0: alloc addr ok, addr is 20164000 SIGMA0: alloc addr ok, addr is 20143000 SIGMA0: alloc addr ok, addr is 20149000 SIGMA0: alloc addr ok, addr is 2014a000 SIGMA0: alloc addr ok, addr is 2017e000 SIGMA0: alloc addr ok, addr is 20153000 SIGMA0: alloc addr ok, addr is 2014b000 SIGMA0: alloc addr ok, addr is 2014d000 SIGMA0: alloc addr ok, addr is 2014e000 SIGMA0: alloc addr ok, addr is 2014f000 SIGMA0: alloc addr ok, addr is 20150000 SIGMA0: alloc addr ok, addr is 20152000 SIGMA0: alloc addr ok, addr is 20154000 SIGMA0: alloc addr ok, addr is 20155000 SIGMA0: alloc addr ok, addr is 20156000 SIGMA0: alloc addr ok, addr is 20160000 SIGMA0: alloc addr ok, addr is 20168000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 SIGMA0: alloc addr ok, addr is 2017c000 //endless loop Who can give some guidance or suggestion? Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

[ARM11] Question for the ARM 11 GPIO MAPPING
by Jason.han 27 Feb '13

27 Feb '13

Dear Adam, How are you doing now ? I am fresh member for L4re . Now I have GPIO Mapping problems happened when run the L4re in Arm 11 (6410 ). .devs ==> Res.mmio(0x7f008100, 0x7f00813f); .lcd.c ==>l4io_request_iomem(0x7f008100, 0x03f, L4IO_MEM_NONCACHED, &lcd_gpio_virt_base); when "l4_mem_write(lcd_gpio_virt_base+0x00,L4_MEM_WIDTH_4BYTE,0xaaaaaaaa); download in real-hw board : the core will died as it : Ned: loading file: 'rom/arm-rv-lcd.cfg' hello | Hello World! IO | Dev_factory: register factory for N2Hw6DeviceE IO | GTF: register factory for 7Pci_dev IO | GTF: register factory for N2Hw12Msi_resourceE IO | Dev_factory: register factory for N2Hw11Gpio_deviceE IO | Io service IO | Ready. Waiting for request. fbdrv | Using LCD driver: S3C6410 fbdrv | lcd_control_virt_base is 0x3000 fbdrv | lcd_gpio_virt_base is 0x4000 fbdrv | Video memory is at virtual 0x5000 (size: 0x3fc00 Bytes) fbdrv | Physical video memory is at 0x50394000 ==>core died after delete it and only use l4_mem_read , value always is IO | Ready. Waiting for request. fbdrv | Using LCD driver: S3C6410 fbdrv | lcd_control_virt_base is 0x3000 fbdrv | lcd_gpio_virt_base is 0x4000 fbdrv | Video memory is at virtual 0x5000 (size: 0x3fc00 Bytes) fbdrv | Physical video memory is at 0x50395000 fbdrv | 0 value is 0x220022 ==> core run is ok. In the range of the GPIO ,whatever I defined , the lcd_gpio_virt_base + offset (value 0) is always 0x220022 ,can't be written . the lcd_gpio_virt_base + offset (value 0x04) is always 0x23 ,can be written ,but value never be changed . From Offset (value 0x08) is normal . why only GPIO like this ,I write some time and control -register always OK. Do you know Why , Can you give me some advices ? Thank you . I also try to .devs ==> Res.mmio(0x7f008000, 0x7f00813f); .lcd.c ==>l4io_request_iomem(0x7f008000, 0x03f, L4IO_MEM_NONCACHED, &lcd_gpio_virt_base); when "l4_mem_write(lcd_gpio_virt_base+0x100,L4_MEM_WIDTH_4BYTE,0xaaaaaaaa); The offset 0x00 ,and 0x04 same problem ,but now I can write 0xaaaaaaaa for this IO port, even though working not well . please help to check the problem . Do you have some good example for this . ps: > .devs file : local Res = Io.Res local Hw = Io.Hw Io.hw_add_devices { LCD = Hw.Device { hid = "LCD s3c6410"; Res.mmio(0x77100000, 0x77100fff); }, GPIO = Hw.Device { hid = "LCDGPIO"; Res.mmio(0x7f008100, 0x7f00813f); } } > .cfg file : is not changed ,same as arm-rv-lcd.cfg > .io file : gui => new System_bus() { } fbdrv => new System_bus() { LCD => wrap(hw-root.LCD); GPIO => wrap(hw-root.GPIO); } >module.list entry arm-lcd-example bootstrap bootstrap -serial kernel fiasco -serial_esc roottask moe rom/arm-rv-lcd.cfg module arm-rv-lcd.cfg module arm-rv-lcd.io module arm-rv-eb.devs module l4re module io module ned module fb-drv module mag module ex_fb_spectrum_cc module hello --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

FYI: Visions on Genode OS development
by Christian Helmuth 18 Feb '13

18 Feb '13

Hello L4 hackers, this morning I stumled upon a blog posting http://allsoftwaresucks.blogspot.de/2013/02/visions-on-genode-os-developmen… by Alexander Tarasikov, who also comments on "L4Linux issues" in the last section of the posting. IMO he addresses an important point that is also sporadically asked on this mailing list: Beside the technical issues with SVN and Git, how open is the development of L4Linux, L4Re etc. and what could we expect from it? Will it walk an community-relared open path in the future? I'd by very glad to hear some words about this from the current developers. Thanks -- Christian Helmuth Genode Labs http://www.genode-labs.com/ · http://genode.org/ https://twitter.com/GenodeLabs · /ˈdʒiː.nəʊd/ Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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Re: How to add EXYNOS platform support
by Chao-Jui Chang 18 Feb '13

18 Feb '13

Hi Adam, Thanks for your quick reply. After looking tegra2 bsp, I make some memory layout change. Can you help me to check about it [1]? Another question is about l4re. l4re also need platform init code at pkg/bootstrap/server/src/platform/tegra2.cc I am new to porting. I don't have any idea about how to modify this. Is there any document for reference? [1] https://www.dropbox.com/s/bjrf5l2d36wa4yw/exynos4.tgz [2] EXYNOS4 datasheet: https://www.dropbox.com/s/fcw5oe5oyjy1yg2/SEC_Exynos4210_pulbic_manual_Ver.… Thanks, Chao-Jui 2013/2/13 Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> > On Mon Feb 11, 2013 at 12:46:44 +0800, Chao-Jui Chang wrote: > > I want to port Fiasco.OC to run on hardkernel's ODROID[1] platform. > > Could anyone point out the direction of porting Fiasco to me? > > > > I find some BSP info in l4/src/kernel/fiasco/src/kern/arm/bsp, but I > don't > > know how to start porting. > > Which BSP can be the base to modify for EXYNOS platform? > > I'd go for tegra2 bsp. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers >

2 1

How to add EXYNOS platform support
by Chao-Jui Chang 13 Feb '13

13 Feb '13

Hi, I want to port Fiasco.OC to run on hardkernel's ODROID[1] platform. Could anyone point out the direction of porting Fiasco to me? I find some BSP info in l4/src/kernel/fiasco/src/kern/arm/bsp, but I don't know how to start porting. Which BSP can be the base to modify for EXYNOS platform? [1] ODROID platform: http://www.hardkernel.com/renewal_2011/products/prdt_info.php?g_code=G13399… Thanks, Chao-Jui

2 2

Using l4re in loadable modules of L4Linux
by Haohui Mai 13 Feb '13

13 Feb '13

Hi folks, I'm building a loadable module of L4Linux. The module calls l4re_rm_alloc() / l4re_rm_attach() to allocate shared memory. Because the symbols l4re_rm_attach_srv / l4re_utils_cap_alloc / l4re_ma_alloc_srv are not exported to the modules, I exported them using EXPORT_SYMBOL(). The module, however, still fails to load, complaining about that these symbols cannot be found. Is there a way to export these symbols so that loadable modules can use L4Re? Thanks very much! ~Haohui

2 1

Debug: how to enumerate all kernel objects
by Евгений Федотов 07 Feb '13

07 Feb '13

Hello, L4 Hackers! My question is: How to retrieve all kernel object list (threads, tasks, IRQs, Gates) in non-interactive way? Since Fiasco JDB stores the full list of objects, is there any l4_invoke_debugger call to retrieve object information from order number or ID? Best regards, Eugene.

2 1

About JDB non-interactive commands
by Евгений Федотов 04 Feb '13

04 Feb '13

Hello, L4 Hackers! From JDB manual I found that JDB supports non-interactive commands such as: enter_kdebug("*#I*IR+"); //enable IPC logging Does it work in other than x86 architectures, e.g.. Fiasco on ARM? Best regards, Eugene.

2 1

Fiasco.OC: question regarding l4_ipc_wait() and l4_ipc_reply_and_ipc_wait().
by Сергей Грехов 01 Feb '13

01 Feb '13

Hello, L4Hackers! I have several questions about two IPC: l4_ipc_wait() and l4_ipc_reply_and_ipc_wait(). 1) Is there any way to know on the receive side who had sent the IPC we have catched with l4_ipc_wait()? One of the ways if to enable IPC logging in JDB. But the problem is that trace usually consist of several thousands of IPCs and I need only one. Filtering helps a bit, but still it takes much more time to find needed info. 2) According to the description of l4_ipc_reply_and_ipc_wait() in header file: "A message is sent to the previous caller using the implicit reply capability. Afterwards the invoking thread waits for a message from any source." The question is what events/things/whatever updates this implicit reply capability and what will happen if this capability is invalid? And one more general question. Is there any documentation on JDB? -- Best regards, Sergey S. Grekhov

2 1

[OT] Berlin based Trust2Core GmbH searching for L4 developers
by Michael Voigt 31 Jan '13

31 Jan '13

Hey L4 hackers, As you may already know, recently a company called Trust2Core GmbH was founded in Berlin, which is heavily involved in the L4 microkernel business. This being the L4 hackers list, it might be of interest for you that Trust2Core is currently intensively seeking for employees with L4 and microkernel related skills. If that sounds interesting to you, please do not hesitate to have a look here <http://jobsuche.monster.de/Jobs/Trust2Core-GmbH_6?re=106> to obtain further information and apply ;). Kind regards, Michael -- Michael Voigt -Software Expert- Trust2Core <http://www.trust2core.de> Trust2Core GmbH Kurfürstendamm 22, D-10719 Berlin (Neues Kranzlereck) Phone: +49-30-652 136 152 Fax: +49-30-652 136 177 michael.voigt(a)trust2core.de Leadership in software virtualization technologies on consumer hardware platforms. Enabling the trusted path to user for highest security @ maximum fun! Trust2Core GmbH Geschäftsführung: Robert Butz (CEO), Melanie Tillmann (CFO) Handelsregister: Amtsgericht Bonn HRB 19360 Sitz der Gesellschaft: Bonn Notice: This transmittal and/or attachments may be privileged or confidential. It is intended solely for the addressee named above. Any dissemination, or copying is strictly prohibited. If you received this transmittal in error, please notify us immediately by reply and immediately delete this message and all its attachments. Thank you.

1 0

[OT] Berlin based Trust2Core GmbH searching for L4 developers
by Michael Voigt 31 Jan '13

31 Jan '13

Hey L4 hackers, As you may already know, recently a company called Trust2Core GmbH was founded in Berlin, which is heavily involved in the L4 microkernel business. This being the L4 hackers list, it might be of interest for you that Trust2Core is currently intensively seeking for employees with L4 and microkernel related skills. If that sounds interesting to you, please do not hesitate to have a look here <http://jobsuche.monster.de/Jobs/Trust2Core-GmbH_6?re=106> to obtain further information and apply ;). Kind regards, Michael -- Michael Voigt -Software Expert- Trust2Core <http://www.trust2core.de> Trust2Core GmbH Kurfürstendamm 22, D-10719 Berlin (Neues Kranzlereck) Phone: +49-30-652 136 152 Fax: +49-30-652 136 177 michael.voigt(a)trust2core.de Leadership in software virtualization technologies on consumer hardware platforms. Enabling the trusted path to user for highest security @ maximum fun! Trust2Core GmbH Geschäftsführung: Robert Butz (CEO), Melanie Tillmann (CFO) Handelsregister: Amtsgericht Bonn HRB 19360 Sitz der Gesellschaft: Bonn Notice: This transmittal and/or attachments may be privileged or confidential. It is intended solely for the addressee named above. Any dissemination, or copying is strictly prohibited. If you received this transmittal in error, please notify us immediately by reply and immediately delete this message and all its attachments. Thank you.

1 0

Fiasco.OC interrupt handling
by Daniel Waddington 29 Jan '13

29 Jan '13

Hi, I'm looking into the interrupt handling in Fiasco.OC r.40 (x86/amd64). Browsing the code, it appears that the IDT only gets set up on CPU 0 and therefore on a multicore platform all interrupt handling from the kernel's perspective is from core 0. Of course the user-level handlers themselves may be elsewhere. Do I have this correct or am I misunderstanding? Thanks, Daniel

2 2

Re: Error during the "ned" package build (svn revision 42)
by ggasnier31＠free.fr 29 Jan '13

29 Jan '13

On Fri, 25 Jan 2013 00:09:55 +0100, Adam Lackorzynski wrote: >On Thu Jan 24, 2013 at 22:30:36 +0100, ggasnier31(a)free.fr wrote: >> I got the following error building the "ned" package for ARM architecture (Cortex-A9, Pandaboard). >> I use the last Linaro toolchain "gcc-linaro-arm-linux-gnueabihf-4.7-2012.12-20121214_linux". >> >> make[4]: Leaving directory `/home/repository/L4.kernel/fiasco/src/l4/ArmBuild/pkg/ned/server/src/OBJ-arm_armv7a-l4f' >> make[4]: Entering directory `/home/repository/L4.kernel/fiasco/src/l4/ArmBuild/pkg/ned/server/src/OBJ-arm_armv7a-l4f' >> make[4]: *** No rule to make target `ned.lua.bin.o', needed by `ned'. Stop. >This is strange because there is a rule for that file. ned.lua should be >in the srcdir of l4/pkg/ned/server/src? Which make version? The file ned.lua is in the l4/pkg/ned/server/src directory and the make version is 3.81 Guillaume GASNIER

2 1

Fiasco.OC performance issues
by Sebastian Sumpf 29 Jan '13

29 Jan '13

Hi L4 hackers, I recently upgraded Fiasco.OC to SVN revision 42 and experience some pretty severe performance degradation compared to revision 40 on the Pandaboard (SMP). It seems that 'simga0' and the root task stall for 5 to 10 seconds during boot up. I tracked the issue down to be caused by the initial mapping operations, especially our root task maps all the available memory during bootstrap. Within the kernel the 'Context::xcpu_tlb_flush' is called for each mapping. The function sends an IPI (to CPU1 which is idle) and then waits for an IPI in order to signal the end of the operation. The whole operation seems to have gotten slower compared to revision 40, but I could not find many differences in the IPI-handling code. Do you have any ideas or suggestions what could cause the delay (maybe scheduling changes) and how to fix it? Thanks, Sebastian -- Sebastian Sumpf Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

2 3

Re: Launching NOVA on QEMU
by Alexander Boettcher 26 Jan '13

26 Jan '13

Hello, try using a cpu model which is capable emulating vmx/svm. qemu -cpu ? and you get all models. qemu -cpu phenom ... works well for me. Cheers, Alex. oleg <g6kl9-07(a)yandex.ru> schrieb: >_______________________________________________ >l4-hackers mailing list >l4-hackers(a)os.inf.tu-dresden.de >http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers

2 1

Launching NOVA on QEMU
by oleg 25 Jan '13

25 Jan '13

1 0

About java support on L4linux
by Wajidali Whowe 25 Jan '13

25 Jan '13

Dear all, I have some applications written in Java and running without any problem on my local computer, where I have off course (openjdk) support. I wanted to run these applications on one of my L4linux instances where I may only have "jamvm" (an embedded version of java, which is provided for buildroot environment) Till now I booted L4linux only with ramdisks and off course for a full Java support, which might be provided for bigger systems, it would not be possible to create ramdisks. (For instance for Ubuntu or debian or Voyage... ) Do you have any suggestion on this issue? Best Regards,

2 1

accessing msrs
by Ryan Brown 16 Jan '13

16 Jan '13

How does fiasco.oc handle accessing intel model specific registers? Is there any way to access these from user space or does this have to happen in the kernel? Specifically I'd like to access the paravirtualized clock when running under kvm.

2 1

Kernel unit tests
by Bryce Cronkite-Ratcliff 09 Jan '13

09 Jan '13

Hi Hackers, I've made modifications to several parts of the Fiasco.OC kernel and am interested in any existing tests that particularly stress kernel modules (eg scheduler, mem). I've written a handful of simple ones, but I was wondering whether there were particularly promising folders to check out somewhere in the repo. Thanks! Bryce

2 1

No known ld emulation found
by Torsten Rüger 25 Dec '12

25 Dec '12

Hi, I got the latest fiasco sources, tried to compile on a macbook pro (intel core 2 duo) but i get the above message. I did try to set it to amd64 with intel duo option. This is not my final target, i just wanted to play a bit (possibly on an emulator). Do i need a cross compiler or something , because i only have gcc 4.2.1. Something simple i'm missing ? Torsten hopea:build raisantorsten$ make test -e source || ln -sf /Users/raisantorsten/Desktop/fiasco-2012111623/src/kernel/fiasco/src source Cleaning up build directory Creating .Modules.deps make srcdir=/Users/raisantorsten/Desktop/fiasco-2012111623/src/kernel/fiasco/src objbase=/Users/raisantorsten/Desktop/fiasco-2012111623/src/kernel/build -f /Users/raisantorsten/Desktop/fiasco-2012111623/src/kernel/fiasco/src/Makefile.sub1 rm -f \ touch .Clean-auto -n Checking compiler config... CHANGED. Recompiling. No known ld emulation found make[1]: *** [.Host-config] Error 1 make: *** [create-sources] Error 2

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Raspberry pi ?
by Torsten Rüger 25 Dec '12

25 Dec '12

Hi, sorry I'm not really a os "hacker" and I haven't even got the code yet, but was wondering if someone could help me with my issue: Is there any activity of L4 on raspberry pi (a pocket size computer) ? Or is there elsewhere I can ask. Specifically the plan would be to build a ruby-machine on it. Single user but multi-process. If would only need to be able to access usb,ethernet and gpios. And run and start several ruby processes. I know ruby vm well enough to cut that down to size. But I have no idea of how difficult it would be to remove linux and replace it with those 3 device drivers. Or even where to get those, how to integrate them. So i was hoping somebody here could say how crazy this is, or if I can stamp down some trodden path ? Thanks Torsten

3 2

Page tables apparently don't get completely freed on 64-bit Fiasco.OC
by Christian Prochaska 13 Dec '12

13 Dec '12

When running the test case from https://github.com/genodelabs/genode/issues/559 on 64-bit Fiasco.OC, the kernel runs out of memory after the sequential construction and destruction of tasks. I've added some debug output to the kernel which tracks the kernel memory allocations and deallocations. The attached log files cover the creation and destruction of one task on 64-bit and 32-bit Fiasco.OC. In the 64-bit case the allocations reported in lines (05/06), (07/08), (12/13), (14/15), (20/21) and (24/25) don't have matching calls of 'free()'. These allocations belong to the 'Ptab::Walk::sync()' and 'Ptab::Walk::walk()' functions. It looks like only a part of the page table gets destroyed during 'Mem_space::dir_shutdown()'. In the 32-bit case the amout of memory available after the destruction of the task is the same as before the construction, but what I found odd about the log output is that the allocations reported in lines (10/11) and (14/15) don't have matching calls of 'free()', whereas the allocations reported in lines (09) and (12/13) each have two calls of 'free()' (in lines (22/25) and (28/32)), which makes the amount of memory available balanced again. Christian

2 1

L4linux on virtual box
by FU_LONG 13 Dec '12

13 Dec '12

Hi, I have built L4linux(l4linux-mag-x86.iso) and made it run on qemu successfully. But when I try to run it on virtual box, it stops, please see the following picture: I have put the iso file in Attachment, could you please have a try and give me some advise? ------------------ Best Regard, Long Fu 从QQ邮箱发来的超大附件 l4linux-mag-x86.iso (42.18M, 2013年01月06日 17:05 到期)进入下载页面：http://mail.qq.com/cgi-bin/ftnExs_download?t=exs_ftn_download&k=7…

2 1

Nova+Nul one Execution Context suspend a second Execution Context
by Mehdi AICHOUCH 12 Dec '12

12 Dec '12

Hello Alexander, I wrote a simple example to test the NOVA+NUL. In my example, I created two Execution Contexts. When the the first Execution Context starts, it obtains a portal capability to the second Execution Context, and run a while(true) loop as follow : ... while(1) { Logging::printf("#tsc=%llu\n", now); nova_call(pt); } ... The second Execution Context run also a while(true) loop as follow: ... while(1) { count++; Logging::printf("WorkerThread is working... count= %u\n", count); } ... The first Execution Context call the second Execution Context. When the second Execution Context receive the call in its portal function, it calls the msleep( ) function on a TimerHelper instance that it has already created: unsigned portal_func(Utcb &utcb, Utcb::Frame &input, bool &free_cap, cap_sel pid) { Logging::printf("Thread will sleep... count=%u\n", count); timer->msleep(1000); return ENONE; } The problem is that, it is the first Execution Context who is blocked and not the second Execution Context. Could anyone please give me an example of how can I achieve the inverse case, where the first EC continue running and suspends the second EC. this is my code to obtain the portal: cap_sel pseudonym = alloc_cap(); res = ParentProtocol::get_pseudonym(*utcb, "s0/ec2", 0, pseudonym); cap_sel pt = alloc_cap(); res = ParentProtocol::get_portal(*utcb, pseudonym, pt, true, "s0/worker_thread"); Thank you in advance. Mehdi

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Re: startstop test case of the NOVA-NUL microhypervisor
by Alexander Boettcher 10 Dec '12

10 Dec '12

Hi, try to add "name::/s0/timer" to the hello config. Cheers, Alexander Böttcher. Mehdi AICHOUCH <foxmehdi(a)gmail.com> schrieb: >_______________________________________________ >l4-hackers mailing list >l4-hackers(a)os.inf.tu-dresden.de >http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers

2 1

startstop test case of the NOVA-NUL microhypervisor
by Mehdi AICHOUCH 07 Dec '12

07 Dec '12

Hello everyone, I am trying to test the NOVA+NUL microhypervisor. I played with the test application "nul/michal/apps/tests/startstop". So, I modified this test to try a new a new test case, by modifying the "hello" program that is started by the "startstop" program. I added to the Hello program the following code : ... TimerHelper * timer; timer = new TimerHelper(this); while(1) { Logging::printf("Hello ... \n", now); timer->msleep(1000); } ... This simple code will print a message and suspend the Hello program for 1 second. The problem is that when I tested this program alone, it worked perfectly but when this same program is started by the "startstop" program using start_config(), it does not suspend on the msleep(1000). Is my test correct or allowed by the NOVA-NUL microhypervisor? If it is the case, could anyone please help to debug this issue. Many thanks in advance. Mehdi PS: this is my configuration script. #!/usr/bin/env novaboot # -*-sh-*- HYPERVISOR_PARAMS=serial QEMU_FLAGS=-cpu phenom -smp 1 -serial stdio bin/apps/sigma0.nul tracebuffer_verbose S0_DEFAULT hostserial hostvga hostkeyb:0,0x60,1,12,2 \ script_start:1 script_waitchild service_config bin/apps/startstop.nul bin/apps/startstop.nulconfig <<EOF sigma0::cpu:1 sigma0::mem:16 name::/s0/log name::/s0/config name::/s0/timer name::/s0/fs/rom name::/s0/admission || rom://bin/apps/startstop.nul rom://test.nulconfig EOF bin/apps/hello.nul test.nulconfig <<EOF sigma0::cpu:1 sigma0::mem:16 name::/s0/log name::/s0/admission || rom://bin/apps/hello.nul EOF

1 0

how to use initramfs with l4linux
by Ryan Brown 06 Dec '12

06 Dec '12

How do I use an initramfs with l4linux? I tried using "l4x_rd=rom/initrd.cpio.gz" but it doesn't work. I see linux trying to use it: INITRD: 15000000 - 15114e00 ... Unpacking initramfs... INITRD: Freeing memory. ... But then I get Failed to execute /init Kernel panic - not syncing: No init found. Try passing init= option to kernel. See Linux Documentation/init.txt for guidance. I'm able to use the same initramfs file to boot normal linux kernel. I tried various combinations of cpio formats and compression but it doesn't seem to help. The only thing that works is compiling the initramfs into the kernel which I want to avoid.

1 0

error of building fiasco.OC
by FU_LONG 04 Dec '12

04 Dec '12

2 1

apic
by Ryan Brown 03 Dec '12

03 Dec '12

Is it possible to configure x86 fiasco to avoid using the apic? If so, would this have a bad effect on performance? Thanks, Ryan Brown

2 1

Re: FOSDEM 2013 - Microkernels / Component-based OSes devroom
by Stefan Kalkowski 03 Dec '12

03 Dec '12

Hi folks, sorry for bothering you again with this. I just want to remind you, there are only 12 days left until the deadline for the microkernel devroom proposals. On 10/29/2012 01:01 PM, Stefan Kalkowski wrote: > FOSDEM 2013 - Microkernels / Component-based OSes devroom > *CALL FOR PARTICIPATION* > http://fosdem.org/2013 > > The developers of several free and open-source component- and/or > microkernel-based operating systems will meet at FOSDEM 2013 in > Brussels, Belgium and will share a developer room. > > The devroom is currently looking for content in the form of talks > related to the area of component- and/or microkernel-based operating > systems. Possible topics include, but are not limited to: > > * OS introduction to developers of other OS > * Subsystems and architecture > * Hardware and device drivers > * Tools and languages > * Release engineering and testing > * Experience and learning from mistakes > * Technical challenges > * Community and life with an OS-project > * Academia and education > > Please send your talk proposal(s) no later than by 2012-12-15 to: > > microkernel-devroom at lists.fosdem.org > > Make sure to include the following in your proposal: > > * title of your talk (will be printed in the FOSDEM booklet) > * your full name (will be printed in the FOSDEM booklet) > * a short abstract > * duration of your talk (please, no longer than 45 minutes) > > The final devroom schedule (along with accepted talks) will be announced > on the above mailing list on 2012-12-22. Moreover, the speakers will be > notified via e-mail. The schedule will be also published on the FOSDEM > web and in the FOSDEM booklet after 2013-01-10. > > If you do not want to give a talk yourself, you may still send > suggestions for what else you would like to see, or do in the devroom. > Please send your suggestions to the above mailing list. > > The devroom is scheduled for Saturday of February 2. The seating > capacity of the room is 74 seats. Any changes will be announced in the > above mailing list. > -- Stefan Kalkowski Genode Labs http://www.genode-labs.com/ · http://genode.org/

1 0

App on L4Re
by OSDepend 30 Nov '12

30 Nov '12

Hi, all! I'm newbie on L4 microkernel, and have been confused by some questions of the L4 constructions! Are there any avaliable Applications or Projects directly on the L4Re but not depending On L4Linux? Like gcc or other app? If existed, can we can directly bulild some application or tools after boot L4 microkernel? Every feedbacks or documention links are appreciated! :> Best, Chen 2012-11-23 zhengc

7 14

Qusestion about building L4Re
by FU_LONG 30 Nov '12

30 Nov '12

3 2

Start Linux inside a Vancouver VM using a virtual disk.
by Mehdi AICHOUCH 27 Nov '12

27 Nov '12

Hello, I was trying to run Linux inside a Vancouver virtual machine and using a virtual disk. But, I got an error when Linux kernel try to mount the root file system. I tested the Linux kernel and the virtual disk image using Qemu and it worked well. I was also able to start the same Linux kernel on Vancouver but by providing an initrd ramfs file. Please see below the trace of the linux boot: (5) # [ 23.652175] VFS: Cannot open root device "(null)" or unknown-block(0,0) (5) # [ 23.652175] Please append a correct "root=" boot option; here are the availa (5) # | ble partitions: (5) # [ 23.652175] Kernel panic - not syncing: VFS: Unable to mount root fs on unkn (5) # | own-block(0,0) (5) # [ 23.652175] Pid: 1, comm: swapper/0 Tainted: G W 3.2.16-rt27 #3 (5) # [ 23.652175] Call Trace: (5) # [ 23.652175] [<c05f5299>] panic+0x66/0x173 (5) # [ 23.652175] [<c0849ca1>] mount_block_root+0x1d3/0x26c (5) # [ 23.652175] [<c02311bc>] ? sys_mknod+0x2c/0x30 (5) # [ 23.656100] [<c0849d93>] mount_root+0x59/0x5f (5) # [ 23.656100] [<c0849ee7>] prepare_namespace+0x14e/0x192 (5) # [ 23.656100] [<c0221665>] ? sys_access+0x25/0x30 (5) # [ 23.656100] [<c0849344>] kernel_init+0x13f/0x14e (5) # [ 23.656100] [<c0849205>] ? parse_early_options+0x25/0x25 (5) # [ 23.656100] [<c05fe6c2>] kernel_thread_helper+0x6/0x10 and this is the script I used to run Vancouver and Linux : #!/usr/bin/env novaboot # -*-sh-*- HYPERVISOR_PARAMS=serial WVDESC=Kernel compile inside VM (on virtual disk, EPT + VPID) WVTEST_TIMEOUT=1200 QEMU_FLAGS=-cpu phenom -m 2048M bin/apps/sigma0.nul tracebuffer_verbose S0_DEFAULT hostserial hostvga hostkeyb:0,0x60,1,12 script_start:1,1 \ service_config vdisk_empty:736870912 service_disk bin/apps/vancouver.nul bin/boot/munich imgs/bzImage imgs/mdisk.img vancuver.nulconfig <<EOF sigma0::mem:512 sigma0::dma name::/s0/log name::/s0/timer name::/s0/fs/rom name::/s0/admission name::/s0/disk disk::0 || rom://bin/apps/vancouver.nul PC_PS2 ahci:0xe0800000,14,0x30 drive:0,0,0 || rom://bin/boot/munich || rom://imgs/bzImage clocksource=tsc console=ttyS0 || rom://imgs/mdisk.img EOF Could someone tell me how to correct this error. Or give me some hints to another solution to build a disk image. I need a disk image in order to add some executable that I already compiled on my host machine and to run these executable on the Linux guest OS once it will start on Vancouver VM. Thank you very much in advance for your help. Mehdi

2 2

Our experience with Fiasco.OC + Genode on the Pandaboard
by Norman Feske 26 Nov '12

26 Nov '12

Dear L4 hackers, for those of you who enjoy reading experience reports, we have put together an article that describes our work with enabling the Genode OS Framework on the Pandaboard using the Fiasco.OC kernel: http://genode.org/documentation/articles/pandaboard With the new developed driver support for SD-card, USB, networking, and HDMI in place, we have become able to run a wide variety of Genode system scenarios including the GNU userland, Qt4, GDB, and L4Linux on this nice platform. In addition to creating and porting device drivers, we conducted extensive performance optimizations in order to reach an I/O performance that is roughly on par with native Linux. The article describes those steps in detail. Best regards Norman -- Dr.-Ing. Norman Feske Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

2 2

Question about L4Linux
by OSDepend 26 Nov '12

26 Nov '12

Hi, I want to know why we build L4Linux here on L4? Is there any benefit comparing to pure Linux? Best, Chen 2012-11-23 郑晨

3 3

Full Virtualization with Trustzone
by meng-qy 25 Nov '12

25 Nov '12

Hi, Adam: Thank you for your reply! > Memory on imx51 is starting at 0x90000000. At 0x60000000 there are > pheripherals, i.e. there's no usable memory where something can be copied > to (or executed). I think we make a wrong understanding about " l4sigma0_map_iomem() " . >If you want to execute something it needs to be in the > region 0x90000000-0xafffffff. A simple trick is to reduce the memory for > secure side (e.g. via imx51.conf) and use the rest for NS. Now, we use 0x90000000-0x9fffffff to run secure side, and revise the vm configuration as following: Ram_base = 0xa1000000, Ram_size = 0x4000000, // 128 MB Start_addr = Ram_base + 0x100000, // +1MB The l4_vm_state is set as: state->pc = Start_addr; state->cpsr = 0x13; //svc state->r[0] = 0; state->r[1] = 0x84D; imx51 //arch num The NS bare app's entry is set as 0xa1100000, but we still stop at "VM run", we use some tracing methods and find the system stop at: // set pending events ldmia r0!, {r1} and r1, r1, #0x1c0 mcr p15, 0, r1, c12, c1, 1 // ivt.S line:954, looks like some ISR pending control. BTW, should we write a virtual-interrupt layer to map the NS call with Secure side? I think maybe NS bare app can not visit the pheripherals address directly. Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

Re: l4-hackers Digest, Vol 115, Issue 18
by Death Jester 23 Nov '12

23 Nov '12

> Hi, > > On Wed Nov 21, 2012 at 18:45:25 +0100, Death Jester wrote: >> I have a problem with the latest version of L4Re. It just can't build it >> for ARM. I get the folllowing error message while building: >> ... Compiling cfg_scan.o >> ... Compiling cfg_parser.tab.o >> ==> Linking io >> main.o: In function `run': >> /home/jester/Repositories/test/src/l4re/l4/pkg/io/server/src/main.cc:385: undefined >> >> There seems to be an issue with the function luaopen_Io but I don't know >> what to do to fix this. Can anybody help me? >> I have already tried different toolchains. The Linaro toolchain 2012.10 >> and also different versions from Code Sourcery (2010.09 and 2012.09). > There could be some unfortunate thing in the Makefile. Is > lua_glue.swg.cc maybe empty? If yes, restore it and try again. > > > Adam Hi Adam, thank you for your answer, that fixed the problem for me. I just removed the file and did a "svn update src/l4re/l4/pkg/io/server/src/lua_glue.swg.cc" to pull it again from the server. Afterwards I was able to build L4re again. Cheers, Jester

1 0

Problem with "luaopen_Io"
by Death Jester 21 Nov '12

21 Nov '12

Hello Everybody, I have a problem with the latest version of L4Re. It just can't build it for ARM. I get the folllowing error message while building: ... Compiling cfg_scanner.o ... Compiling cfg_scan.o ... Compiling cfg_parser.tab.o ==> Linking io main.o: In function `run': /home/jester/Repositories/test/src/l4re/l4/pkg/io/server/src/main.cc:385: undefined reference to `luaopen_Io' make[5]: *** [io] Error 1 make[5]: Leaving directory `/home/jester/Repositories/test/build/l4re/pkg/io/server/src/OBJ-arm_armv7a-l4f' make[4]: *** [/home/jester/Repositories/test/build/l4re/pkg/io/server/src/OBJ-arm_armv7a-l4f] Error 2 make[4]: Leaving directory `/home/jester/Repositories/test/src/l4re/l4/pkg/io/server/src' make[3]: *** [src] Error 2 make[3]: Leaving directory `/home/jester/Repositories/test/src/l4re/l4/pkg/io/server' make[2]: *** [server] Error 2 make[2]: Leaving directory `/home/jester/Repositories/test/src/l4re/l4/pkg/io' make[1]: *** [io] Error 2 make[1]: Leaving directory `/home/jester/Repositories/test/src/l4re/l4/pkg' make: *** [pkg] Error 2 Creating build directory "/home/jester/Repositories/test/build/fiasco"... Already exists, aborting. make: *** [builddir] Error 1 make -C /home/jester/Repositories/test/src/l4re/kernel/fiasco/src/../tool/kconfig O=/home/jester/Repositories/test/build/fiasco Kconfig=Kconfig KCONFIG_AUTOHEADER=globalconfig.h KCONFIG_TRISTATE=config/tristate.conf KCONFIG_CONFIG=globalconfig.out KCONFIG_AUTOCONFIG=config/auto.conf KERNELVERSION=SVN MENUCONFIG_COLOR=blackbg INCLUDE_PPC32= INCLUDE_SPARC= fiasco_srcdir=/home/jester/Repositories/test/src/l4re/kernel/fiasco/src/.. menuconfig silentoldconfig make[1]: Entering directory `/home/jester/Repositories/test/src/l4re/kernel/fiasco/tool/kconfig' scripts/kconfig/mconf Kconfig *** End of the configuration. *** Execute 'make' to start the build or try 'make help'. make[2]: *** [menuconfig] Interrupt make[1]: *** [sub-make] Interrupt make: *** [config] Interrupt There seems to be an issue with the function luaopen_Io but I don't know what to do to fix this. Can anybody help me? I have already tried different toolchains. The Linaro toolchain 2012.10 and also different versions from Code Sourcery (2010.09 and 2012.09). Thanks in advance. Cheers, Jester

2 1

l4linux kernel as input server
by Wajidali Whowe 21 Nov '12

21 Nov '12

Hi all, I was testing l4linux server as input server and was planning to run it without io package. For this purpose I wanted to rebuild the l4linux kernel with input server option and "without use pci virtual bus" option. My purpose was to see whether the kernel could reach the real IO ports and the result was off-course as expected a kernel panic... My question is how the io package is allowed to reach the IO ports but not the l4linux kernel? Please kindly see the kernel output and the corresponding lua script below: The lua script: require("L4"); local lxname = "vmlinuz.android"; local l = L4.default_loader; local hid = l:new_channel(); local linux_caps = { log = L4.Env.log:m("rws"); -- vbus = io_caps.linux_bus, --rtc = rtc_caps.rtc, ev = hid:svr(), rom = L4.Env.rom, }; l:start( { caps = linux_caps, }, "rom/vmlinuz.android mem=256M l4-input-srv.enable=1 console=ttyLv0 ramdisk=rom/openwrt-x86-alix2-rootfs.tar.gz root=1:0 ramdisk_size=32768 l4x_rd=rom/openwrt-x86-alix2-rootfs.tar.gz init=/etc/preinit"); Kernel output: NET: Registered protocol family 16 vmlinuz.| Invalid IO-Port access at pc = 007718f1 port=0xcfb vmlinuz.| Die message: Trap: 14 Trap: 14: 0000 [#1] Modules linked in: Pid: 1, comm: swapper Not tainted 3.6.0-l4-svn27 #3 EIP: 0000:[<007718f1>] EFLAGS: 00000246 CPU: 0 EIP is at pci_direct_probe+0x53/0x1d8 EAX: 00417001 EBX: 00000003 ECX: 00110000 EDX: 00000cfb ESI: 00000001 EDI: 0077174c EBP: 10437f78 ESP: 10437f5c DS: 0000 ES: 0000 FS: 0023 GS: 0000 SS: 0023 Process swapper (pid: 1, ti=10436000 task=10435bc0 task.ti=10436000) Stack: 10437f64 00000000 0070ff6b 00000000 00441a4c 00000003 00000000 10437f88 00771756 10454ed8 00000003 10437fc0 0040005a 10437fb0 00030003 007362d4 006e8588 00000000 10bffd86 10bffd81 10bffd92 00000001 00000003 00000049 Call Trace: [<00441a4c>] ? suspend_set_ops+0x3c/0x50 [<00771756>] pci_arch_init+0xa/0x50 [<0040005a>] do_one_initcall+0x2a/0x170 [<0075e698>] kernel_init+0xd1/0x166 [<0075e119>] ? do_early_param+0x74/0x74 [<0075e5c7>] ? start_kernel+0x298/0x298 [<00407dd4>] kernel_thread_start+0x24/0x30 Code: 00 00 00 00 c7 04 24 6b ff 70 00 e8 3a 39 cb ff 85 c0 0f 84 8b 00 00 00 e8 3d 1e c9 ff 89 c6 e8 c6 21 c9 ff ba fb 0c 00 00 b0 01 <ee> b2 f8 ed 89 45 f4 b8 00 00 00 80 ef ed 31 db 3d 00 00 00 80 EIP: [<007718f1>] pci_direct_probe+0x53/0x1d8 SS:ESP 0023:10437f5c ---[ end trace 4eaa2a86a8e2da22 ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b panic: going to sleep forever, bye vmlinuz.| panic: going to sleep forever, bye Best regards,

2 1

Full Virtulization for Trustzone
by meng-qy 21 Nov '12

21 Nov '12

Hi, all: Now,we have transplanted fiasco to imx 51 bbg board. When we use l4_vm_run to init a NS world(refer to the example of vm-tz), the system stop in the step of "VM run". More specially, we stop with the function of "tz_switch_to_ns" according to debug info. Following is our log info: RAM:------------------------ [0:90000000;90000fff] [0:90061000;9008ffff] [0:90097000;90097fff] [0:9009f000;9013ffff] [4:90140000;90172fff] [0:90173000;90177fff] [4:90178000;9018efff] [0:9018f000;9100ffff] [4:91010000;91010fff] [0:91011000;910fffff] [4:91100000;91134fff] [0:91135000;aeffffff] IOMEM:---------------------- [0:0;8fffffff] [0:b0000000;ffffffff] MOE: Hello world MOE: found 506952 KByte free memory MOE: found RAM from 90000000 to af000000 MOE: allocated 496 KByte for the page array @0x9009f000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [91100000-91119428] [C:503000] l4re BOOTFS: [9111a000-91133544] [C:504000] vm-tz BOOTFS: [91134000-911341e4] [C:505000] test.bin MOE: cmdline: moe --init=rom/vm-tz MOE: Starting: rom/vm-tz MOE: loading 'rom/vm-tz' Vmm started Vm run Our configuration is: Ram_base = 0x60009000, // The reserved address in imx51, l4sigma0_map_iomem() seems ok. Ram_size = 0x4000000, // 128 MB Start_addr = Ram_base + 0x1000000, // +1MB test.bin is bare uart test-app which tested ok in imx51 bbg, we set entry "0x60009000" corresponds with Start_addr. Maybe we make some mistakes or some wrong understanding, can someone give some guidance and suggestion? Thanks a lot! Looking forward your reply. Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

Full virtualization with Trustzone
by meng-qy 19 Nov '12

19 Nov '12

Hi,all: Now,we have transplanted fiaso to imx51 bbg board, when we use l4_vm_run to init NS world (according to example of vm-tz), we found the system stop in the step of "VM run". More specifically, we stop with the processing: "return l4_ipc(vm, u, L4_SYSF_CALL, *label, l4_msgtag(L4_PROTO_TASK, 3, 0, 0), label, L4_IPC_NEVER);" The log info can be described as following: [0:90000000;90000fff] [0:90061000;9008ffff] [0:90097000;90097fff] [0:9009f000;9013ffff] [4:90140000;90172fff] [0:90173000;90177fff] [4:90178000;9018efff] [0:9018f000;9100ffff] [4:91010000;91010fff] [0:91011000;910fffff] [4:91100000;91134fff] [0:91135000;aeffffff] IOMEM:---------------------- [0:0;8fffffff] [0:b0000000;ffffffff] MOE: Hello world MOE: found 506952 KByte free memory MOE: found RAM from 90000000 to af000000 MOE: allocated 496 KByte for the page array @0x9009f000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [91100000-91119428] [C:503000] l4re BOOTFS: [9111a000-91133608] [C:504000] vm-tz BOOTFS: [91134000-911341e4] [C:505000] test.bin MOE: cmdline: moe --init=rom/vm-tz MOE: Starting: rom/vm-tz MOE: loading 'rom/vm-tz' Vmm started VM run Our configuration is: Ram_base = 0x60009000, // The reserved address in imx51,l4sigma0_map_iomem() looks OK. Ram_size = 0x4000000, // 128 MB Start_addr = Ram_base + 0x1000000, // +1MB The test.bin is bare uart test-app we test ok in imx51 board, we change the entry as 0x61009000, correspond with Start_addr. Maybe we make some mistakes, who can give some guidance and suggestions? Looking forward to your reply. Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

1 0

Touchscreen
by Wajidali Whowe 15 Nov '12

15 Nov '12

Dear all, do you have any experience on configuring the touchscreen for L4? I have an x86 computer with a touchscreen and do not know where to start. Does anyone have a small tip for me to start? Best Regards

5 20

Fiasco.OC Kernel Semaphores r38->r40
by Daniel Waddington 14 Nov '12

14 Nov '12

Hi, I noticed that kernel semaphores seem to have vanished from Fiasco.OC r40 (when they were definitely there in r38). They seem to have been replaced with an ipc/sw irq solution - is this true? Can someone explain the design rationale behind this? If we want to back-port them into r40 is there anything we need to be aware of? Thanks, Daniel Waddington

2 1

how to run the vm-tz example?
by 朱振 14 Nov '12

14 Nov '12

Hi all, I try to run the vm-tz example on imx51,in the example it start a linux in NS world by vm function,my question are: 1. How can i get (or build) the linux image and ramdisk files that the example requires ? 2. I want to run a fiasco in NS world use the example code ,some body can tell me how to get it done? I'm looking forward to your reply!

1 0

Re: Trustzone Dual-OS
by meng-qy 14 Nov '12

14 Nov '12

Hi,l4-hackers: We read some history mails and fiasco src in detail. We found some tz-supports in fiasco, one part is ivt.s in fiasco kernal , the other is vmm in L4re. The vmm provide a entry to load non-secure os, the example demonstrates a full virtualization of tz-linux. However, we found tz-linux is just a concept. Does our understanding above have something wrong? How can we reach the final dual-os goal in the shortest possible time? We sincerely request your help! Best regards Steven Meng ----- Original Message ----- From: meng-qy To: l4-hackers(a)os.inf.tu-dresden.de Sent: Monday, November 12, 2012 4:28 PM Subject: Trustzone Dual-OS Hi,all： Now,we are trying to make dual-os solution based on fiasco, android and trustzone. Does it already have the stable dual-os soluton in l4-hacker community? If have, how can we get it? we can not find the trustzone-surpport in the latest release of source tree. Thanks and looking forward your response. Best Regards Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

1 0

Trustzone Dual-OS
by meng-qy 12 Nov '12

12 Nov '12

Hi,all： Now,we are trying to make dual-os solution based on fiasco, android and trustzone. Does it already have the stable dual-os soluton in l4-hacker community? If have, how can we get it? we can not find the trustzone-surpport in the latest release of source tree. Thanks and looking forward your response. Best Regards Steven Meng --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

1 0

bootstrapper error
by Ryan Brown 10 Nov '12

10 Nov '12

Hi, I just tried updating to fiasco/l4re from 2012081219, and now I'm getting bootstrapper errors. Previously bootstrap went like this: L4 Bootstrapper Build: #1 Wed Jun 27 14:54:16 PDT 2012, x86-32, 4.4.3 RAM: 0000000000000000 - 000000000009f3ff: 637kB RAM: 0000000000100000 - 0000000012bfcfff: 306164kB Total RAM: 299MB Moving 11 modules to 1100000 with offset f2fc2000 moving module 01 { e13e000, e1b4914 } (ELF) -> { 1100000 - 1176914 } moving module 02 { e1b5000, e1f5a05 } (ELF) -> { 1177000 - 11b7a05 } moving module 03 { e1f6000, e3b92fb } (ELF) -> { 11b8000 - 137b2fb } moving module 04 { e3ba000, e4a8004 } (ELF) -> { 137c000 - 146a004 } moving module 05 { e4a9000, e6a301e } (ELF) -> { 146b000 - 166501e } moving module 06 { 12a71000, 12a71237 } (-- v) -> { 5a33000 - 5a33237 } moving module 07 { e6a4000, ef0f8c7 } (ELF) -> { 1666000 - 1ed18c7 } moving module 08 { ef10000, eff8eba } (ELF) -> { 1ed2000 - 1fbaeba } moving module 09 { 12bcd000, 12bcd3b7 } (# vi) -> { 5b8f000 - 5b8f3b7 } moving module 10 { 12a72000, 12a72106 } (l4li) -> { 5a34000 - 5a34106 } moving module 11 { eff9000, f9280a6 } (ELF) -> { 1fbb000 - 28ea0a6 } => Images moved But now I get this: L4 Bootstrapper Build: #1 Tue Nov 6 15:26:40 PST 2012, x86-32, 4.6.x RAM: 0000000000000000 - 000000000009f3ff: 637kB RAM: 0000000000100000 - 0000000012bfcfff: 306164kB Total RAM: 299MB Moving modules behind 1100000 moving module 00 { e13e000-e163d3f } -> { 12b6c000-12b91d3f } [154944] moving module 01 { e164000-e1c0c6b } -> { 12b92000-12beec6b } [380012] moving module 02 { e1c1000-e41df1f } -> { 12bef000-12e4bf1f } [2477856] ERROR: module target [12bef000-12e4bf1f) overlaps [ 12bfd000, 12bfffff] { 3000} Arch BIOS can not move module Key press reboots... I've tried specifying different modaddrs, but it always starts moving modules to 12b6c000 and runs past the end of RAM. I tried increasing the ram to my virtual machine, but bootstrap just picks a higher address that doesn't work. What am I doing wrong? Also, I noticed now that io is 11mb. Is it normal for it to be this big?

2 1

bug report: compile about l4re
by Wangjintang 06 Nov '12

06 Nov '12

Environment: Linux linux-tilera 2.6.32.12-0.7-default #1 SMP 2010-05-20 11:14:20 +0200 x86_64 x86_64 x86_64 GNU/Linux gcc version 4.3.4 [gcc-4_3-branch revision 152973] (SUSE Linux) packet: l4re-core-2012081219.tar.bz2 step: 1. Create build directory somedir$ cd src/kernel/fiasco somedir/src/kernel/fiasco$ make BUILDDIR=mybuild The make step will generate a build directory called mybuild. 1. Got the build directory somedir/src/kernel/fiasco$ cd mybuild 1. Configure kernel build somedir/src/kernel/fiasco/mybuild$ make config Will launch the configuration menu. This is the time to configure your kernel. The default config will build a uniprocessor IA32 kernel with debugging features enabled. If you're happy with this step you may skip it. 1. Build it somedir/src/kernel/fiasco/mybuild$ make -j4 In file included from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/kmem_alloc.cpp:3, from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/boot/bootstrap.cc:18: /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/auto_quota.h:13: error: invalid pure specifier (only `= 0' is allowed) before ';' token /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/auto_quota.h:14: error: invalid pure specifier (only `= 0' is allowed) before ';' token In file included from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:22, from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/kmem_alloc.cpp:4, from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/boot/bootstrap.cc:18: /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/bits/list_basics.h:50: error: invalid pure specifier (only `= 0' is allowed) before ';' token /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/bits/list_basics.h:51: error: invalid pure specifier (only `= 0' is allowed) before ';' token In file included from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/kmem_alloc.cpp:4, from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/boot/bootstrap.cc:18: /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:46: error: invalid pure specifier (only `= 0' is allowed) before ';' token /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:47: error: invalid pure specifier (only `= 0' is allowed) before ';' token In file included from /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/boot/bootstrap.cc:18: /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/bits/list_basics.h: In instantiation of 'cxx::Bits::Basic_list<cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item> >': /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:45: instantiated from 'cxx::S_list<Kmem_alloc_reaper, cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item> >' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:127: instantiated from 'cxx::S_list_bss<Kmem_alloc_reaper>' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/kmem_alloc.cpp:309: instantiated from here /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/bits/list_basics.h:50: error: initializer specified for non-virtual method 'cxx::Bits::Basic_list<POLICY>::Basic_list(const cxx::Bits::Basic_list<POLICY>&) [with POLICY = cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item>]' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/bits/list_basics.h:51: error: initializer specified for non-virtual method 'void cxx::Bits::Basic_list<POLICY>::operator=(const cxx::Bits::Basic_list<POLICY>&) [with POLICY = cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item>]' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist: In instantiation of 'cxx::S_list<Kmem_alloc_reaper, cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item> >': /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:127: instantiated from 'cxx::S_list_bss<Kmem_alloc_reaper>' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/kern/kmem_alloc.cpp:309: instantiated from here /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:46: error: initializer specified for non-virtual method 'cxx::S_list<T, P>::S_list(const cxx::S_list<T, P>&) [with T = Kmem_alloc_reaper, POLICY = cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item>]' /home/L4/L4re/l4re-core-2012081219/src/kernel/fiasco/src/lib/libk/slist:47: error: initializer specified for non-virtual method 'void cxx::S_list<T, P>::operator=(const cxx::S_list<T, P>&) [with T = Kmem_alloc_reaper, POLICY = cxx::Bits::Basic_list_policy<Kmem_alloc_reaper, cxx::S_list_item>]' ... Making __assert_fail.o

2 1

Compiling l4re on ubuntu 12.10
by Ali Nehzat 05 Nov '12

05 Nov '12

Hi, Could someone please let me know what the expected dev environment is and which tool chains I should in fact be using? I'm trying to compile L4Re for a pandaboard on a 32-bit stock standard Ubuntu 12.10 dev machine with gcc-arm-linux-gnueabihf installed on it, however during the "make O=<build-path> config" step, after going through the menu config I get a pile of "bash: arm-linux-gcc: command not found" error. Thanks in advance, Ali

2 1

1G memory for L4Linux on Panda
by Владимир Шилкин 01 Nov '12

01 Nov '12

Hello, When allow L4Linux using more than 512M of memory, user level apps execution can cause ‘Segmentation fault’ or glibc error. For example run 'find' command on fresh booted system. We use PandaBoard. To configure system use 1Gb RAM we set in src/l4/mk/platforms/pandaboard.conf PLATFORM_RAM_SIZE_MB = 1024 Best Regards, Vladimir

2 1

how to get Task
by 朱振 01 Nov '12

01 Nov '12

hi, I want to know the memory size that each Task uses,Is there any API can help me to get this ? Thanks

2 1

Page Fault on real hardware
by Wajidali Whowe 31 Oct '12

31 Oct '12

Dear all, I have been trying to run L4linux on a real hardware (x86 PC). Everything seems fine once I try the image with the qemu, however the following error appears on the real hardware: .. .. .. vmlinuz . | main thread will be 413 vmlinuz . | l4x_register_pointer_section: addr = 005e6000 size 929792 vmlinuz . | section-with-init: virt: 0x5e6000 to 0x6c8fff [908KiB] vmlinuz . | section-with-init: virt: .... .. .. .. vmlinuz . | Loading: rom/ramdiskfs.tar.gz vmlinuz . | INITRD: Size of RAMdisk is 32768KiB vmlinuz . | RAMdisk from 188800000 to 1a800000 [32768KiB] vmlinuz . | Page fault (non-resolved): pfa=0 pc=473569 Die message: Trap: 14 vmlinuz . | panic: going to sleep forever, bye Would you please have an idea or a suggestion for this problem? Best Regards

3 7

get memory size each task uses
by 朱振 30 Oct '12

30 Oct '12

hi, I want to know the memory size that each Task uses,Is there any API that can help me to get this ? Thanks

1 0

Re: FOSDEM 2013 - Microkernels / Component-based OSes devroom
by Stefan Kalkowski 30 Oct '12

30 Oct '12

Hi all, apologies for the high cross-posting traffic. I left out the information on how to subscribe to the devroom's mailing list previously: https://lists.fosdem.org/listinfo/microkernel-devroom Please, limit the discussion regarding the devroom's organization, respectively your proposals to the above list instead of replying to all organizations in this mail-header. Thank you in advance Stefan On 29.10.2012 13:01, Stefan Kalkowski wrote: > FOSDEM 2013 - Microkernels / Component-based OSes devroom > *CALL FOR PARTICIPATION* > http://fosdem.org/2013 > > The developers of several free and open-source component- and/or > microkernel-based operating systems will meet at FOSDEM 2013 in > Brussels, Belgium and will share a developer room. > > The devroom is currently looking for content in the form of talks > related to the area of component- and/or microkernel-based operating > systems. Possible topics include, but are not limited to: > > * OS introduction to developers of other OS > * Subsystems and architecture > * Hardware and device drivers > * Tools and languages > * Release engineering and testing > * Experience and learning from mistakes > * Technical challenges > * Community and life with an OS-project > * Academia and education > > Please send your talk proposal(s) no later than by 2012-12-15 to: > > microkernel-devroom at lists.fosdem.org > > Make sure to include the following in your proposal: > > * title of your talk (will be printed in the FOSDEM booklet) > * your full name (will be printed in the FOSDEM booklet) > * a short abstract > * duration of your talk (please, no longer than 45 minutes) > > The final devroom schedule (along with accepted talks) will be announced > on the above mailing list on 2012-12-22. Moreover, the speakers will be > notified via e-mail. The schedule will be also published on the FOSDEM > web and in the FOSDEM booklet after 2013-01-10. > > If you do not want to give a talk yourself, you may still send > suggestions for what else you would like to see, or do in the devroom. > Please send your suggestions to the above mailing list. > > The devroom is scheduled for Saturday of February 2. The seating > capacity of the room is 74 seats. Any changes will be announced in the > above mailing list. > -- Stefan Kalkowski Genode Labs http://www.genode-labs.com/ · http://genode.org/

1 0

FOSDEM 2013 - Microkernels / Component-based OSes devroom
by Stefan Kalkowski 29 Oct '12

29 Oct '12

FOSDEM 2013 - Microkernels / Component-based OSes devroom *CALL FOR PARTICIPATION* http://fosdem.org/2013 The developers of several free and open-source component- and/or microkernel-based operating systems will meet at FOSDEM 2013 in Brussels, Belgium and will share a developer room. The devroom is currently looking for content in the form of talks related to the area of component- and/or microkernel-based operating systems. Possible topics include, but are not limited to: * OS introduction to developers of other OS * Subsystems and architecture * Hardware and device drivers * Tools and languages * Release engineering and testing * Experience and learning from mistakes * Technical challenges * Community and life with an OS-project * Academia and education Please send your talk proposal(s) no later than by 2012-12-15 to: microkernel-devroom at lists.fosdem.org Make sure to include the following in your proposal: * title of your talk (will be printed in the FOSDEM booklet) * your full name (will be printed in the FOSDEM booklet) * a short abstract * duration of your talk (please, no longer than 45 minutes) The final devroom schedule (along with accepted talks) will be announced on the above mailing list on 2012-12-22. Moreover, the speakers will be notified via e-mail. The schedule will be also published on the FOSDEM web and in the FOSDEM booklet after 2013-01-10. If you do not want to give a talk yourself, you may still send suggestions for what else you would like to see, or do in the devroom. Please send your suggestions to the above mailing list. The devroom is scheduled for Saturday of February 2. The seating capacity of the room is 74 seats. Any changes will be announced in the above mailing list.

1 0

In l4vcpu_irq_restore function don't use l4vcpu_irq_disable(vcpu)
by Ildar Ismagilov 17 Oct '12

17 Oct '12

In function l4vcpu_irq_restore on l4/pkg/libvcpu/include/vcpu.h file: L4_CV L4_INLINE void l4vcpu_irq_restore(l4_vcpu_state_t *vcpu, l4vcpu_irq_state_t s, l4_utcb_t *utcb, l4vcpu_event_hndl_t do_event_work_cb, l4vcpu_setup_ipc_t setup_ipc) L4_NOTHROW { if (s & L4_VCPU_F_IRQ) l4vcpu_irq_enable(vcpu, utcb, do_event_work_cb, setup_ipc); } why don't call l4vcpu_irq_disable(vcpu) if "s" variable don't include L4_VCPU_F_IRQ flag? possible should be so: L4_CV L4_INLINE void l4vcpu_irq_restore(l4_vcpu_state_t *vcpu, l4vcpu_irq_state_t s, l4_utcb_t *utcb, l4vcpu_event_hndl_t do_event_work_cb, l4vcpu_setup_ipc_t setup_ipc) L4_NOTHROW { if (s & L4_VCPU_F_IRQ) l4vcpu_irq_enable(vcpu, utcb, do_event_work_cb, setup_ipc); else l4vcpu_irq_disable(vcpu); } -- Best regards Ildar

3 2

Build of ipcmon under Ubuntu 12.04
by Dustin Oprea 11 Oct '12

11 Oct '12

I'm currently stuck on building due to the ipcmon subproject and a "__sprintf_chk" error under Ubuntu 12.04: /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L741': (.text+0x4088): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x45c3): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x473b): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x4833): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `d_print_mod_list': (.text+0x62e9): undefined reference to `__sprintf_chk' make[3]: *** [ipcmon] Error 1 make[3]: Leaving directory `/home/dustin/tudos.build/l4/pkg/ipcmon/server/src/OBJ-x86_586-l4v2' make[2]: *** [/home/dustin/tudos.build/l4/pkg/ipcmon/server/src/OBJ-x86_586-l4v2] Error 2 make[2]: Leaving directory `/home/dustin/tudos/l4/pkg/ipcmon/server/src' make[1]: *** [src] Error 2 make[1]: Leaving directory `/home/dustin/tudos/l4/pkg/ipcmon/server' make: *** [server] Error 2 I tried disabling the substitution. According to the GCC documentation, any one of three separate options will do it: -fstack-protector Emit extra code to check for buffer overflows, such as stack smashing attacks. This is done by adding a guard variable to functions with vulnerable objects. This includes functions that call alloca, and functions with buffers larger than 8 bytes. The guards are initialized when a function is entered and then checked when the function exits. If a guard check fails, an error message is printed and the program exits. NOTE: In Ubuntu 6.10 and later versions this option is enabled by default for C, C++, ObjC, ObjC++, if none of -fno-stack-protector, -nostdlib, nor -ffreestanding are found. So, I added all three of the options (at the bottom) to binary.inc: CXXFLAGS+= $(BID_CFLAGS_GSTAB) $(BID_CFLAGS_OMIT_FP) CXXFLAGS+= $(CXXFLAGS_$(OSYSTEM)) CXXFLAGS+= $(CXXFLAGS_$(@:.o=.cc)) $(CXXFLAGS_$(@:.o=.cc)_$(OSYSTEM)) CXXFLAGS+= $(CXXFLAGS_$(@:.o=.cpp)) $(CXXFLAGS_$(@:.o=.cpp)_$(OSYSTEM)) CXXFLAGS+= $(OPTS) $(filter-out -Wmissing-declarations -Wstrict-prototypes -Wmissing-prototypes,$(WARNINGS)) CXXFLAGS+= -fno-common -fno-stack-protector -nostdlib -ffreestanding I also added the same options on to the back of CFLAGS, just to be thorough. This is the output. As you can see, they make it into the command-line (there's some duplication due to our redundant adds), but I'm still getting the same error: ... Compiling ipcmon-server.o LD_PRELOAD=/home/dustin/tudos.build/l4/tool/gendep/libgendep.so GENDEP_TARGET=ipcmon-server.o GENDEP_BINARY=cc1 gcc -m32 -c -DLOG_TAG=\"ipcmon\" -DUSE_UCLIBC=y -DRAM_BASE=0x0 -DSYSTEM_x86_586_l4v2 -DARCH_x86 -DCPUTYPE_586 -DL4API_l4v2 -DCONFIG_L4_CALL_SYSCALLS -DCONFIG_L4_ABS_SYSCALLS -I/home/dustin/tudos.build/l4/pkg/ipcmon/idl/OBJ-x86-l4v2 -I/home/dustin/tudos.build/l4/include/x86/l4v2 -I/home/dustin/tudos.build/l4/include/l4v2 -I/home/dustin/tudos.build/l4/include/x86 -I/home/dustin/tudos.build/l4/include -I/home/dustin/tudos/l4/../dice/include -I/home/drops/include/x86/l4v2 -I/home/drops/include/l4v2 -I/home/drops/include/x86 -I/home/drops/include -nostdinc -I/home/dustin/tudos.build/l4/include/x86/uclibc -I/home/dustin/tudos.build/l4/include/uclibc -I/home/dustin/tudos.build/l4/include/uclibc++ -I/home/drops/include/x86/uclibc -I/home/drops/include/uclibc -I/home/drops/include/uclibc++ -I/usr/lib/gcc/i686-linux-gnu/4.6/include -I/usr/lib/gcc/i686-linux-gnu/4.6/include-fixed -gstabs+ -g -O2 -fno-strict-aliasing -march=i586 -Wall -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -fno-common -fno-stack-protector -nostdlib -ffreestanding -fno-stack-protector -g /home/dustin/tudos.build/l4/pkg/ipcmon/idl/OBJ-x86-l4v2/ipcmon-server.c -o ipcmon-server.o ==> Linking ipcmon LD_PRELOAD=/home/dustin/tudos.build/l4/tool/gendep/libgendep.so GENDEP_TARGET=ipcmon GENDEP_BINARY=ld GENDEP_BINARY_ALT1=ld ld -m elf_i386 -o ipcmon /home/dustin/tudos.build/l4/lib/x86_586/crt0.o components.o capdescriptor.o capmanager.o blacklist.o whitelist.o ipcmon-server.o -Ttext=0x1000000 --hash-style=sysv -L/home/dustin/tudos.build/l4/lib/x86_586/l4v2 -L/home/dustin/tudos.build/l4/lib/x86_586 -L/home/dustin/tudos.build/l4/lib -L/home/drops/lib/x86_586/l4v2 -L/home/drops/lib/x86_586 -L/home/drops/lib -T/home/dustin/tudos.build/l4/lib/x86_586/main_stat.ld -lparsecmdline -static -lgeneric_ts -ll4env -ll4rm -ldm_generic -ldm_mem -lthread -lsemaphore -llogserver_capsule -lnames -ll4util_root -ll4util -lsigma0 -lroot -ll4env -ll4env_err -ll4rm -ldm_generic -ldm_mem -lthread -lslab -ll4sys -luc_c++ -lc++start.o /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a -lmain -lcxx_base -nostdlib -luc_c -luclibc_support -u mmap_anon -lc_be_simple_mem -lc_be_mmap -lc_be_mmap_util -lc_be_l4env_start_stop -lc_be_minimal_log_io -luc_be_simple_sleep -ll4env -llogserver_capsule -ll4rm -ldm_generic -ldm_mem -lthread -lgeneric_ts -luc_c /usr/lib/gcc/i686-linux-gnu/4.6/libgcc_eh.a /usr/lib/gcc/i686-linux-gnu/4.6/libgcc.a -luc_c -ll4sys -ll4util -luc_be_minimal_io -Ttext=0x1000000 --warn-common -gc-sections /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L741': (.text+0x4088): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x45c3): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x473b): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `.L747': (.text+0x4833): undefined reference to `__sprintf_chk' /usr/lib/gcc/i686-linux-gnu/4.6/libsupc++.a(cp-demangle.o): In function `d_print_mod_list': (.text+0x62e9): undefined reference to `__sprintf_chk' make[3]: *** [ipcmon] Error 1 make[3]: Leaving directory `/home/dustin/tudos.build/l4/pkg/ipcmon/server/src/OBJ-x86_586-l4v2' make[2]: *** [/home/dustin/tudos.build/l4/pkg/ipcmon/server/src/OBJ-x86_586-l4v2] Error 2 make[2]: Leaving directory `/home/dustin/tudos/l4/pkg/ipcmon/server/src' make[1]: *** [src] Error 2 make[1]: Leaving directory `/home/dustin/tudos/l4/pkg/ipcmon/server' make: *** [server] Error 2 Then, I built a test program, which builds perfectly: #include <stdio.h> void main() { char message[100]; __sprintf_chk(message, 0, 100, "Test."); printf("Out: %s\n", message); } The output: $ gcc -o sprintfchk_test sprintfchk_test.c $ ./sprintfchk_test Out: Test. I then thought "maybe it's the GCC version", since your list of dependencies indicates GCC 3 (my version is 4.6.3). So, I tried 3.0.4, 3.1.0, and 3.4.6, but none of them would build due to hard build errors (clearly, I'm missing some required flags). I'd appreciate some help with this error. Obviously, I'd prefer Ubuntu, but what distributions would you suggest for building? Dustin

3 2

Re: Build of ipcmon under Ubuntu 12.04
by Dustin Oprea 11 Oct '12

11 Oct '12

Bjoern: I've already run through the process at the L4RE link, and got the "hello" example booting in a VirtualBox instance. However, I want a full-environment.. I want a command-prompt. I'd also like to build the DOpE GUI (just to be complete). All I see there is useful only for module development and kernel development, but no instructions on how to get a full system running. Where do I go for help on that? These ambiguities are one of the reasons it has taken me so long to sit down and work on DROPS. There are many paths that seem similar to an outsider. Perhaps the group can take that old website down, for the further clarity to the outsiders and the peace-of-mind of the insiders? Dustin On Thu, Oct 11, 2012 at 11:05 AM, Björn Döbel <doebel(a)os.inf.tu-dresden.de>wrote: > Am Thu, 11 Oct 2012 10:33:51 -0400 > schrieb Dustin Oprea <myselfasunder(a)gmail.com>: > > > Thank you, Björn. > > > > I followed the directions and checked-out repomgr, which, in turn, > > downloaded what I have. The instructions are on this page: > > > > http://os.inf.tu-dresden.de/drops/download.html > > This page has been last modified 5 years ago! ;) Please use the links > below: > > > > http://os.inf.tu-dresden.de/fiasco > > > http://os.inf.tu-dresden.de/l4re > > > Bjoern > > -- > Dipl.-Inf. Bjoern Doebel Mail: doebel(a)tudos.org > TU Dresden, OS Chair Phone: +49 351 463 38 799 > Noethnitzer Str. 46 Fax: +49 351 463 38 284 > 01187 Dresden, Germany WWW: http://www.tudos.org/~doebel > -- > "Futbol no es en simple juego. Es una arma de la revolucion!" >

2 1

About ARM11 support
by james 10 Oct '12

10 Oct '12

Hi hackers, Afaik, fiasco does not support ARM11 architecture. I wonder whether it is in progress. James --------------------------------------------------------------------------------------------------- Confidentiality Notice: The information contained in this e-mail and any accompanying attachment(s) is intended only for the use of the intended recipient and may be confidential and/or privileged of Neusoft Corporation, its subsidiaries and/or its affiliates. If any reader of this communication is not the intended recipient, unauthorized use, forwarding, printing, storing, disclosure or copying is strictly prohibited, and may be unlawful.If you have received this communication in error,please immediately notify the sender by return e-mail, and delete the original message and all copies from your system. Thank you. ---------------------------------------------------------------------------------------------------

2 1

Re: Fiasco.oc & trustzone
by Nikolay Golikov 24 Sep '12

24 Sep '12

2012/9/20 Nikolay Golikov <decaprox(a)gmail.com>: > 2012/9/20 Adam Lackorzynski <adam(a)os.inf.tu-dresden.de>: >> On Thu Sep 20, 2012 at 15:25:54 +0400, Nikolay Golikov wrote: >>> 2012/9/20 Adam Lackorzynski <adam(a)os.inf.tu-dresden.de>: >>> > On Wed Sep 19, 2012 at 17:41:01 +0400, Nikolay Golikov wrote: >>> >> Now I have another problem: I map aipstz-1 registers with >>> >> l4io_request_iomem(base, AISPTZ_SIZE, L4IO_MEM_NONCACHED, &_vbase); >>> >> (base = 0x53F00000, AISPTZ_SIZE = 0x4000) >>> >> It return 0. >>> >> >>> >> But when I try to write to mapped registers my program stopping: >>> >> *((volatile l4_umword_t *)(_vbase + reg)) = val >>> >> (reg = 0x0, val = 0x77777777) >>> > >>> > Could you check whether it page-faults permanently? (Enable page-fault >>> > logging in jdb: P*, let it go, then check trace-buffer via shift-T.) >>> > Also try using l4_mem_write as it could be that writing from userspace >>> > does not work. >>> >>> Yes, It's page-faults permanently. In tracebuffer I see: >>> >>> pf: 0044 pfa=00003000 ip=01000294 (Wp) spc=0xf12e4690 79598 >>> pf: 0044 pfa=00003000 ip=01000294 (Wp) spc=0xf12e4690 79597 >>> pf: 0044 pfa=00003000 ip=01000294 (Wp) spc=0xf12e4690 79596 >>> >>> why it happening? >> >> Device may only be written/read from secure privileged mode, this is one >> of them (I think). Please try writing/reading via l4_mem_write and >> l4_mem_read. >> >> >> >> Adam >> -- >> Adam adam(a)os.inf.tu-dresden.de >> Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > I tried use l4_mem_write for write 0x77777777, it looks ok. But, when > I tried l4_mem_read for read from same register it returns 0x0. > But similar code injected to bootstrap startup function works fine. I tried use l4_mem_write for write 0x77777777, it looks ok. But, when I tried l4_mem_read for read from same register it returns 0x0. But similar code injected to bootstrap startup function works fine.

2 1

problem booting L4Linux
by Death Jester 24 Sep '12

24 Sep '12

Hello Everybody, does anybody know what the following message means: ------------------------------------------------------------- Welcome to Fiasco.OC (arm)! L4/Fiasco.OC arm microkernel (C) 1998-2012 TU Dresden Rev: r40 compiled with gcc 4.4.5 for Marvell Kirkwood [] Build: #1 Thu Sep 20 09:59:27 UTC 2012 Calibrating timer loop... done. SIGMA0: Hello! KIP @ 2000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:0;fff] [0:59000;8ffff] [0:97000;97fff] [0:9f000;13ffff] [4:140000;174fff] [0:175000;177fff] [4:178000;18efff] [0:18f000;100efff] [4:100f000;100ffff] [0:1010000;10fffff] [4:1100000;1528fff] [0:1529000;effffff] IOMEM:---------------------- [0:10000000;ffffffff] MOE: Hello world MOE: found 240780 KByte free memory MOE: found RAM from 59000 to f000000 MOE: allocated 239 KByte for the page array @0x9f000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [14b4000-14cd448] [C:503000] l4re BOOTFS: [14ce000-1528bc8] [C:504000] ned BOOTFS: [1100000-1100189] [C:505000] l4lx.cfg BOOTFS: [1101000-11eb1ac] [C:506000] io BOOTFS: [11ec000-11ec0bd] [C:507000] arm-rv.io BOOTFS: [11ed000-14ae474] [C:508000] vmlinuz.arm BOOTFS: [14af000-14b3a86] [C:509000] ramdisk-arm.rd MOE: cmdline: moe rom/l4lx.cfg MOE: Starting: rom/ned rom/l4lx.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/l4lx.cfg' Ned: ERROR: cannot read rom/l4lx.cfg: Invalid argument ------------------------------------------------------------------ My 'l4lx.cfg' file is the default file from the l4/conf/examples folder. I haven't changed anything. And my 'modules.list' looks like this: -------------------------- modaddr 0x01100000 entry L4Linux_ARM kernel fiasco -serial_esc roottask moe rom/l4lx.cfg module l4re module ned module l4lx.cfg module io module arm-rv.io module vmlinuz.arm module ramdisk-arm.rd --------------------------- I'm using the latest L4re, Fiasco and L4Linux checked out from the SVN today and I'm running a Kirkwood based device. Any help is appreciated! Cheers, Jester

2 1

Fiasco.oc & trustzone
by Nikolay Golikov 20 Sep '12

20 Sep '12

Hello. I trying to use trustzone on i.mx53 with fiasco.oc Vm. I want run fiasco.oc in secure world, and run another fiasco.oc in normal world. But I can't find any example about use Vm kernel objects in fiasco.oc. May be someone did something like this?

2 7

Board-specific devices in L4Linux
by Dmitry Shubin 20 Sep '12

20 Sep '12

Hi. I would like to bring up the issue that has been highlighted in [1] and [2] quite some time ago. Has any progress been made since then? Adam, even if you ended up not making those changes, don't you mind sharing your thoughts/ideas on the matter? [1] http://os.inf.tu-dresden.de/pipermail/l4-hackers/2011/004831.html [2] http://os.inf.tu-dresden.de/pipermail/l4-hackers/2011/005074.html

2 1

omap4.dev config file for PandaBoard
by sebastian.eckl＠mytum.de 19 Sep '12

19 Sep '12

Hi, I own a PandaBoard with OMAP 4430 processor and have unavailingly tried to build L4Android for it. As basis I take the latest l4re_snapshot 2012081219. L4Re and Fiasco kernel itself are running, the provided Hello World example shows no problems. I already realized that I'll need a correct .dev config file specific to my platform, when creating the .uimage file for U-Boot. Unfortunately, an omap4.dev or panda.dev configuration file does not exist at the moment. So, I'd like to ask, if someone already adapted a .dev file to the PandaBoard and can provide me with some information or even may share his configuration with me or the public. Thank you very much in advance for your help. Sebastian

1 0

a question about L4_MAP_ITEM_GRANT
by Chen Tian 13 Sep '12

13 Sep '12

Hello, I have a simple question. If a parent maps a page into a child's space with this flag, can the parent regain this page and remove this mapping later? I did a simple test. It seems that with this flag in l4_task_map, the child owns the mapped page permanently. What I'd like to do is when a child finishes its job and returns such a granted page to its parent, the parent can reuse this page for some other child. Thanks.

2 1

Startup help for L4Linux
by Andrej S 12 Sep '12

12 Sep '12

Hi Adam, I have build some packages on my self on-top of bare fiasco, but however I didn't get l4linux to run. I got snapshot, I configure it, like readmy says me, with 'make setup' with all default settings and paths. Then I build it with 'make'. What should be my next steps to run l4linux? 2012/7/2 Adam Lackorzynski <adam(a)os.inf.tu-dresden.de>: > > On Sun Jul 01, 2012 at 08:57:41 -0500, Andrej S wrote: >> thanks for answer. >> I explored sources given with snapshot little bit and now I'm able to >> compile and run fiasco-ux. >> >> But not all is perfect: >> 1. I copied fiasco-ux with irq0, moe, ned and sigma0 together, but >> if I try to run hello-example it quits with >> FATAL exception in MOE: >> Exception: No such object found: rom/l4re: backtrace ... > > Go to the l4-obj directory where L4Re was built to and issue: > make ux E=hello > > You'll probably need to setup the path to the Fiasco UX build in > l4/conf/Makeconf.boot > >> 2. I have no idea, which package and why should I give to fiasco-ux to >> run l4linux. > > make ux E=L4Linux-mag-x86 > > or similar. The key here is the l4/conf/modules.list file which contains > which files are taken for which boot entry etc. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers

2 1

Mapping physical mem region
by Nikolay Golikov 12 Sep '12

12 Sep '12

Hi, l4-hackers! How I can map some physical memory region to task address space? I tried to use l4sigma0_map_mem, but it return me "No fpage received" error. I tried different region szes from 256M to 4K. PS I try to do it on i.mx53 TZ-VMM | Hello from tz-vmm! TZ-VMM | Nonsecure Ram mapping failed (No fpage received)! TZ-VMM | Addr: 0x80000000 Size: 0x1000 (4K) SIGMA0: Memory usage: a total of 4096 byte are in the memory pool allocated 10 of 203 objects this are 200 of 4060 byte SIGMA0: Dump of all resource maps RAM:------------------------ [4:70000000;70000fff] [4:70061000;7008ffff] [4:70097000;70097fff] [4:7009f000;8effffff] IOMEM:---------------------- [0:0;53efffff] [10:53f00000;53f03fff] [0:53f04000;63f9bfff] [10:63f9c000;63f9ffff] [0:63fa0000;6fffffff] [0:90000000;ffffffff]

2 1

Fiasco.OC (rev. 40) Pandaboard support
by Stefan Kalkowski 07 Sep '12

07 Sep '12

Hi L4-hackers, recently I've tried to adapt Genode's Fiasco.OC-platform support to use the latest Fiasco.OC/L4Re subversion revision. When trying it on x86 I didn't run into any trouble. It worked "out of the box". But when it came to ARM, I got problems to boot Fiasco.OC on the Pandaboard in general (also when using plain Fiasco.OC/L4Re). I've debugged the problem down to Cpu::init_errata_workarounds(). The problem is that pandaboard's boot code initializes TrustZone, and triggers a configuration-disable signal beforehand. That leads to 'undefined instruction' exceptions, whenever one tries to write into the p15/c15-c0-1 debug register (like it's done in init_errata_workarounds). The attached patch implements Cpu::init_errata_workarounds() empty for the pandaboard. Moreover, it restricts the appliance of ERRATA 743622 to CPU revisions: r2p0-r2p2. With the attached patch Fiasco.OC runs fine on the Pandaboard too. Best regards Stefan -- Stefan Kalkowski Genode Labs http://www.genode-labs.com/ · http://genode.org/ Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

2 2

l4linux filesystem under fiasco-ux
by Ryan Brown 27 Aug '12

27 Aug '12

So far I've been running l4linux in a virtual machine. I'd like to run it in fiasco.ux to compare performance. But if l4linux under ux has no access to hardware, how do I access the filesystem? Am I stuck with the initial ramdisk? Or is there some way to mount the host filesystem, or a part of it?

2 1

Announcement: Genode 12.08 improves NOVA and ARM support
by Christian Helmuth 23 Aug '12

23 Aug '12

Today Genode Labs released the 4th anniversary version of the Genode OS Framework. Most notable are the NOVA microhypervisor platform improvements for x86 64bit, object-integrity protection, and centralized kernel-resource allocation in core as well as comprehensive support for the OMAP4 SoC used in the PandaBoard. A quick overview of all changes that come with version 12.08: - Base platforms - New base-hw platform for running the framework on bare ARM hardware - NOVA support for x86_64, object integrity protection, core-only kernel-resource allocation - New OMAP4 SoC device drivers - HDMI output - SD-card - USB HID - Networking - New FFAT-based file-system service - New TAR file-system service - Improved Noux runtime - New port of the Lynx web browser - Shell scripting support - 3rd-party libraries - New ports of openssl, pcre, expat - MPC, libgmp for x86_64 and ARM - lwIP updated to version 1.4.1-rc1 - New port of the lighttpd web server More details are described in the release notes http://genode.org/documentation/release-notes/12.08 Have fun with our new release -- Christian Helmuth Genode Labs http://www.genode-labs.com/ · http://genode.org/ · /ˈdʒiː.nəʊd/ Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

1 0

Local APIC address and MSI address
by Chen Tian 22 Aug '12

22 Aug '12

Hi, According to Intel manual, local APIC address starts at FEE00000, which is overlapping with the MSI's address register. How does this actually work? Thanks.

2 1

i.mx53 and fiasco.oc
by Nikolay Golikov 22 Aug '12

22 Aug '12

Hello. I trying to run fiasco.oc + l4re on freescale i.mx53qsb. And have some problems to do this. I using i.mx51 platform configuration with some changes. I changed addresses in src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp: EXTENSION class Mem_layout { public: enum Virt_layout_imx53 { Timer_map_base = 0xef1ac000, Uart_map_base = 0xef1bc000, Watchdog_map_base = 0xef198000, Pic_map_base = 0xef200000, Uart_base = Uart_map_base, }; enum Phys_layout_imx53 { Device_phys_base_1 = 0x53f00000, Device_phys_base_2 = 0x0fffc000, Watchdog_phys_base = 0x53f98000, // wdog1 Timer_phys_base = 0x53fac000, // epit1 Uart_phys_base = 0x53fbc000, // uart1 Pic_phys_base = 0x0fffc000, }; }; And made some little changes in other source files. When I try to boot it, I see something like this: ## Booting kernel from Legacy Image at 70800000 ... Image Name: L4 Image #47 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 897192 Bytes = 876.2 kB Load Address: 71000000 Entry Point: 71000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... L4 Bootstrapper Build: #47 �В�т. �а�в�г. 21 16:49:21 MSK 2012, 4.5.1 Scanning up to 1024 MB RAM Memory size is 512MB (Limited by Scan) (70000000 - 90000000) RAM: 0000000070000000 - 000000008fffffff: 524288kB Total RAM: 512MB mod04: 710c1000-710da540: hello mod03: 710a7000-710c0458: l4re mod02: 7106d000-710a6624: moe mod01: 71063000-7106c370: sigma0 mod00: 71015000-71062cac: fiasco Moving 5 modules to 71100000 with offset eb000 moving module 05 { 710c1000-710da540 } -> { 711ac000-711c5540 } moving module 04 { 710a7000-710c0458 } -> { 71192000-711ab458 } moving module 03 { 7106d000-710a6624 } -> { 71158000-71191624 } moving module 02 { 71063000-7106c370 } -> { 7114e000-71157370 } moving module 01 { 71015000-71062cac } -> { 71100000-7114dcac } Scanning fiasco Scanning sigma0 Scanning moe --init=rom/hello Relocated mbi to [0x7100f000-0x7100f0d6] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x70002000 Regions of list regions [ 70001000, 700019bf] { 9c0} Kern fiasco [ 70002000, 7005cfff] { 5b000} Kern fiasco [ 70090000, 7009e17b] { e17c} Sigma0 sigma0 [ 70140000, 701717d3] { 317d4} Root moe [ 70178000, 7018eec7] { 16ec8} Root moe [ 71000000, 710143ef] { 143f0} Boot bootstrap [ 7100f000, 7100f1d3] { 1d4} Root Multiboot info [ 71192000, 711c553f] { 33540} Root Modules Memory API Version: (87) experimental Sigma0 config ip:700900e0 sp:71013044 Roottask config ip:70140178 sp:00000000 Starting kernel fiasco at 70001000 Hello from Startup::stage2 Initialize page table It stops on line 151 src/kern/arm/gic.cpp: Io::write<Mword>(0, _dist_base + DIST_CTRL); where _dist_base is Pic_map_base. If I understand correctly tzic on i.mx53 and tzic on i.mx51 is equivalent. And second question: I do not understand for what purpose make pysical devices and sdram mapping in: src/kern/arm/bootstrap.cpp? // map sdram linear from 0xf0000000 for (va = Mem_layout::Map_base, pa = Mem_layout::Sdram_phys_base; va < Mem_layout::Map_base + (4 << 20); va += 0x100000, pa += 0x100000) map_1mb(page_dir, va, pa, true, false); // map sdram 1:1 for (va = Mem_layout::Sdram_phys_base; va < Mem_layout::Sdram_phys_base + (4 << 20); va += 0x100000) map_1mb(page_dir, va, va, true, true); map_hw(page_dir); And why afterwards devises on physical addresses are out of order?

2 1

Local APIC cannot deliver MSI to CPU (Fiasco.OC) ?
by Chen Tian 22 Aug '12

22 Aug '12

I am trying to use MSI for my network card. After setting the MSI slot in the PCI configuration block based on Intel manual, I can confirm the interrupt is delivered to the processor's local APIC by looking at the IRR content in kernel debugger. The bit in IRR that reflects the vector I specified in MSI message is set to 1 by APIC. However, the interrupt handler installed at that vector is never invoked. Does someone have any idea on this? The priority does not seem to be the issue, because I checked the TPR, which was 0x80 when I entered kernel debugger and decreased to 0 when I press 'g'. The error status register is also zero in the kernel debugging mode, while there is a pending interrupt request as suggested by IRR. But the cpu just can't get the interrupt. Any suggestions? Thanks.

1 0

Issues in l4re-snapshot-2012081219 for ARM
by Ivan Loskutov 18 Aug '12

18 Aug '12

Hello, I tried new l4re-snapshot-2012081219 and found the following issues for ARM target: 1. File bin/setup.d/04-setup has error in BeagleBoard and Pandaboard L4Re configs generation. Patch attached. 2. I get errors at startup on Pandaboard KERNEL-369098737: alignment error at da067a03 (PC: f001e0ec, SP: 6e72654b, FSR: 400001, PSR: 600001d3) KERNEL-369098737: alignment error at da067a03 (PC: f001e0ec, SP: ea00000f, FSR: 400001, PSR: 600001d3) KERNEL-369098737: alignment error at da067a03 (PC: f001e0ec, SP: ea00000f, FSR: 400001, PSR: 600001d3) KERNEL-369098737: alignment error at da067a03 (PC: f001e0ec, SP: ea00000f, FSR: 400001, PSR: 600001d3) I found that the error is caused by a init_errata_workarounds() call in Cpu ::init (src/kernel/fiasco/src/kern/arm/cpu-arm.cpp). If I comment this call, then kernel started and hello example worked. Error is occurred when called set_c15_c0_1() function. I have not solved this issue yet. -- Ivan Loskutov

2 1

dma memory mapping
by Chen Tian 18 Aug '12

18 Aug '12

I'd like to allocate some physical memory for a device's DMA. Do I need to use some special flags in l4_task_map? Thanks.

2 1

input signal
by gaober 17 Aug '12

17 Aug '12

hi >Why do you need the IRQ in L4Linux then? Who is driving the touchscreen? That >instance should handle the TS IRQ as well. in mag, the tsc-omap3.c gets the coordinate like this mag | l4evdev.c Ev[22]. D: OMAP_TSC/input0, T : 3, C : 0 , V: 1085 mag | l4evdev.c Ev[23]. D: OMAP_TSC/input0, T : 3, C : 1 , V: 701 I want to make the l4linux and android kown the coordinate. now i cat /proc/interrupts it shows 210: 32 l4 l4-uart 211: 0 l4 l4fbev Err: 0 when i touch the omap3530 screen , the l4fbev still shows 0. i think i didn't get the l4fbev interruput.then how can i get it? in l4fb.c, there is the function irqerurn_t event_interrupt(), but in my board it didn't perform.maybe it is the reson? thanks very much! _______________________________________________ l4android-dev mailing list l4android-dev(a)lists.l4android.org http://lists.l4android.org/mailman/listinfo/l4android-dev

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Call for Papers: System Software Verification Conference (SSV 2012)
by Toby Murray 17 Aug '12

17 Aug '12

[Note: Submission Deadline is 19 September 2012] 7th Systems Software Verification Conference (SSV 2012) November 28--30, 2012 Sydney, Australia http://www.ssv-conference.org/ *Scope Industrial-strength software analysis and verification has advanced in recent years through the introduction of model checking, automated and interactive theorem proving, and static analysis techniques, as well as correctness by design, correctness by contract, and model-driven development. However, many techniques are working under restrictive assumptions that are invalidated by complex embedded systems software such as operating system kernels, low-level device drivers, or microcontroller code. The aim of this workshop is to bring together researchers and developers from both academia and industry who are facing real software and real problems with the goal of finding real, applicable solutions. By “real” we mean problems such as time-to-market or reliability that the industry is facing. A real solution is one that is applicable to the problem in industry and not one that only applies to an abstract, academic, toy version of it. In this workshop we will discuss software analysis and development techniques and tools; this forum will serve as a platform to discuss open problems and future challenges in dealing with existing and upcoming systems-level code. Topics include, but are not restricted to: • Model checking • Automated and interactive theorem proving • Static analysis • Automated testing • Model-driven development • Embedded systems development • Programming languages • Verifying compilers • Software certification • Software tools • Experience reports *Submissions Submissions must be made electronically through the EasyChair system (https://www.easychair.org/conferences/?conf=ssv2012) until September 19th, 2012. Papers should be up to 15 pages in pdf format and formatted in EPTCS style. Additional details may be included in a clearly marked appendix, which will be read at the discretion of the program committee. All will be subject to peer review under normal conference standards. Experience reports and papers on work in progress are welcome as long as there is a clear contribution. Submissions which are based or discuss a non-trivial piece of software are required to make all those non-standard software parts available, which a referee may need, in order to check the claims of the submission. Submitted papers must not have previously appeared in a journal or conference with published proceedings and must not be concurrently submitted to any other peer-reviewed workshop, symposium, conference or archival journal. Any partial overlap with any such published or concurrently submitted paper must be clearly indicated. *Publication The proceedings will be published with EPTCS (http://eptcs.org). *Important Dates Abstract Submission: September 14, 2012 Paper Submission: September 19, 2012 Notification: October 19, 2012 Conference: November 28–30, 2012 *Location The workshop will be held in Sydney, Australia at NICTA NRL Laboratory. *Organization Organizing Committee and PC Chairs • F. Cassez, NICTA, Sydney, Australia • R. Huuck, NICTA and UNSW, Sydney, Australia • G. Klein, NICTA and UNSW, Sydney, Australia • B. Schlich, ABB Corporate Research, Ladenburg, Germany Program Committee • Cyrille Artho, AIST, RISEC, Japan • Stefan Berghofer, Secunet, Germany • Frédéric Boniol, ONERA, France • Alessandro Coglio, Kestrel, USA • Joe Hurd, Intel, USA • Stefan Kowalewski, RWTH Aachen University, Germany • Thomas Kropf, Robert Bosch GmbH & U. of Tübingen, Germany • Kim G. Larsen, CISS, Aalborg University, Denmark • Toby Murray, NICTA, Sydney, Australia • Jan Peleska, Verified Systems International GmbH and University of Bremen, Germany • John Regehr, University of Utah, USA • Natarajan Shankar, SRI, USA • Zhong Shao, Yale, USA • Konrad Slind, Rockwell Collins, USA • Jun Sun, National University of Singapore, Singapore The information in this e-mail may be confidential and subject to legal professional privilege and/or copyright. National ICT Australia Limited accepts no liability for any damage caused by this email or its attachments.

1 0

L4Re/Fiasco IO memory map.
by Daniel Waddington 15 Aug '12

15 Aug '12

Hi, I have a SATA controller card. When I try to map in the IO memory from the PCI BAR regs an NMI is generated - and the mapping doesn't seemed to have worked (fully?). What might generate this NMI? The same platform/device works fine in Linux. Thanks Daniel

2 2

Fiasco-for ppc32
by Vishal Gupta 15 Aug '12

15 Aug '12

Hello!! I am using fiasco-2012081219 and i want to make fiasco image file for ppc32-[p2041]. but i read Makefiles there is one makeconf.ppc32 but i am not able to make buildir for ppc32. please send me some options. Thanks & Regards, vishal linux

2 1

NUL_problem
by oleg 15 Aug '12

15 Aug '12

2 1

Re: NUL_problem
by oleg 14 Aug '12

14 Aug '12

1 0

NUL_problem
by oleg 14 Aug '12

14 Aug '12

2 1

Problem Booting x86_64 kernel in qemu
by Markus Pfeiffer 12 Aug '12

12 Aug '12

Dear all, I tried building the Fiasco kernel (x86_64, from svn) together with the hello demo inside a qemu as it is shown on the website under "Getting started". Unfortunately the kernel traps while booting (Unexpected trap while booting Fiasco). The trap number seems to be invalid (-8029759185026510704). Any pointers towards where to look for a fix? Cheers Markus -- Markus Pfeiffer, University of St Andrews email: markus.pfeiffer(a)morphism.de | xmpp: markus.pfeiffer(a)jabber.morphism.de

3 5

Questions about Shared Memory Area and IRQ
by ZhangEditing 10 Aug '12

10 Aug '12

Hello. I have been trying to use the shared memory library and have learnt that it uses signals to notify parties that participate in communication. When I looked into the library code, I found that it implements signals with IRQs. However, I could not figure out which IRQ the library use. I have noticed that l4shmc_add_signal creates an IRQ object, but no IRQ number is used. The only thing that appear like an IRQ number is the second argument of l4_irq_attach, which is called by l4shmc_attach_signal_to. But I haven't found any clue about the meaning of the argument. Would you please tell me what the second argument of l4_irq_attach is? I have also noticed that l4shmc_add_signal registered an IRQ object to the namespace of the shared memory area. Does this mean that the IRQs used to implement signals are guaranteed not to conflict with any IRQ used by the hardware or any other software IRQ, regardless of the ORDER in which they are created? Thank you in advance!

2 1

i.MX53QSB port + IOmem access
by Andy Wagner 08 Aug '12

08 Aug '12

PT checks are probably adequate <those should not be modifiable from usr> but any user-context that can map the pages gets access. IO and the io configuration enforce resource assignment policy here and granularity is adequately fine to segregate resources via .cfg file entries. Agreed that trapping slows down IO process but could make porting more transparent. Tradeoff is the amount of work required to manage within the BSP and have that correspond to IO <or wherever the handler would be most suitable>. There is work in either case and it is probably more easily achieved by having the bits cleared at boot or init and minimizing changes required to linux. TZ would be still more entertaining to support. thanks, Andy On Tue Aug 07, 2012 at 13:41:56 -0700, Andy Wagner wrote: > Clearing sp for opacr21 allows the access to complete without fault. > It would be very nice if the sp could remain enabled and have the > fault handler trap to supervisor so that hardware enforcement can > be leveraged as well as software resource allocation check. > > Since mprot and opacr assignments are SoC specific this > would have to be implemented as part of the BSP framework perhaps > over complicating the issue. Preference is to keep things simple > and probably leave in the underlying linux, where the drivers > are located <executing code localization>, without making fiasco > or l4 more aware of the hardware than necessary. Instruction > emulation could be a bit messy due to differing memory maps > between faulting and exception handling contexts. Well, the hardware enforcement used is the page table which makes sure that a client can only access those devices it is given access to. Which benefit does a user/supervisor access check add here? Trapping any access to io memory would also slow down access to devices, plus someone would need to check if the access is valid, which would not be the kernel. Adam -- Adam adam at os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/

2 1

i.MX53QSB port + IOmem access
by Andy Wagner 07 Aug '12

07 Aug '12

Clearing sp for opacr21 allows the access to complete without fault. It would be very nice if the sp could remain enabled and have the fault handler trap to supervisor so that hardware enforcement can be leveraged as well as software resource allocation check. Since mprot and opacr assignments are SoC specific this would have to be implemented as part of the BSP framework perhaps over complicating the issue. Preference is to keep things simple and probably leave in the underlying linux, where the drivers are located <executing code localization>, without making fiasco or l4 more aware of the hardware than necessary. Instruction emulation could be a bit messy due to differing memory maps between faulting and exception handling contexts. Most simply, the sp bits can be cleared by a call into the bsp and leave the boot loader alone. Many thanks for your help and insight. Work now proceeds to migrate the drivers. thanks & best regards, Andy >I'd guess that access from user-mode is the 'problem' here. Could you >check the setting of AIPSTZ_OPACR21 and possibly adapt accordingly? Adam -- Adam adam at os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/ Previous message: i.MX53QSB port + IOmem access Next message: Ethernet device Messages sorted by: [ date ] [ thread ] [ subject ] [ author ] More information about the l4-hackers mailing list

2 1

Re: Ethernet device
by Matthias Lange 07 Aug '12

07 Aug '12

On Mon, Aug 06, 2012 at 04:47:36PM -0700, Wajidali Whowe wrote: > I prepared another iso image including only l4linux and a small file system prepared by the buildroot (including busybox). > the .devs file was exactly the same as the one that I sent before and similarly the .vbus file. The following is the outputs during bootup until fb-drv takes the console: (moreover I wanted to show also dmesg outputs after boot and "lspci" or "mdev -s" outputs after mounting the /proc and /sys", however I could not copy them from qemu or virtual box as I could not activate serial console, please kindly find the screenshots in the respective order for the dmesg outputs" and sorry for the high load of debug outputs...) Have you tried the "-serial stdio" option? I cannot see anything PCI or e1000 related in the L4Linux log. Can you post the result of "grep PCI .config" and "grep E1000 .config" from your L4Linux config? Matthias. -- Dipl.-Inf. Matthias Lange <mlange(a)sec.t-labs.tu-berlin.de> Security in Telecommunications TU Berlin / Telekom Innovation Laboratories Ernst-Reuter-Platz 7, 10587 Berlin Phone: +49 - 30 - 8353 58 553 Mobile: +49 - 160 - 587 28 07 Web: http://www.t-labs.tu-berlin.de/sect

2 1

i.MX53QSB port + IOmem access
by Andy Wagner 06 Aug '12

06 Aug '12

Many thanks for your response. Yes, reading valid addresses from l4linux within the aips1 region hangs including CCM_CCR. The fiasco kernel does have read access; Aips1[0]: 77777777 Aips1[1]: 77777777 MXC_CCM_CCR: 000016ff Aips1[0] and Aips1[1] contain the mprot fields for the 16 bus masters reachable via Aips1. The values 0x77777777 for both fields are set by u-boot (reset value according to imx53RM 0x0700000/0x00000000). Additional information from the debugger <latter part of kc output>: Control Register: 00c5387d Auxiliary Control Register: 00000000 Coprocessor Access Control Reg: 00f00000 Secure Configuration Register: 00000000 Secure Debug Enable Register: 00000000 Non-Secure Access Control Reg: 00000000 Translation Table Base Reg 0: 7006c000 Translation Table Base Reg 1: 00000000 Translation Table Base Control Reg: 00000000 Domain Access Control Register: 00000001 Data Fault Status Register: 00001008 Instruction Fault Status Register: 00000007 Fault Address Register: 109d4000 Instruction Fault Address Register: a8008ddc Interesting to note that the FAR contains the VA for the read that hangs. I'm not sure where the instruction lies -- it would be great if we were able to get at kallsyms at runtime to obtain symbol <entry point/function id>. Data fault status register suggests "precise external abort" if I'm interpreting the bitmap correctly according to ARM RM. Are there any particular flags to the IO allocation request that should be used other than non-cacheable ? thanks, Andy On Fri Aug 03, 2012 at 19:22:24 -0700, Andy Wagner wrote: > We have a minimal fiasco/l4re/l4linux port running on Freescale i.MX53QSB. > Uart (console), tzic, epit and wdog appear to be working. > > We are now proceeding to port migrate some native drivers (eg., FEC) for QSB into > l4linux. > > We have run into an issue with access to IO regions: > - aips1 region is defined in IO map and virtual to physical mappings are handled via callback in mach_setup <similar to dmamem_cb>. > - virtual memory is apparently being assigned. > We have attempted IO with varying size map/requests down to 4k page. Results are similar > regardless of size of requested region. > > Attempt to read from IO region at assigned virtual location causes the kernel to hang. > Escaping to debugger <esc> and checking both virtual and physical address for IO area reveal same contents -- which suggests that the mapping exists. > > The question is why does the kernel hang ? > > Part of boot log below: > Calling predefined callback for device 'aips1'. > IO | new iomem region: p=53c00000 v=c00000 s=400000 (bmb=0x3650) > IO | map mem: p=53f00000 v=f00000 s=100000: done > aips1 mem phys at 53f00000 - 53ffffff > aips1 mem virt at 08500000 - 085fffff > Added static device 'aips2' with 1 resources. > Calling predefined callback for device 'dmamem'. > DMA mem phys at 703be000 - 70bbdfff > DMA mem virt at 10900000 - 110fffff > dmamem_cb: dma_alloc_coherent: va: 10900000 phys: 703be000 > init_l4: about to read(va): 085d4018 > > VA 85d4018/53fd4018 is CCM_CBCMR <a clock control register, several of > which need to be set up by initialisation code in order to bring up > devices such as FEC>. I supposed that reading any other register such as CCM_CCR also hangs? Does access to this area works from within the kernel? > We have confirmed that writes/read for dmamem virtual addresses appear > in physical equivalent. > > l4linux is configured as arm7; fiasco as cortex/a8. > > The entire aips1 region has been mapped by fiasco as well -- because > fiasco only maps 1M segments and requires access to aips1 <etc> in > order to have uart, clock, tzic. Does fiasco page create a conflict > for IO ? No, that's not a problem. > We also tried to map physical memory transparently to native imx53 > layout using create_mapping(). Access via mappings established this > way result in unresolved page faults. Drivers and IO maps will not > port without significant hassle unless we are able to specify > virt/phys mappings. > > Behaviour of the kernel suggests that page faults are not being handled. You mean the Linux original virtual addresses? Those are above 3G and thus this cannot work. So the figures would have to be changed anyway. create_mapping also will not create an L4 mapping. Specifying a virtual address will work with l4io_request_iomem_region(). Adam -- Adam adam at os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/

2 1

Ethernet device
by Wajidali Whowe 06 Aug '12

06 Aug '12

Dear all, I have been working on running different linux based OSs on top of L4. Is there any documentation or tutorial where I might find information on how to make platform devices available for the linux OS running on top of L4. For instance, I could not get ethernet devices detected by the OS. Best Regards

2 6

i.MX53QSB port + IOmem access
by Andy Wagner 05 Aug '12

05 Aug '12

We have a minimal fiasco/l4re/l4linux port running on Freescale i.MX53QSB. Uart (console), tzic, epit and wdog appear to be working. We are now proceeding to port migrate some native drivers (eg., FEC) for QSB into l4linux. We have run into an issue with access to IO regions: - aips1 region is defined in IO map and virtual to physical mappings are handled via callback in mach_setup <similar to dmamem_cb>. - virtual memory is apparently being assigned. We have attempted IO with varying size map/requests down to 4k page. Results are similar regardless of size of requested region. Attempt to read from IO region at assigned virtual location causes the kernel to hang. Escaping to debugger <esc> and checking both virtual and physical address for IO area reveal same contents -- which suggests that the mapping exists. The question is why does the kernel hang ? Part of boot log below: Calling predefined callback for device 'aips1'. IO | new iomem region: p=53c00000 v=c00000 s=400000 (bmb=0x3650) IO | map mem: p=53f00000 v=f00000 s=100000: done aips1 mem phys at 53f00000 - 53ffffff aips1 mem virt at 08500000 - 085fffff Added static device 'aips2' with 1 resources. Calling predefined callback for device 'dmamem'. DMA mem phys at 703be000 - 70bbdfff DMA mem virt at 10900000 - 110fffff dmamem_cb: dma_alloc_coherent: va: 10900000 phys: 703be000 init_l4: about to read(va): 085d4018 VA 85d4018/53fd4018 is CCM_CBCMR <a clock control register, several of which need to be set up by initialisation code in order to bring up devices such as FEC>. We have confirmed that writes/read for dmamem virtual addresses appear in physical equivalent. l4linux is configured as arm7; fiasco as cortex/a8. The entire aips1 region has been mapped by fiasco as well -- because fiasco only maps 1M segments and requires access to aips1 <etc> in order to have uart, clock, tzic. Does fiasco page create a conflict for IO ? We also tried to map physical memory transparently to native imx53 layout using create_mapping(). Access via mappings established this way result in unresolved page faults. Drivers and IO maps will not port without significant hassle unless we are able to specify virt/phys mappings. Behaviour of the kernel suggests that page faults are not being handled. Any help is appreciated. thanks in advance, Andy

2 1

Re: l4-hackers Digest, Vol 112, Issue 3
by raylei0825ssdut 03 Aug '12

03 Aug '12

I just remove the statement "msr cpsr_c,r7". But It just doesn't Work. And If I change the code to the following: I set the vcpu_state_t registers as following : vcpu->r()->r[6]=(l4_umword_t)exit_map_addr; vcpu->r()->r[4]=(l4_umword_t)(idle_stack+sizeof(idle_stack)-1); vcpu->r()->ip =(l4_umword_t)super_code_map_addr; vcpu->r()->r[5] = (l4_umword_t)idle_code_map_addr; vcpu->r()->sp = (l4_umword_t)0x30000; and I change the my_super_code : asm ( ".pushsection .text\n" ".p2align 12 \t\n" ".global my_super_code \t\n" "my_super_code: \t\n" " swi 0 \t\n" " mov sp, r4 \t\n"" mov lr, r6 \t\n"" mov pc, r5 \t\n"".popsection"); and still, it doesn't work.And The vcpu upcall function will be called again and again. 2012-08-03 raylei0825ssdut 发件人：l4-hackers-request 发送时间：2012-08-03 18:00 主题：l4-hackers Digest, Vol 112, Issue 3 收件人："l4-hackers"<l4-hackers(a)os.inf.tu-dresden.de> 抄送： Send l4-hackers mailing list submissions to l4-hackers(a)os.inf.tu-dresden.de To subscribe or unsubscribe via the World Wide Web, visit http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers or, via email, send a message with subject or body 'help' to l4-hackers-request(a)os.inf.tu-dresden.de You can reach the person managing the list at l4-hackers-owner(a)os.inf.tu-dresden.de When replying, please edit your Subject line so it is more specific than "Re: Contents of l4-hackers digest..." Today's Topics: 1. Re: vcpu example problem (Adam Lackorzynski) ---------------------------------------------------------------------- Message: 1 Date: Thu, 2 Aug 2012 22:14:21 +0200 From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> To: l4-hackers(a)os.inf.tu-dresden.de Subject: Re: vcpu example problem Message-ID: <20120802201421.GA7129(a)os.inf.tu-dresden.de> Content-Type: text/plain; charset=iso-8859-1 Hi, On Thu Aug 02, 2012 at 11:14:34 +0800, ?????? wrote: > Hi, > I am trying to modify the vcpu example of l4re-snapshot to > switch registers to execute my C function.But It doesn't work. > I have read some papers about l4linux tranplantion.and follow it . > To switch the process, I fill the vcpu_state_t structure with > its registers.and call vcpu_resume_commit action.Then Jump to the ASM > Code. > But problem arises when I want to jump from asm code to C > function. What's the Problem? The Code is as following: > #define SVC_MODE 0x00000013 > #define USR_MODE 0x00000010 > > asm volatile > ( > ".pushsection .text\n" > ".p2align 12 \t\n" > ".global my_super_code \t\n" > "my_super_code: \t\n" > " msr cpsr_c, r7\t\n" > " mov lr, r6 \t\n" > " mov pc, r5 \t\n" > //" b my_super_code \t\n" > ".popsection" > ); I think the problem is not the jump but the msr, which you cannot do in user-land and which you probably can safely remove. Adam -- Adam adam(a)os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/ ------------------------------ _______________________________________________ l4-hackers mailing list l4-hackers(a)os.inf.tu-dresden.de http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers End of l4-hackers Digest, Vol 112, Issue 3 ******************************************

2 1

vcpu example problem
by 雷雷健 02 Aug '12

02 Aug '12

Hi, I am trying to modify the vcpu example of l4re-snapshot to switch registers to execute my C function.But It doesn't work. I have read some papers about l4linux tranplantion.and follow it . To switch the process, I fill the vcpu_state_t structure with its registers.and call vcpu_resume_commit action.Then Jump to the ASM Code. But problem arises when I want to jump from asm code to C function. What's the Problem? The Code is as following: /* * (c) 2009 Technische Universität Dresden * This file is part of TUD:OS, which is distributed under the terms of the * GNU General Public License 2. Please see the COPYING file for details. */ #include <l4/sys/ipc.h> #include <l4/sys/thread> #include <l4/sys/factory> #include <l4/sys/scheduler> #include <l4/sys/utcb.h> #include <l4/sys/kdebug.h> #include <l4/util/util.h> #include <l4/re/env> #include <l4/re/util/cap_alloc> #include <l4/re/util/kumem_alloc> #include <l4/sys/debugger.h> #include <l4/vcpu/vcpu> #include <l4/cxx/iostream> #include <l4/re/error_helper> #include <l4/sys/task> #include <l4/sys/irq> #include <l4/sys/vcpu.h> #include <cstdlib> #include <cstdio> #include <cstring> #define PSR_T_BIT 0x00000000 #define SVC_MODE 0x00000013 #define PSR_E_BIT 0x00000200 #define PSR_I_BIT 0x00000000 #define USR_MODE 0x00000010 using L4Re::chksys; using L4Re::chkcap; static L4::Cap<L4::Irq> irq; static char thread_stack[8 << 10]; static char hdl_stack[8 << 10]; static char idle_stack[8<<10]; static L4::Cap<L4::Task> vcpu_task; static L4vcpu::Vcpu *vcpu; const l4_addr_t super_code_map_addr = 0x10000; const l4_addr_t idle_code_map_addr = 0x20000; const l4_addr_t stack_map_addr = 0x12000; const l4_addr_t exit_map_addr=0x13000; extern char my_super_code[]; extern char my_super_code_excp[]; extern char my_super_code_excp_after[]; extern char exit_code[]; void idle_code(void) { ; while(1) { __asm__ volatile("swi 0"); l4_sleep(500); } } asm( ".global exit_code \t\n" "exit_code: \t\n" "b exit_code \t\n" ); asm volatile ( ".pushsection .text\n" ".p2align 12 \t\n" ".global my_super_code \t\n" "my_super_code: \t\n" " msr cpsr_c, r7\t\n" " mov lr, r6 \t\n" " mov pc, r5 \t\n" //" b my_super_code \t\n" ".popsection" ); static void setup_user_state_arch(L4vcpu::Vcpu *) { } static void handler_prolog() {} static void handler(void) { handler_prolog(); vcpu->state()->clear(L4_VCPU_F_EXCEPTIONS); printf("hello handler\n"); //vcpu->print_state(); // very simple page-fault handling // we're just replying with the only page we have, without checking any // values if (vcpu->is_page_fault_entry()) { printf("page fault\n"); vcpu_task->map(L4Re::This_task, l4_fpage((l4_addr_t)my_super_code, L4_PAGESHIFT, L4_FPAGE_RWX), super_code_map_addr); vcpu_task->map(L4Re::This_task, l4_fpage((l4_addr_t)idle_code, L4_PAGESHIFT, L4_FPAGE_RWX), idle_code_map_addr); vcpu_task->map(L4Re::This_task, l4_fpage((l4_addr_t)exit_code, L4_PAGESHIFT, L4_FPAGE_RWX), exit_map_addr); vcpu->saved_state()->add(L4_VCPU_F_PAGE_FAULTS); } else if (vcpu->is_irq_entry()) { // We use the label 2000 for our IRQ if (vcpu->i()->label == 2000) printf("Our triggered IRQ\n"); else if (vcpu->i()->label == 0) // direct IPC message to vCPU without // going through an IPCgate, label is set to 0 printf("IPC: %lx\n", vcpu->i()->tag.label()); else printf("Unclassifiable message\n"); } else printf("unhandled exception\n"); printf("resume\n"); L4::Cap<L4::Thread> self; self->vcpu_resume_commit(self->vcpu_resume_start()); //vcpu->state()->set(0); while(1) ; } static void vcpu_thread(void) { printf("Hello vCPU\n"); l4_umword_t label; memset(hdl_stack, 0, sizeof(hdl_stack)); //memset(super_stack,0,sizeof(super_stack)); // memset(idle_stack,0,sizeof(idle_stack)); setup_user_state_arch(vcpu); l4_touch_rw(stack,sizeof(stack)); l4_touch_rw(idle_stack,sizeof(idle_stack)); vcpu->saved_state()->set(L4_VCPU_F_USER_MODE | L4_VCPU_F_EXCEPTIONS | L4_VCPU_F_PAGE_FAULTS | L4_VCPU_F_IRQ); vcpu->r()->flags=(l4_umword_t)SVC_MODE; vcpu->r()->r[7]=(l4_umword_t)SVC_MODE; vcpu->r()->r[0]=(l4_umword_t)0; vcpu->r()->r[4]=(l4_umword_t)(idle_stack+sizeof(idle_stack)-1); vcpu->r()->r[6]=(l4_umword_t)exit_map_addr; vcpu->r()->ip =(l4_umword_t)super_code_map_addr; vcpu->r()->r[5] = (l4_umword_t)idle_code_map_addr; vcpu->r()->sp = (l4_umword_t)0x30000; L4::Cap<L4::Thread> self; printf("IRET\n"); vcpu->task(vcpu_task); self->vcpu_resume_commit(self->vcpu_resume_start()); printf("IRET: failed!\n"); while(1); } int run(void) { l4_utcb_t *u = l4_utcb(); L4::Cap<L4::Thread> vcpu_cap; printf("vCPU example\n"); l4_debugger_set_object_name(l4re_env()->main_thread, "vcputest"); // new task vcpu_task = chkcap(L4Re::Util::cap_alloc.alloc<L4::Task>(), "Task cap alloc"); chksys(L4Re::Env::env()->factory()->create_task(vcpu_task, l4_fpage_invalid()), "create task"); l4_debugger_set_object_name(vcpu_task.cap(), "vcpu 'user' task"); /* new thread/vCPU */ vcpu_cap = chkcap(L4Re::Util::cap_alloc.alloc<L4::Thread>(), "vCPU cap alloc"); l4_touch_rw(thread_stack, sizeof(thread_stack)); //l4_touch_rw(hdl_stack,sizeof(hdl_stack)); chksys(L4Re::Env::env()->factory()->create_thread(vcpu_cap), "create thread"); l4_debugger_set_object_name(vcpu_cap.cap(), "vcpu thread"); // get an IRQ irq = chkcap(L4Re::Util::cap_alloc.alloc<L4::Irq>(), "Irq cap alloc"); chksys(L4Re::Env::env()->factory()->create_irq(irq), "irq"); l4_debugger_set_object_name(irq.cap(), "some irq"); // get memory for vCPU state l4_addr_t kumem; if (0) kumem = (l4_addr_t)l4re_env()->first_free_utcb; else { if (L4Re::Util::kumem_alloc(&kumem, 0)) exit(1); } l4_utcb_t *vcpu_utcb = (l4_utcb_t *)kumem; vcpu = L4vcpu::Vcpu::cast(kumem + L4_UTCB_OFFSET); vcpu->entry_sp((l4_umword_t)hdl_stack + sizeof(hdl_stack)); vcpu->entry_ip((l4_umword_t)handler); printf("VCPU: utcb = %p, vcpu = %p\n", vcpu_utcb, vcpu); // Create and start vCPU thread L4::Thread::Attr attr; attr.pager(L4::cap_reinterpret_cast<L4::Thread>(L4Re::Env::env()->rm())); attr.exc_handler(L4Re::Env::env()->main_thread()); attr.bind(vcpu_utcb, L4Re::This_task); chksys(vcpu_cap->control(attr), "control"); chksys(vcpu_cap->vcpu_control((l4_addr_t)vcpu), "enable VCPU"); chksys(vcpu_cap->ex_regs((l4_umword_t)vcpu_thread, (l4_umword_t)thread_stack + sizeof(thread_stack), 0)); chksys(L4Re::Env::env()->scheduler()->run_thread(vcpu_cap, l4_sched_param(2))); // Attach irq to our vCPU thread chksys(irq->attach(2000, vcpu_cap)); // Send some IPCs to the vCPU l4_sleep(10); while (1) { // printf("triger irq\n"); // irq->trigger(); l4_sleep(500); } l4_sleep_forever(); return 0; } int main() { try { return run(); } catch (L4::Runtime_error &e) { L4::cerr << "FATAL uncought exception: " << e << "\nterminating...\n"; } catch (...) { L4::cerr << "FATAL uncought exception of unknown type\n" << "terminating...\n"; } return 1; }

2 1

Re: l4 build problem on Intel Atom 330
by Anand Mayuresh Vivekanad 01 Aug '12

01 Aug '12

Hi, I have tried what you suggested(disable PERF Events) and now I can successfully run l4linux on Intel Atom board. But when I am compiling l4linux with Intel Graphics Card enabled I am getting this error: GEN /home/mayuresh/L4/build/x86-201205290429-l4linux/Makefile scripts/kconfig/mconf Kconfig *** End of the configuration. *** Execute 'make' to start the build or try 'make help'. GEN /home/mayuresh/L4/build/x86-201205290429-l4linux/Makefile scripts/kconfig/conf --silentoldconfig Kconfig GEN /home/mayuresh/L4/build/x86-201205290429-l4linux/Makefile CHK include/linux/version.h Using /home/mayuresh/L4/src/l4linux as source for kernel CHK include/generated/utsrelease.h CALL /home/mayuresh/L4/src/l4linux/scripts/checksyscalls.sh CHK include/generated/compile.h VDSOSYM arch/l4/../x86/vdso/vdso32-int80-syms.lds VDSOSYM arch/l4/../x86/vdso/vdso32-sysenter-syms.lds VDSOSYM arch/l4/../x86/vdso/vdso32-syms.lds LD arch/l4/../x86/vdso/built-in.o LD arch/l4/built-in.o LD vmlinux.o MODPOST vmlinux.o WARNING: modpost: Found 1 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o LD .tmp_vmlinux1 drivers/built-in.o: In function `io_mapping_create_wc': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:60: undefined reference to `iomap_create_wc' drivers/built-in.o: In function `io_mapping_free': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:77: undefined reference to `iomap_free' /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:77: undefined reference to `iomap_free' drivers/built-in.o: In function `io_mapping_map_atomic_wc': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:92: undefined reference to `iomap_atomic_prot_pfn' drivers/built-in.o: In function `io_mapping_unmap_atomic': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:98: undefined reference to `iounmap_atomic' drivers/built-in.o: In function `io_mapping_map_atomic_wc': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:92: undefined reference to `iomap_atomic_prot_pfn' drivers/built-in.o: In function `io_mapping_unmap_atomic': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:98: undefined reference to `iounmap_atomic' /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:98: undefined reference to `iounmap_atomic' drivers/built-in.o: In function `io_mapping_map_atomic_wc': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:92: undefined reference to `iomap_atomic_prot_pfn' /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:92: undefined reference to `iomap_atomic_prot_pfn' drivers/built-in.o: In function `io_mapping_unmap_atomic': /home/mayuresh/L4/src/l4linux/include/linux/io-mapping.h:98: undefined reference to `iounmap_atomic' make[1]: *** [.tmp_vmlinux1] Error 1 make: *** [sub-make] Error 2 Anand Mayuresh Vivekanand

2 1

Get lost in Fiasco.OC regarding the io-apic IRQ number and CPU interrupt numbers
by Chen Tian 31 Jul '12

31 Jul '12

Hello, As confirmed by Udo, I thought the vector of an IO-APIC pin is the one used to index idt, which is from 0x20-0x37. But I just checked the idt using kernel debugger and found that many entries between 0x20 and 0x37 are marked as reserved. Several defined ones can be found in entry.S. However, I noticed that 48 entries from 0x50 to 0x7f are actually defined. Are those for the 48 pins in my two IO-APICs? Why have the vectors changed? And where can I found the corresponding CPU interrupt handlers? Another thing that confuses me is that th function "irq_interrupt" in file "dirq-ia32-ux.cpp". Where does it get called? I found one call site in entry.S, which seems to use an interrupt number (int - 0x20) as the first parameter. But why this number is used as a pointer that pointing to an irq object? I must have missed something. I would really appreciate it if someone can answer my questions. Thanks. Best, Chen

2 1

Questions about IO-APIC
by Chen Tian 28 Jul '12

28 Jul '12

Hello, I have some basic questions about IO-APIC. In the boot-up message, I can see this: IO-APIC[ 0]: pins 23 PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge) PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge) PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge) I understand this info is from IO-APIC redirection table. My question is what does vector means? Is that the interrupt number CPU is going to see when an interrupt request is sent from a pin? Or it's an irq number assigned to an IO-APIC pin? Thanks. Best, Chen

3 5

l4 build problem on Intel Atom 330
by Anand Mayuresh Vivekanad 26 Jul '12

26 Jul '12

Hello, I was trying to build L4,L4RE, L4Linux for the Intel atom board. I tried to build everything from the scratch. But I am not able to boot l4linux on intel atom. The same image if I am running on QEMU then it is working. I don't know what I am doing wrong. Pleas Help. The difference that I can see while running on QEMU and Intel Atom is: QEMU: CPU0: AMD QEMU Virtual CPU version 1.0 stepping 03 Performance Events: l4linux | WARNING: Unknown rdmsr: c0010000 at 0x6d529f l4linux | WARNING: Unknown rdmsr: c0010001 at 0x6d529f l4linux | WARNING: Unknown rdmsr: c0010002 at 0x6d529f l4linux | WARNING: Unknown rdmsr: c0010003 at 0x6d529f l4linux | WARNING: Unknown wrmsr: c0010004 at 0x6d531d l4linux | WARNING: Unknown rdmsr: c0010004 at 0x6d532f Broken PMU hardware detected, using software events only. Brought up 1 CPUs Total of 1 processors activated (2877.82 BogoMIPS). bio: create slab <bio-0> at 0 vgaarb: loaded SCSI subsystem initialized PCI: L4 root bridge is device 1b390 vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem,locks=none Intel Atom: CPU0: Intel(R) Atom(TM) CPU 330 @ 1.60GHz stepping 02 Performance Events: l4linux | WARNING: Unknown rdmsr: 00000345 at 0x6d4c3a no PEBS fmt3+, Atom events, l4linux | WARNING: Unknown rdmsr: 00000186 at 0x6d529f l4linux | WARNING: Unknown rdmsr: 00000187 at 0x6d529f l4linux | WARNING: Unknown rdmsr: 0000038d at 0x6d52d2 Broken BIOS detected, complain to your hardware vendor. [Firmware Bug]: the BIOS has corrupted hw-PMU resources (MSR 38d is b30006000000038d) Intel PMU driver. l4linux | Page fault (non-resolved): pfa=1e3342 pc=416170 l4linux | Page fault (non-resolved): pfa=1a8 pc=493e6b Die message: Trap: 14 Trap: 14: 0004 [#1] SMP Modules linked in: Below is the complete log file(Intel Atom): mayuresh@mayuresh:~/L4$ sudo picocom -b 115200 /dev/ttyUSB0 [sudo] password for mayuresh: picocom v1.4 port is : /dev/ttyUSB0 flowcontrol : none baudrate is : 115200 parity is : none databits are : 8 escape is : C-a noinit is : no noreset is : no nolock is : no send_cmd is : ascii_xfr -s -v -l10 receive_cmd is : rz -vv Terminal ready L4 Bootstrapper Build: #4 Tue Jul 24 20:56:27 CEST 2012, x86-32, 4.6.3 RAM: 0000000000000000 - 000000000008efff: 572kB RAM: 0000000000100000 - 000000007f5c7fff: 2085664kB RAM: 000000007f5d4000 - 000000007f65ffff: 560kB RAM: 000000007f6f0000 - 000000007f6f2fff: 12kB RAM: 000000007f6ff000 - 000000007f6fffff: 4kB Total RAM: 2037MB Moving 11 modules to 1100000 with offset ded000 moving module 11 { 1814000-19814000 } -> { 2601000-1a601000 } moving module 10 { 133a000-1813ea7 } -> { 2127000-2600ea7 } moving module 09 { 1339000-133931c } -> { 2126000-212631c } moving module 08 { 1338000-133848d } -> { 2125000-212548d } moving module 07 { 942000-1337e43 } -> { 172f000-2124e43 } moving module 06 { 941000-94139b } -> { 172e000-172e39b } moving module 05 { 711000-940c5f } -> { 14fe000-172dc5f } moving module 04 { 5ec000-710565 } -> { 13d9000-14fd565 } moving module 03 { 3ce000-5eb781 } -> { 11bb000-13d8781 } moving module 02 { 37a000-3cd525 } -> { 1167000-11ba525 } moving module 01 { 313000-3798e0 } -> { 1100000-11668e0 } Scanning /fiasco -serial_esc Scanning /sigma0 Scanning /moe rom/linux-x2-pci.cfg Bootloader MMAP: [ 0, 8f000) RAM (1) [ 8f000, a0000) reserved (2) [ e0000, 100000) reserved (2) [ 100000, 7f5c8000) RAM (1) [ 7f5c8000, 7f5d4000) reserved (2) [ 7f5d4000, 7f660000) RAM (1) [ 7f660000, 7f6f0000) ACPI NVS (4) [ 7f6f0000, 7f6f3000) RAM (1) [ 7f6f3000, 7f6ff000) ACPI (3) [ 7f6ff000, 7f700000) RAM (1) [ 7f700000, 7f800000) reserved (2) [ 7f800000, 80000000) reserved (2) [ f0000000, f0000000) reserved (2) [ f0000000, f8000000) reserved (2) [ f8000000, fff80000) reserved (2) [ fff80000, fffff000) reserved (2) [ fffff000, 100000000) reserved (2) Relocated mbi to [0x2dd000-0x2dd1a5] Loading /fiasco Loading /sigma0 Loading /moe find kernel info page... found kernel info page at 0x400000 Regions of list regions [ 0, fff] { 1000} Arch BIOS [ 8f000, 9ffff] { 11000} Arch BIOS [ e0000, fffff] { 20000} Arch BIOS [ 100000, 10b197] { b198} Sigma0 /sigma0 [ 140000, 18d23f] { 4d240} Root /moe [ 2d0000, 2e13e7] { 113e8} Boot bootstrap [ 2dd000, 2dd2a2] { 2a3} Root Multiboot info [ 300000, 38ffff] { 90000} Kern /fiasco [ 400000, 46bfff] { 6c000} Kern /fiasco [ 13d9000, 1a600fff] { 19228000} Root Modules Memory [ 7f5c8000, 7f5d3fff] { c000} Arch BIOS [ 7f660000, 7f6effff] { 90000} Arch BIOS [ 7f6f3000, 7f6fefff] { c000} Arch BIOS [ 7f700000, 7fffffff] { 900000} Arch BIOS [ f0000000, ffffffff] { 10000000} Arch BIOS API Version: (87) experimental Sigma0 config ip:001001dc sp:002dca50 Roottask config ip:001401c4 sp:00000000 Starting kernel /fiasco at 0030090c Welcome to Fiasco.OC (ia32)! L4/Fiasco.OC ia32 microkernel (C) 1998-2011 TU Dresden Rev: r38 compiled with gcc 4.6.3 for Intel Pentium Pro [] Build: #5 Wed Jul 25 15:54:44 CEST 2012 Performance-critical config option(s) detected: CONFIG_NDEBUG is off Superpages: yes Kmem:: cpu page at 7f3e2000 (4096Bytes) ACPI-Init ACPI: RSDP[0xfe020] r00 OEM:INTEL. ACPI: RSDT[0x202fd038] r01 OEM:INTEL. OEMTID:D945GLF2 ACPI: FACP[0x202fc000] r01 OEM:INTEL. OEMTID:D945GLF2 ACPI: APIC[0x202f6000] r01 OEM:INTEL. OEMTID:D945GLF2 ACPI: WDDT[0x202f5000] r01 OEM:INTEL. OEMTID:D945GLF2 ACPI: MCFG[0x202f4000] r01 OEM:INTEL. OEMTID:D945GLF2 ACPI: ASF.[0x202f3000] r20 OEM:INTEL. OEMTID:D945GLF2 IO-APIC: MADT = 0x202f6000 IO-APIC[ 0]: struct: 0x202f604c adr=fec00000 IO-APIC[ 0]: pins 24 PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge) PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge) PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge) PIN[ 3m]: vector=23, del=0, dm=physical, dest=0 (high, edge) PIN[ 4m]: vector=24, del=0, dm=physical, dest=0 (high, edge) PIN[ 5m]: vector=25, del=0, dm=physical, dest=0 (high, edge) PIN[ 6m]: vector=26, del=0, dm=physical, dest=0 (high, edge) PIN[ 7m]: vector=27, del=0, dm=physical, dest=0 (high, edge) PIN[ 8m]: vector=28, del=0, dm=physical, dest=0 (high, edge) PIN[ 9m]: vector=29, del=0, dm=physical, dest=0 (high, edge) PIN[10m]: vector=2a, del=0, dm=physical, dest=0 (high, edge) PIN[11m]: vector=2b, del=0, dm=physical, dest=0 (high, edge) PIN[12m]: vector=2c, del=0, dm=physical, dest=0 (high, edge) PIN[13m]: vector=2d, del=0, dm=physical, dest=0 (high, edge) PIN[14m]: vector=2e, del=0, dm=physical, dest=0 (high, edge) PIN[15m]: vector=2f, del=0, dm=physical, dest=0 (high, edge) PIN[16m]: vector=30, del=0, dm=physical, dest=0 (high, edge) PIN[17m]: vector=31, del=0, dm=physical, dest=0 (high, edge) PIN[18m]: vector=32, del=0, dm=physical, dest=0 (high, edge) PIN[19m]: vector=33, del=0, dm=physical, dest=0 (high, edge) PIN[20m]: vector=34, del=0, dm=physical, dest=0 (high, edge) PIN[21m]: vector=35, del=0, dm=physical, dest=0 (high, edge) PIN[22m]: vector=36, del=0, dm=physical, dest=0 (high, edge) PIN[23m]: vector=37, del=0, dm=physical, dest=0 (high, edge) IO-APIC: dual 8259: yes IO-APIC: ovr[ 0] 00 -> 2 IO-APIC: ovr[ 1] 09 -> 9 Allocate cpu_mem @ 0xfffe6000 Local APIC[00]: version=14 max_lvt=5 APIC ESR value before/after enabling: 00000000/00000000 Using the PIT (i8254) on IRQ 2 for scheduling SERIAL ESC: allocated IRQ 4 for serial uart SERIAL ESC: allocated IRQ 4 for serial uart Not using serial hack in slow timer handler. Absolute KIP Syscalls using: Sysenter CPU[0:0]: GenuineIntel (6:1C:2:0)[000106c2] Model: Intel(R) Atom(TM) CPU 330 @ 1.60GHz at 1596 MHz 32 Entry I TLB (4K pages) 80 Entry D TLB (4K pages) 8 Entry D TLB (4k or 4M pages) 32 KB L1 I Cache (8-way associative, 64 bytes per line) 24 KB L1 D Cache (6-way associative, 64 bytes per line) 512 KB L2 U Cache (16-way associative, 64 bytes per line) Freeing init code/data: 28672 bytes (7 pages) Calibrating timer loop... done. SIGMA0: Hello! KIP @ 400000 Found Fiasco: KIP syscalls: yes allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:1000;8efff] [0:10c000;13ffff] [4:140000;18dfff] [0:18e000;2dcfff] [4:2dd000;2ddfff] [0:2de000;3fffff] [0:465000;13d8fff] [4:13d9000;1a600fff] [0:1a601000;7b7fffff] [0:7f400000;7f5c7fff] [0:7f5d4000;7f65ffff] [0:7f6f0000;7f6f2fff] [0:7f6ff000;7f6fffff] IOMEM:---------------------- [0:0;fff] [0:8f000;fffff] [0:7f5c8000;7f5d3fff] [0:7f660000;7f6effff] [0:7f6f3000;7f6fefff] [0:7f700000;fedfffff] [0:fee01000;ffffffff] IO PORTS-------------------------- [0:0;fffffff] MOE: Hello world MOE: found 1612792 KByte free memory MOE: found RAM from 1000 to 7f700000 MOE: allocated 2038 KByte for the page array @0x465000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [13d9000-14fd565] [C:503000] l4re BOOTFS: [14fe000-172dc5f] [C:504000] ned BOOTFS: [172e000-172e39b] [C:505000] linux-x2-pci.cfg BOOTFS: [172f000-2124e43] [C:506000] io BOOTFS: [2125000-212548d] [C:507000] x86-legacy-min.devs BOOTFS: [2126000-212631c] [C:508000] l4lx-x86-x2-pci.io BOOTFS: [2127000-2600ea7] [C:509000] vmlinuz BOOTFS: [2601000-1a601000] [C:50a000] squeezesmall-x.img MOE: cmdline: /moe rom/linux-x2-pci.cfg MOE: Starting: rom/ned rom/linux-x2-pci.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/linux-x2-pci.cfg' io | Io service io | Verboseness level: 5 io | unused physical memory space: io | [00000080000000-000000efffffff] io | Hello from L4-ACPICA io | Find root Pointer io | new iomem region: p=0 v=400000 s=400000 (bmb=0x3658) io | map mem: p=0 v=400000 s=1000: done io | AcpiOsMapMemory(40e, 2) = 40040e io | map mem: p=9f000 v=49f000 s=1000: done io | AcpiOsMapMemory(9fc00, 400) = 49fc00 io | map mem: p=e0000 v=4e0000 s=20000: done io | AcpiOsMapMemory(e0000, 20000) = 4e0000 io | Find root Pointer: fe020 io | AcpiOsMapMemory(fe020, 24) = 4fe020 io | ACPI: RSDP 0xfe020 00014 (v00 INTEL ) io | new iomem region: p=7f400000 v=800000 s=400000 (bmb=0x3700) io | map mem: p=7f6fd000 v=afd000 s=1000: done io | AcpiOsMapMemory(7f6fd038, 24) = afd038 io | ACPI: RSDT 0x7f6fd038 00038 (v01 INTEL D945GLF2 000000E5 01000013) io | AcpiOsMapMemory(7f6fd038, 38) = afd038 io | map mem: p=7f6fc000 v=afc000 s=1000: done io | AcpiOsMapMemory(7f6fc000, 24) = afc000 io | ACPI: FACP 0x7f6fc000 00074 (v01 INTEL D945GLF2 000000E5 MSFT 01000013) io | AcpiOsMapMemory(7f6fc000, 74) = afc000 io | map mem: p=7f6f7000 v=af7000 s=1000: done io | AcpiOsMapMemory(7f6f7000, 24) = af7000 io | ACPI: DSDT 0x7f6f7000 045EC (v01 INTEL D945GLF2 000000E5 MSFT 01000013) io | map mem: p=7f6a3000 v=aa3000 s=1000: done io | AcpiOsMapMemory(7f6a3000, 24) = aa3000 io | ACPI: FACS 0x7f6a3000 00040 io | map mem: p=7f6f6000 v=af6000 s=1000: done io | AcpiOsMapMemory(7f6f6000, 24) = af6000 io | ACPI: APIC 0x7f6f6000 00078 (v01 INTEL D945GLF2 000000E5 MSFT 01000013) io | map mem: p=7f6f5000 v=af5000 s=1000: done io | AcpiOsMapMemory(7f6f5000, 24) = af5000 io | ACPI: WDDT 0x7f6f5000 00040 (v01 INTEL D945GLF2 000000E5 MSFT 01000013) io | map mem: p=7f6f4000 v=af4000 s=1000: done io | AcpiOsMapMemory(7f6f4000, 24) = af4000 io | ACPI: MCFG 0x7f6f4000 0003C (v01 INTEL D945GLF2 000000E5 MSFT 01000013) io | map mem: p=7f6f3000 v=af3000 s=1000: done io | AcpiOsMapMemory(7f6f3000, 24) = af3000 io | ACPI: ASF! 0x7f6f3000 000A6 (v32 INTEL D945GLF2 000000E5 MSFT 01000013) io | map mem: p=7f6f8000 v=af8000 s=4000: done io | AcpiOsMapMemory(7f6f7000, 45ec) = af7000 io | Parsing all Control Methods: io | Table [DSDT](id 0001) - 562 Objects with 56 Devices 158 Methods 35 Regions io | tbxface-0601 [02] TbLoadNamespace : ACPI Tables successfully acquired io | enable ACPI subsystem io | evxfevnt-0184 [02] Enable : Transition to ACPI mode successful io | AcpiOsMapMemory(7f6a3000, 40) = aa3000 io | evgpeblk-1129 [04] EvCreateGpeBlock : GPE 00 to 1F [_GPE] 4 regs on int 0x9 io | /home/mayuresh/L4/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:57:AcpiOsInstallInterruptHandler: UNINPLEMENTED io | initialize ACPI objects io | Completing Region/Field/Buffer/Package initialization:.................................................................................. io | Initialized 35/35 Regions 0/0 Fields 25/25 Buffers 22/22 Packages (571 nodes) io | Initializing Device/Processor/Thermal objects by executing _INI methods: io | Executed 1 _INI methods requiring 0 _STA executions (examined 62 objects) io | evgpeblk-1234 [03] EvInitializeGpeBlock : Found 8 Wake, Enabled 3 Runtime GPEs in this block io | Interpreter enabled io | scanning for PCI root bridge io | Found PCI root bridge... io | Using IOAPIC for interrupt routing io | ACPI subsystem initialized io | ACPICA-Version:20091214, System in ACPI MODE, 32bit timer io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000f8000000-000000febffffe 6bfffff] non-pref (32bit) (align=6bffffe flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000f8000000-000000febffffe 6bfffff] non-pref (32bit) (align=6bffffe flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000e0000-000000000effff 10000] non-pref (32bit) (align=ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000e0000-000000000effff 10000] non-pref (32bit) (align=ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | WARNING: ignoring ACPI recource (unkown type: 1) io | WARNING: ignoring ACPI recource (unkown type: 1) io | WARNING: ignoring ACPI recource (unkown type: 1) io | Loading: config 'rom/x86-legacy-min.devs' io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4002) io | WARNING: phys mmio resource allocation failed io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4002) io | ERROR: could not reserve resource io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4102) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=8c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=8c002) io | Loading: config 'rom/l4lx-x86-x2-pci.io' io | Add IRQ resources to vbus: IRQ [0000000000000b-0000000000000b 1] rising edge (32bit) (align=0 flags=4001) io | Add IRQ resources to vbus: IRQ [00000000000001-00000000000001 1] rising edge (32bit) (align=0 flags=4001) io | Add IRQ resources to vbus: IRQ [0000000000000c-0000000000000c 1] rising edge (32bit) (align=0 flags=4001) io | Add IRQ resources to vbus: IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | Add IRQ resources to vbus: IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | Add IRQ resources to vbus: IRQ [00000000000012-00000000000012 1] level low (32bit) (align=0 flags=304201) io | Add IRQ resources to vbus: IRQ [0000000000000e-0000000000000e 1] rising edge (32bit) (align=0 flags=4001) io | Add IRQ resources to vbus: IRQ [0000000000000f-0000000000000f 1] rising edge (32bit) (align=0 flags=4001) io | P6Device: l4linux "" io | P6Device: vgadev "PNP0900" io | IRQ [0000000000000b-0000000000000b 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4003) io | IOPORT [0000000000c000-0000000000c00f 10] non-pref (32bit) (align=f flags=4003) io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=8c002) io | P6Device: ps2 "PNP0303" io | IRQ [00000000000001-00000000000001 1] rising edge (32bit) (align=0 flags=4001) io | IRQ [0000000000000c-0000000000000c 1] rising edge (32bit) (align=0 flags=4001) io | P6Device: bios "BIOS" io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | P6Device: PCI0 "PNP0A03" io | P6Device: host_bridge_dummy "" io | P6Device: pci_gfx[0000] "" io | IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | IOMEM [00000090200000-0000009027ffff 80000] non-pref (32bit) (align=7ffff flags=4a02) io | IOPORT [000000000020e0-000000000020e7 8] non-pref (32bit) (align=7 flags=4a03) io | IOMEM [00000080000000-0000008fffffff 10000000] pref (32bit) (align=fffffff flags=4e02) io | IOMEM [00000090280000-000000902bffff 40000] non-pref (32bit) (align=3ffff flags=4a02) io | P6Device: pci_l4x[0000] "" io | IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | IOPORT [000000000020c8-000000000020cf 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020ec-000000000020ef 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020c0-000000000020c7 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020e8-000000000020eb 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020a0-000000000020af 10] non-pref (32bit) (align=f flags=4a03) io | P6Device: pci_l4x[0001] "" io | IRQ [00000000000012-00000000000012 1] level low (32bit) (align=0 flags=304201) io | IOPORT [000000000001f0-000000000001f7 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000003f6-000000000003f6 1] non-pref (32bit) (align=0 flags=4a03) io | IRQ [0000000000000e-0000000000000e 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000170-00000000000177 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [00000000000376-00000000000376 1] non-pref (32bit) (align=0 flags=4a03) io | IRQ [0000000000000f-0000000000000f 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [000000000020d8-000000000020df 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020f4-000000000020f7 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020d0-000000000020d7 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020f0-000000000020f3 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020b0-000000000020bf 10] non-pref (32bit) (align=f flags=4a03) io | P6Device: pci_l4x[0002] "" io | IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | IOPORT [00000000001000-000000000010ff 100] non-pref (32bit) (align=ff flags=4a03) io | IOMEM [00000090100000-00000090100fff 1000] non-pref (64bit) (align=fff flags=14a02) io | IOMEM [00000090000000-0000009000ffff 10000] pref (64bit) (align=ffff flags=14e02) io | P6Device: (noname) "L40009" io | Real Hardware ----------------------------------- io | P6Device: System Bus "" io | Hw::Device[System Bus] io | P6Device: SLPB "PNP0C0E" io | Hw::Device[SLPB] io | P6Device: PCI0 "PNP0A03" io | Hw::Device[PCI0] io | IOMEM * [00000080000000-000000efffffff 70000000] non-pref (32bit) (align=6fffffff flags=c002) io | IOMEM * [000000f8000000-000000febffffe 6bfffff] non-pref (32bit) (align=6bffffe flags=c002) io | IOMEM * [000000000e0000-000000000effff 10000] non-pref (32bit) (align=ffff flags=c002) io | IOMEM * [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | IOPORT* [00000000000d00-0000000000ffff f300] non-pref (32bit) (align=f2ff flags=c003) io | IOPORT* [00000000000000-00000000000cf7 cf8] non-pref (32bit) (align=cf7 flags=c003) io | IOPORT [00000000000cf8-00000000000cff 8] non-pref (32bit) (align=7 flags=c003) io | BUS * [00000000000000-000000000000ff 100] non-pref (32bit) (align=ff flags=c004) io | PCI IRQ ROUTER: 18Pci_irq_router_resIN12_GLOBAL__N_122Acpi_pci_irq_router_rsEE (0x7c70) io | P6Device: IOCM "PNP0C02" io | Hw::Device[IOCM] io | IOMEM [000000000e0000-000000000fffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | IOMEM [000000000c0000-000000000dffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | IOMEM [000000fed45000-000000fed99fff 55000] non-pref (32bit) (align=54fff flags=c002) io | IOMEM [000000fed20000-000000fed3ffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | IOMEM [000000fed1c000-000000fed1ffff 4000] non-pref (32bit) (align=3fff flags=c002) io | IOMEM [000000fed19000-000000fed19fff 1000] non-pref (32bit) (align=fff flags=c002) io | IOMEM [000000fed18000-000000fed18fff 1000] non-pref (32bit) (align=fff flags=c002) io | IOMEM [000000fed14000-000000fed17fff 4000] non-pref (32bit) (align=3fff flags=c002) io | IOMEM [000000fed13000-000000fed13fff 1000] non-pref (32bit) (align=fff flags=c002) io | IOMEM [000000f0000000-000000f3ffffff 4000000] non-pref (32bit) (align=3ffffff flags=c002) io | P6Device: P32_ "" io | Hw::Device[P32_] io | 0000:00:1e.0: PCI Bridge [1] io | 0x8086 0x244e io | Intel Corporation 82801 PCI Bridge io | IOPORT* [00000000000000-00000000000000 1] non-pref (32bit) (align=fff flags=5003) io | IOMEM * [00000000000000-00000000000000 1] pref (64bit) (align=fffff flags=15402) io | IOMEM * [00000000000000-00000000000000 1] non-pref (32bit) (align=fffff flags=5002) io | PCI IRQ ROUTER: 18Pci_irq_router_resIN12_GLOBAL__N_122Acpi_pci_irq_router_rsEE (0x3220) io | P6Device: LPC_ "" io | Hw::Device[LPC_] io | 0000:00:1f.0: ISA Bridge [128] io | 0x8086 0x27b8 io | Intel Corporation 82801GB/GR (ICH7 Family) LPC Interface Bridge io | P6Device: LNKA "PNP0C0F" io | Hw::Device[LNKA] io | IRQ [0000000000000b-0000000000000b 1] level low (32bit) (align=0 flags=304001) io | P6Device: LNKB "PNP0C0F" io | Hw::Device[LNKB] io | P6Device: LNKC "PNP0C0F" io | Hw::Device[LNKC] io | IRQ [00000000000009-00000000000009 1] level low (32bit) (align=0 flags=304001) io | P6Device: LNKD "PNP0C0F" io | Hw::Device[LNKD] io | IRQ [0000000000000b-0000000000000b 1] level low (32bit) (align=0 flags=304001) io | P6Device: LNKE "PNP0C0F" io | Hw::Device[LNKE] io | P6Device: LNKF "PNP0C0F" io | Hw::Device[LNKF] io | P6Device: LNKG "PNP0C0F" io | Hw::Device[LNKG] io | IRQ [00000000000009-00000000000009 1] level low (32bit) (align=0 flags=304001) io | P6Device: LNKH "PNP0C0F" io | Hw::Device[LNKH] io | IRQ [0000000000000a-0000000000000a 1] level low (32bit) (align=0 flags=304001) io | P6Device: DMAC "PNP0200" io | Hw::Device[DMAC] io | IOPORT [000000000000c0-000000000000df 20] non-pref (32bit) (align=1f flags=c003) io | IOPORT [0000000000008f-0000000000008f 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000089-0000000000008b 3] non-pref (32bit) (align=2 flags=c003) io | IOPORT [00000000000087-00000000000087 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000081-00000000000083 3] non-pref (32bit) (align=2 flags=c003) io | IOPORT [00000000000000-0000000000000f 10] non-pref (32bit) (align=f flags=c003) io | P6Device: RTC_ "PNP0B00" io | Hw::Device[RTC_] io | IRQ [00000000000008-00000000000008 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000074-00000000000077 4] non-pref (32bit) (align=3 flags=c003) io | IOPORT [00000000000070-00000000000071 2] non-pref (32bit) (align=1 flags=c003) io | P6Device: PIC_ "PNP0000" io | Hw::Device[PIC_] io | IOPORT [000000000004d0-000000000004d1 2] non-pref (32bit) (align=1 flags=c003) io | IOPORT [000000000000a0-000000000000bd 1e] non-pref (32bit) (align=1d flags=c003) io | IOPORT [00000000000020-0000000000003d 1e] non-pref (32bit) (align=1d flags=c003) io | P6Device: FPU_ "PNP0C04" io | Hw::Device[FPU_] io | IRQ [0000000000000d-0000000000000d 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [000000000000f0-000000000000f0 1] non-pref (32bit) (align=0 flags=c003) io | P6Device: TMR_ "PNP0100" io | Hw::Device[TMR_] io | IRQ [00000000000000-00000000000000 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000050-00000000000053 4] non-pref (32bit) (align=3 flags=c003) io | IOPORT [00000000000040-00000000000043 4] non-pref (32bit) (align=3 flags=c003) io | P6Device: SPKR "PNP0800" io | Hw::Device[SPKR] io | IOPORT [00000000000061-00000000000061 1] non-pref (32bit) (align=0 flags=c003) io | P6Device: XTRA "PNP0C02" io | Hw::Device[XTRA] io | IOPORT [00000000000090-0000000000009f 10] non-pref (32bit) (align=f flags=c003) io | IOPORT [0000000000008c-0000000000008e 3] non-pref (32bit) (align=2 flags=c003) io | IOPORT [00000000000088-00000000000088 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000084-00000000000086 3] non-pref (32bit) (align=2 flags=c003) io | IOPORT [00000000000080-00000000000080 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000072-00000000000073 2] non-pref (32bit) (align=1 flags=c003) io | IOPORT [00000000000010-0000000000001f 10] non-pref (32bit) (align=f flags=c003) io | IOPORT [00000000000680-000000000006ff 80] non-pref (32bit) (align=7f flags=c003) io | IOPORT [00000000000092-00000000000092 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000400-0000000000047f 80] non-pref (32bit) (align=7f flags=c003) io | IOPORT [00000000000500-0000000000053f 40] non-pref (32bit) (align=3f flags=c003) io | P6Device: TPM_ "PNP0C31" io | Hw::Device[TPM_] io | IOMEM [000000fed40000-000000fed44fff 5000] non-pref (32bit) (align=4fff flags=c002) io | P6Device: XTR2 "PNP0C02" io | Hw::Device[XTR2] io | IOPORT [00000000000064-00000000000064 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000060-00000000000060 1] non-pref (32bit) (align=0 flags=c003) io | P6Device: FDC0 "PNP0700" io | Hw::Device[FDC0] io | IRQ [00000000000006-00000000000006 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000000-00000000000000 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000000-00000000000005 6] non-pref (32bit) (align=5 flags=c003) io | P6Device: LPT_ "PNP0400" io | Hw::Device[LPT_] io | IRQ [00000000000007-00000000000007 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000378-0000000000037f 8] non-pref (32bit) (align=7 flags=c003) io | P6Device: ECP_ "PNP0401" io | Hw::Device[ECP_] io | IRQ [00000000000007-00000000000007 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000778-0000000000077f 8] non-pref (32bit) (align=7 flags=c003) io | IOPORT [00000000000378-0000000000037f 8] non-pref (32bit) (align=7 flags=c003) io | P6Device: PS2M "PNP0F03" io | Hw::Device[PS2M] io | IRQ [0000000000000c-0000000000000c 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000064-00000000000064 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000060-00000000000060 1] non-pref (32bit) (align=0 flags=c003) io | P6Device: PS2K "PNP0303" io | Hw::Device[PS2K] io | IRQ [00000000000001-00000000000001 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000064-00000000000064 1] non-pref (32bit) (align=0 flags=c003) io | IOPORT [00000000000060-00000000000060 1] non-pref (32bit) (align=0 flags=c003) io | P6Device: UAR1 "PNP0501" io | Hw::Device[UAR1] io | IRQ [00000000000004-00000000000004 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [000000000003f8-000000000003ff 8] non-pref (32bit) (align=7 flags=c003) io | P6Device: UAR2 "PNP0501" io | Hw::Device[UAR2] io | IRQ [00000000000003-00000000000003 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000000-00000000000007 8] non-pref (32bit) (align=7 flags=c003) io | P6Device: IELK "AWY0001" io | Hw::Device[IELK] io | P6Device: PEX0 "" io | Hw::Device[PEX0] io | 0000:00:1c.0: PCI Bridge [129] io | 0x8086 0x27d0 io | Intel Corporation N10/ICH 7 Family PCI Express Port 1 io | IRQ [00000000000011-00000000000011 1] level low (32bit) (align=0 flags=304201) io | IOPORT* [00000000001000-00000000001fff 1000] non-pref (32bit) (align=fff flags=4003) io | IOMEM * [00000090000000-000000900fffff 100000] pref (64bit) (align=fffff flags=14402) io | IOMEM * [00000090100000-000000901fffff 100000] non-pref (32bit) (align=fffff flags=4002) io | PCI IRQ ROUTER: 18Pci_irq_router_resIN12_GLOBAL__N_122Acpi_pci_irq_router_rsEE (0x13d48) io | P6Device: "" io | Hw::Device[] io | 0000:01:00.0: network controller [0] io | 0x10ec 0x8168 io | Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet cont io | IOMEM [00000090000000-0000009000ffff 10000] pref (64bit) (align=ffff flags=14e02) io | IOMEM [00000090100000-00000090100fff 1000] non-pref (64bit) (align=fff flags=14a02) io | IOPORT [00000000001000-000000000010ff 100] non-pref (32bit) (align=ff flags=4a03) io | IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | P6Device: PEX1 "" io | Hw::Device[PEX1] io | P6Device: PEX2 "" io | Hw::Device[PEX2] io | 0000:00:1c.2: PCI Bridge [129] io | 0x8086 0x27d4 io | Intel Corporation N10/ICH 7 Family PCI Express Port 3 io | IRQ [00000000000012-00000000000012 1] level low (32bit) (align=0 flags=304201) io | IOPORT* [00000000000000-00000000000000 1] non-pref (32bit) (align=fff flags=5003) io | IOMEM * [00000000000000-00000000000000 1] pref (64bit) (align=fffff flags=15402) io | IOMEM * [00000000000000-00000000000000 1] non-pref (32bit) (align=fffff flags=5002) io | PCI IRQ ROUTER: 18Pci_irq_router_resIN12_GLOBAL__N_122Acpi_pci_irq_router_rsEE (0x13e88) io | P6Device: PEX3 "" io | Hw::Device[PEX3] io | 0000:00:1c.3: PCI Bridge [129] io | 0x8086 0x27d6 io | Intel Corporation N10/ICH 7 Family PCI Express Port 4 io | IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | IOPORT* [00000000000000-00000000000000 1] non-pref (32bit) (align=fff flags=5003) io | IOMEM * [00000000000000-00000000000000 1] pref (64bit) (align=fffff flags=15402) io | IOMEM * [00000000000000-00000000000000 1] non-pref (32bit) (align=fffff flags=5002) io | PCI IRQ ROUTER: 18Pci_irq_router_resIN12_GLOBAL__N_122Acpi_pci_irq_router_rsEE (0x13fc8) io | P6Device: PEX4 "" io | Hw::Device[PEX4] io | P6Device: PEX5 "" io | Hw::Device[PEX5] io | P6Device: APIC "PNP0003" io | Hw::Device[APIC] io | IOMEM [000000fec00000-000000fec000ff 100] non-pref (32bit) (align=ff flags=c002) io | P6Device: HPET "PNP0103" io | Hw::Device[HPET] io | IOMEM [000000fed00000-000000fed003ff 400] non-pref (32bit) (align=3ff flags=c002) io | P6Device: UHC1 "" io | Hw::Device[UHC1] io | 0000:00:1d.0: serial bus controller [128] io | 0x8086 0x27c8 io | Intel Corporation N10/ICH 7 Family USB UHCI Controller #1 io | IOPORT [00000000002080-0000000000209f 20] non-pref (32bit) (align=1f flags=4a03) io | IRQ [00000000000017-00000000000017 1] level low (32bit) (align=0 flags=304201) io | P6Device: UHC2 "" io | Hw::Device[UHC2] io | 0000:00:1d.1: serial bus controller [0] io | 0x8086 0x27c9 io | Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 io | IOPORT [00000000002060-0000000000207f 20] non-pref (32bit) (align=1f flags=4a03) io | IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | P6Device: UHC3 "" io | Hw::Device[UHC3] io | 0000:00:1d.2: serial bus controller [0] io | 0x8086 0x27ca io | Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 io | IOPORT [00000000002040-0000000000205f 20] non-pref (32bit) (align=1f flags=4a03) io | IRQ [00000000000012-00000000000012 1] level low (32bit) (align=0 flags=304201) io | P6Device: UHC4 "" io | Hw::Device[UHC4] io | 0000:00:1d.3: serial bus controller [0] io | 0x8086 0x27cb io | Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 io | IOPORT [00000000002020-0000000000203f 20] non-pref (32bit) (align=1f flags=4a03) io | IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | P6Device: EHCI "" io | Hw::Device[EHCI] io | 0000:00:1d.7: serial bus controller [0] io | 0x8086 0x27cc io | Intel Corporation N10/ICH 7 Family USB2 EHCI Controller io | IOMEM [000000902c4000-000000902c43ff 400] non-pref (32bit) (align=3ff flags=4a02) io | IRQ [00000000000017-00000000000017 1] level low (32bit) (align=0 flags=304201) io | P6Device: AC9M "" io | Hw::Device[AC9M] io | P6Device: AZAL "" io | Hw::Device[AZAL] io | 0000:00:1b.0: multimedia device [0] io | 0x8086 0x27d8 io | Intel Corporation N10/ICH 7 Family High Definition Audio Controller io | IOMEM [000000902c0000-000000902c3fff 4000] non-pref (64bit) (align=3fff flags=14a02) io | IRQ [00000000000016-00000000000016 1] level low (32bit) (align=0 flags=304201) io | P6Device: IDEC "" io | Hw::Device[IDEC] io | 0000:00:1f.1: mass storage contoller [0] io | 0x8086 0x27df io | Intel Corporation 82801G (ICH7 Family) IDE Controller io | IOPORT [000000000020b0-000000000020bf 10] non-pref (32bit) (align=f flags=4a03) io | IOPORT [000000000020f0-000000000020f3 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020d0-000000000020d7 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020f4-000000000020f7 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020d8-000000000020df 8] non-pref (32bit) (align=7 flags=4a03) io | IRQ [0000000000000f-0000000000000f 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [00000000000376-00000000000376 1] non-pref (32bit) (align=0 flags=4a03) io | IOPORT [00000000000170-00000000000177 8] non-pref (32bit) (align=7 flags=4a03) io | IRQ [0000000000000e-0000000000000e 1] rising edge (32bit) (align=0 flags=4001) io | IOPORT [000000000003f6-000000000003f6 1] non-pref (32bit) (align=0 flags=4a03) io | IOPORT [000000000001f0-000000000001f7 8] non-pref (32bit) (align=7 flags=4a03) io | IRQ [00000000000012-00000000000012 1] level low (32bit) (align=0 flags=304201) io | P6Device: PRID "" io | Hw::Device[PRID] io | P6Device: P_D0 "" io | Hw::Device[P_D0] io | P6Device: P_D1 "" io | Hw::Device[P_D1] io | P6Device: IDES "" io | Hw::Device[IDES] io | 0000:00:1f.2: mass storage contoller [0] io | 0x8086 0x27c0 io | Intel Corporation N10/ICH7 Family SATA IDE Controller io | IOPORT [000000000020a0-000000000020af 10] non-pref (32bit) (align=f flags=4a03) io | IOPORT [000000000020e8-000000000020eb 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020c0-000000000020c7 8] non-pref (32bit) (align=7 flags=4a03) io | IOPORT [000000000020ec-000000000020ef 4] non-pref (32bit) (align=3 flags=4a03) io | IOPORT [000000000020c8-000000000020cf 8] non-pref (32bit) (align=7 flags=4a03) io | IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | P6Device: PRID "" io | Hw::Device[PRID] io | P6Device: P_D0 "" io | Hw::Device[P_D0] io | P6Device: P_D1 "" io | Hw::Device[P_D1] io | P6Device: SECD "" io | Hw::Device[SECD] io | P6Device: S_D0 "" io | Hw::Device[S_D0] io | P6Device: S_D1 "" io | Hw::Device[S_D1] io | P6Device: "" io | Hw::Device[] io | 0000:00:00.0: Host/PCI Bridge [0] io | 0x8086 0x2770 io | Intel Corporation 82945G/GZ/P/PL Memory Controller Hub io | P6Device: "" io | Hw::Device[] io | 0000:00:02.0: display controller [0] io | 0x8086 0x2772 io | Intel Corporation 82945G/GZ Integrated Graphics Controller io | IOMEM [00000090280000-000000902bffff 40000] non-pref (32bit) (align=3ffff flags=4a02) io | IOMEM [00000080000000-0000008fffffff 10000000] pref (32bit) (align=fffffff flags=4e02) io | IOPORT [000000000020e0-000000000020e7 8] non-pref (32bit) (align=7 flags=4a03) io | IOMEM [00000090200000-0000009027ffff 80000] non-pref (32bit) (align=7ffff flags=4a02) io | IRQ [00000000000010-00000000000010 1] level low (32bit) (align=0 flags=304201) io | P6Device: "" io | Hw::Device[] io | 0000:00:1f.3: serial bus controller [0] io | 0x8086 0x27da io | Intel Corporation N10/ICH 7 Family SMBus Controller io | IOPORT [00000000002000-0000000000201f 20] non-pref (32bit) (align=1f flags=4a03) io | IRQ [00000000000013-00000000000013 1] level low (32bit) (align=0 flags=304201) io | P6Device: PS2 "PNP0303" io | Hw::Device[PS2] io | IRQ [0000000000000c-0000000000000c 1] rising edge (32bit) (align=0 flags=4001) io | IRQ [00000000000001-00000000000001 1] rising edge (32bit) (align=0 flags=4001) io | P6Device: BIOS "BIOS" io | Hw::Device[BIOS] io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4102) io | P6Device: VGA "PNP0900" io | Hw::Device[VGA] io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=8c002) io | IOPORT [0000000000c000-0000000000c00f 10] non-pref (32bit) (align=f flags=4003) io | IOPORT [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4003) io | IRQ [0000000000000b-0000000000000b 1] rising edge (32bit) (align=0 flags=4001) io | Ready. Waiting for request. l4linux | PH 0 (t: 1) offs=00001000 vaddr=00400000 vend=007de000 l4linux | phys=00400000 ephys=007de000 l4linux | f_sz=003de000 memsz=003de000 flgs=r-x l4linux | PH 1 (t: 1) offs=003df000 vaddr=007de000 vend=008fa000 l4linux | phys=007de000 ephys=008fa000 l4linux | f_sz=00070000 memsz=0011c000 flgs=rw- l4linux | PH 2 (t: 4) offs=00302a90 vaddr=00701a90 vend=00701ab4 l4linux | phys=00701a90 ephys=00701ab4 l4linux | f_sz=00000024 memsz=00000024 flgs=--- l4linux | Starting binary at 0x400000, argc=6 argv=0x80007f90 *argv=0xb1007ff4 argv0=rom/vmlinuz l4linux | External resolver is at 0xa80006d0 l4linux | ======> L4Linux 2.6 starting... <======== l4linux | Linux version 3.0.0-l4-svn23 (root@mayuresh) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #16 SMP Wed Jul 25 17:05:02 CEST 2012 l4linux | Binary name: rom/vmlinuz l4linux | Linux kernel command line (5 args): mem=800M earlyprintk=yes l4x_rd=rom/squeezesmall-x.img root=1:0 ramdisk_size=400000 l4linux | CPU mapping (l:p)[1]: 0:0 l4linux | Image: 00400000 - 008fa000 [5096 KiB]. l4linux | Areas: Text: 00400000 - 007de000 [3960kB] (a bit longer) l4linux | Data: 007de000 - 008102a0 [200kB] l4linux | Initdata: 00811000 - 00848000 [220kB] l4linux | BSS: 0084e000 - 008ea000 [624kB] io | map mem: p=a0000 v=4a0000 s=20000: done l4linux | gs=43 fs=43 l4linux | Device scan: l4linux | Device: PNP0900 l4linux | IRQ: 0000000b - 0000000b io | request resource: IOPORT [0000000000000b-0000000000000b 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 00000000 - 00000fff io | request resource: IOPORT [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=4003) io | l4linux | PORT: 0000c000 - 0000c00f io | request resource: IOPORT [0000000000c000-0000000000c00f 10] non-pref (32bit) (align=f flags=4003) io | l4linux | MEM: 000a0000 - 000bffff io | request resource: IOPORT [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=4003) io | l4linux | Device: PNP0303 l4linux | IRQ: 00000001 - 00000001 io | request resource: IOPORT [00000000000001-00000000000001 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | IRQ: 0000000c - 0000000c io | request resource: IOPORT [0000000000000c-0000000000000c 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | Device: BIOS l4linux | MEM: 0009f000 - 0009ffff io | request resource: IOPORT [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=4003) io | l4linux | MEM: 000c0000 - 000fffff io | request resource: IOPORT [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=4003) io | l4linux | Device: l4linux | IRQ: 00000010 - 00000010 io | request resource: IOPORT [00000000000010-00000000000010 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | MEM: 90200000 - 9027ffff io | request resource: IOPORT [00000090200000-0000009027ffff 80000] non-pref (32bit) (align=7ffff flags=4003) io | l4linux | PORT: 000020e0 - 000020e7 io | request resource: IOPORT [000000000020e0-000000000020e7 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | MEM: 80000000 - 8fffffff io | request resource: IOPORT [00000080000000-0000008fffffff 10000000] non-pref (32bit) (align=fffffff flags=4003) io | l4linux | MEM: 90280000 - 902bffff io | request resource: IOPORT [00000090280000-000000902bffff 40000] non-pref (32bit) (align=3ffff flags=4003) io | l4linux | Device: l4linux | IRQ: 00000013 - 00000013 io | request resource: IOPORT [00000000000013-00000000000013 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 000020c8 - 000020cf io | request resource: IOPORT [000000000020c8-000000000020cf 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 000020ec - 000020ef io | request resource: IOPORT [000000000020ec-000000000020ef 4] non-pref (32bit) (align=3 flags=4003) io | l4linux | PORT: 000020c0 - 000020c7 io | request resource: IOPORT [000000000020c0-000000000020c7 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 000020e8 - 000020eb io | request resource: IOPORT [000000000020e8-000000000020eb 4] non-pref (32bit) (align=3 flags=4003) io | l4linux | PORT: 000020a0 - 000020af io | request resource: IOPORT [000000000020a0-000000000020af 10] non-pref (32bit) (align=f flags=4003) io | l4linux | Device: l4linux | IRQ: 00000012 - 00000012 io | request resource: IOPORT [00000000000012-00000000000012 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 000001f0 - 000001f7 io | request resource: IOPORT [000000000001f0-000000000001f7 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 000003f6 - 000003f6 io | request resource: IOPORT [000000000003f6-000000000003f6 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | IRQ: 0000000e - 0000000e io | request resource: IOPORT [0000000000000e-0000000000000e 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 00000170 - 00000177 io | request resource: IOPORT [00000000000170-00000000000177 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 00000376 - 00000376 io | request resource: IOPORT [00000000000376-00000000000376 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | IRQ: 0000000f - 0000000f io | request resource: IOPORT [0000000000000f-0000000000000f 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 000020d8 - 000020df io | request resource: IOPORT [000000000020d8-000000000020df 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 000020f4 - 000020f7 io | request resource: IOPORT [000000000020f4-000000000020f7 4] non-pref (32bit) (align=3 flags=4003) io | l4linux | PORT: 000020d0 - 000020d7 io | request resource: IOPORT [000000000020d0-000000000020d7 8] non-pref (32bit) (align=7 flags=4003) io | l4linux | PORT: 000020f0 - 000020f3 io | request resource: IOPORT [000000000020f0-000000000020f3 4] non-pref (32bit) (align=3 flags=4003) io | l4linux | PORT: 000020b0 - 000020bf io | request resource: IOPORT [000000000020b0-000000000020bf 10] non-pref (32bit) (align=f flags=4003) io | l4linux | Device: l4linux | IRQ: 00000010 - 00000010 io | request resource: IOPORT [00000000000010-00000000000010 1] non-pref (32bit) (align=0 flags=4003) io | l4linux | PORT: 00001000 - 000010ff io | request resource: IOPORT [00000000001000-000000000010ff 100] non-pref (32bit) (align=ff flags=4003) io | l4linux | MEM: 90100000 - 90100fff io | request resource: IOPORT [00000090100000-00000090100fff 1000] non-pref (32bit) (align=fff flags=4003) io | l4linux | MEM: 90000000 - 9000ffff io | request resource: IOPORT [00000090000000-0000009000ffff 10000] non-pref (32bit) (align=ffff flags=4003) io | l4linux | l4x_fiasco_gdt_entry_offset = 9 l4linux | rtc not found l4linux | WARNING: RTC server does not seem there! l4linux | l4lx_thread_create: Created thread 416 (cpu0) (u:b3000400, v:b3000600, sp:007dfff4) l4linux | main thread will be 416 l4linux | l4x_register_pointer_section: addr = 007de000 size = 1163264 l4linux | section-with-init: virt: 0x7de000 to 0x8f9fff [1136 KiB] l4linux | section-with-init: Phys: 0x00a41000 to 0x00b5d000, Size: 1163264 l4linux | l4x_linux_startup: thread 416. l4linux | Main thread running, waiting... l4linux | main thread: received startup message. l4linux | WARNING: Unknown wrmsr: 0000008b at 0x6f7d1f l4linux | WARNING: Unknown rdmsr: 0000008b at 0x6f7d27 l4linux | l4x_setup_memory: Forcing superpages for main memory l4linux | l4re_global_env: 0xb1007f04 l4linux | Main memory size: 800MB l4linux | Main memory: virt: 0xc00000 to 0x32bfffff [819200 KiB] l4linux | Main memory: Phys: 0x1a800000 to 0x4c800000, Size: 838860800 l4linux | Filling lower ptabs... l4linux | Done (1533 entries). l4linux | l4x_register_pointer_section: addr = 007de000 size = 1163264 l4linux | end: virt: 0x7de000 to 0x8f9fff [1136 KiB] l4linux | end: Phys: 0x00a41000 to 0x00b5d000, Size: 1163264 l4linux | l4x_rd_path: rom/squeezesmall-x.img l4linux | Loading: rom/squeezesmall-x.img l4linux | INITRD: Size of RAMdisk is 393216KiB l4linux | RAMdisk from 3ac00000 to 52c00000 [393216KiB] Linux version 3.0.0-l4-svn23 (root@mayuresh) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #16 SMP Wed Jul 25 17:05:02 CEST 2012 Disabled fast string operations BIOS-provided physical RAM map: L4Lx-Memory: 0000000000000000 - 0000000000400000 (reserved) L4Lx-Memory: 0000000000400000 - 00000000008fa000 (usable) L4Lx-Memory: 00000000008fa000 - 0000000000c00000 (unusable) L4Lx-Memory: 0000000000c00000 - 0000000032c00000 (usable) Notice: NX (Execute Disable) protection cannot be enabled: non-PAE kernel! last_pfn = 0x32c00 max_arch_pfn = 0x100000 init_memory_mapping: 0000000000000000-0000000032c00000 INITRD: 3ac00000 - 52c00000 812MB LOWMEM available. mapped low ram: 0 - 32c00000 low ram: 0 - 32c00000 Zone PFN ranges: DMA 0x00000400 -> 0x00000000 Normal 0x00000000 -> 0x00032c00 Movable zone start PFN for each node early_node_map[2] active PFN ranges 0: 0x00000400 -> 0x000008fa 0: 0x00000c00 -> 0x00032c00 Using APIC driver default Intel MultiProcessor Specification v1.0 Virtual Wire compatibility mode. Processors: 1 SMP: Allowing 1 CPUs, 0 hotplug CPUs Allocating PCI resources starting at 32c00000 (gap: 32c00000:cd400000) setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:1 nr_node_ids:1 PERCPU: Embedded 11 pages/cpu @32000000 s20896 r0 d24160 u4194304 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 204458 Kernel command line: mem=800M earlyprintk=yes l4x_rd=rom/squeezesmall-x.img root=1:0 ramdisk_size=400000 console [earlykdb0] enabled PID hash table entries: 4096 (order: 2, 16384 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Initializing CPU#0 Memory: 811944k/831488k available (3077k kernel code, 12352k reserved, 1083k data, 220k init, 0k highmem) virtual kernel memory layout: fixmap : 0x00100000 - 0x001e7000 ( 924 kB) vmalloc : 0x32c00000 - 0x3ac00000 ( 128 MB) lowmem : 0x00000000 - 0x32c00000 ( 812 MB) .init : 0x00811000 - 0x00848000 ( 220 kB) .data : 0x00701618 - 0x008102a0 (1083 kB) .text : 0x00400000 - 0x00701618 (3077 kB) Hierarchical RCU implementation. NR_IRQS:512 l4lx_irq_init: l4lx_irq_max = 512 l4linux | rtc not found Console: colour VGA+ 80x25 console [tty0] enabled l4lx_irq_dev_startup_timer(0) l4linux | l4lx_thread_create: Created thread 41f (timer.i0) (u:b3000800, v:00000000, sp:0087fff8) Detected 1596.021 MHz procesl4linux | timer_irq_thread: Starting timer IRQ thread. sor. Calibrating delay loop (skipped), value calculated using timer frequency.. 3192.04 BogoMIPS (lpj=15960210) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 l4linux | WARNING: Unknown wrmsr: 0000008b at 0x6f7d1f l4linux | WARNING: Unknown rdmsr: 0000008b at 0x6f7d27 Disabled fast string operations CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 SMP alternatives: switching to UP code Freeing SMP alternatives: 24k freed CPU0: Intel(R) Atom(TM) CPU 330 @ 1.60GHz stepping 02 Performance Events: l4linux | WARNING: Unknown rdmsr: 00000345 at 0x817cac no PEBS fmt3+, Atom events, l4linux | WARNING: Unknown rdmsr: 00000186 at 0x818311 l4linux | WARNING: Unknown rdmsr: 00000187 at 0x818311 l4linux | WARNING: Unknown rdmsr: 0000038d at 0x818344 Broken BIOS detected, complain to your hardware vendor. [Firmware Bug]: the BIOS has corrupted hw-PMU resources (MSR 38d is b30006000000038d) Intel PMU driver. l4linux | Page fault (non-resolved): pfa=1e3342 pc=416170 l4linux | Page fault (non-resolved): pfa=1a8 pc=493edb Die message: Trap: 14 Trap: 14: 0004 [#1] SMP Modules linked in: Pid: 1, comm: swapper Not tainted 3.0.0-l4-svn23 #16 EIP: 0000:[<00493edb>] EFLAGS: 00010202 CPU: 0 EIP is at do_coredump+0x4b/0xa50 EAX: 00000000 EBX: 0000000a ECX: 31c35fb4 EDX: 0000000b ESI: 31c35cac EDI: 00000000 EBP: 31c35c24 ESP: 31c35b8c DS: 0000 ES: 0000 FS: 005b GS: 0043 SS: 0023 Process swapper (pid: 1, ti=31c34000 task=31c33bc0 task.ti=31c34000) Stack: 31c35b94 00000000 31c35c04 0046a6b2 00000001 00000041 b3000600 31c15000 00000000 31c16dc0 0000000b 0048b223 31c268f8 0000000b 31c26904 00000000 31c35bd8 0043308d 0000000b 31c35bec 31c33e30 31c35cac 31c35bec 0000000b Call Trace: [<0046a6b2>] ? get_page_from_freelist+0x142/0x460 [<0048b223>] ? kmem_cache_free+0x43/0x60 [<0043308d>] ? __sigqueue_free+0x2d/0x30 [<0046aaab>] ? __alloc_pages_nodemask+0xdb/0x560 [<004351f4>] get_signal_to_deliver+0x174/0x3b0 [<00408653>] do_signal+0x43/0x7a0 [<006fd6e0>] ? cache_alloc_refill+0x66/0x425 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004339fe>] ? signal_wake_up+0x2e/0x40 [<00433b7c>] ? complete_signal+0xec/0x1f0 [<00433db8>] ? __send_signal.constprop.31+0x138/0x2b0 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004345f6>] ? force_sig_info+0xa6/0xd0 [<00403541>] l4x_deliver_signal+0x61/0x70 [<0042cc60>] ? remote_softirq_receive+0x40/0x40 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<00586a76>] ? vgacon_set_cursor_size.isra.11+0x96/0x120 [<00416170>] ? native_apic_mem_write+0x10/0x20 [<006fc14d>] l4x_vcpu_entry_kern+0x3f9/0x99c [<0044354d>] ? atomic_notifier_call_chain+0x1d/0x20 [<005a8ff2>] ? notify_update+0x22/0x30 [<005a9bee>] ? vt_console_print+0x25e/0x340 [<005a9990>] ? set_cursor+0x80/0x80 [<00416170>] ? native_apic_mem_write+0x10/0x20 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004282e1>] ? console_unlock+0x171/0x1c0 [<0040477f>] l4x_vcpu_entry+0x5ff/0x1790 [<00428511>] ? vprintk+0x191/0x3e0 [<0040477f>] ? l4x_vcpu_entry+0x5ff/0x1790 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<00428511>] ? vprintk+0x191/0x3e0 [<004143cb>] ? perf_events_lapic_init+0x2b/0x30 [<008184cf>] ? init_hw_perf_events+0xcca/0xe8b [<006f7b07>] ? print_cpu_info+0x93/0x125 [<00817805>] ? check_bugs+0xe6/0xe6 [<0040005b>] ? do_one_initcall+0x2b/0x170 [<0081a071>] ? native_smp_prepare_cpus+0x1c0/0x1c7 [<008115b2>] ? start_kernel+0x2b1/0x2b1 [<008115fd>] ? kernel_init+0x4b/0x10e [<008115b2>] ? start_kernel+0x2b1/0x2b1 Code: 00 c7 45 d0 00 00 00 00 89 55 90 8b 55 9c 89 7d a4 8b 80 68 01 00 00 c7 45 d4 00 00 00 00 c7 45 cc 00 00 00 00 89 55 c4 89 45 d0 <8b> 87 a8 01 00 00 8b bf 60 01 00 00 89 4d c8 89 45 d4 85 ff 89 EIP: [<00493edb>] do_coredump+0x4b/0xa50 SS:ESP 0023:31c35b8c ---[ end trace 4eaa2a86a8e2da22 ]--- Kernel panic - not syncing: Attempted to kill init! Pid: 1, comm: swapper Tainted: G D 3.0.0-l4-svn23 #16 Call Trace: [<006fcf1c>] ? printk+0x18/0x1a [<006fce1a>] panic+0x57/0x141 [<0042b053>] do_exit+0x6b3/0x6c0 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<006fcf1c>] ? printk+0x18/0x1a [<0040e300>] oops_end+0x70/0x90 [<0040e465>] die+0x45/0x70 [<00493edb>] ? do_coredump+0x4b/0xa50 [<0046a6b2>] ? get_page_from_freelist+0x142/0x460 [<0048b223>] ? kmem_cache_free+0x43/0x60 [<0043308d>] ? __sigqueue_free+0x2d/0x30 [<0046aaab>] ? __alloc_pages_nodemask+0xdb/0x560 [<004351f4>] ? get_signal_to_deliver+0x174/0x3b0 [<00408653>] ? do_signal+0x43/0x7a0 [<006fd6e0>] ? cache_alloc_refill+0x66/0x425 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004339fe>] ? signal_wake_up+0x2e/0x40 [<00433b7c>] ? complete_signal+0xec/0x1f0 [<00433db8>] ? __send_signal.constprop.31+0x138/0x2b0 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004345f6>] ? force_sig_info+0xa6/0xd0 [<00403541>] ? l4x_deliver_signal+0x61/0x70 [<0042cc60>] ? remote_softirq_receive+0x40/0x40 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<00586a76>] ? vgacon_set_cursor_size.isra.11+0x96/0x120 [<00416170>] ? native_apic_mem_write+0x10/0x20 [<006fc14d>] ? l4x_vcpu_entry_kern+0x3f9/0x99c [<0044354d>] ? atomic_notifier_call_chain+0x1d/0x20 [<005a8ff2>] ? notify_update+0x22/0x30 [<005a9bee>] ? vt_console_print+0x25e/0x340 [<005a9990>] ? set_cursor+0x80/0x80 [<00416170>] ? native_apic_mem_write+0x10/0x20 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<004282e1>] ? console_unlock+0x171/0x1c0 [<0040477f>] ? l4x_vcpu_entry+0x5ff/0x1790 [<00428511>] ? vprintk+0x191/0x3e0 [<0040477f>] ? l4x_vcpu_entry+0x5ff/0x1790 [<007011ed>] ? _raw_spin_unlock_irqrestore+0xd/0x10 [<00428511>] ? vprintk+0x191/0x3e0 [<004143cb>] ? perf_events_lapic_init+0x2b/0x30 [<008184cf>] ? init_hw_perf_events+0xcca/0xe8b [<006f7b07>] ? print_cpu_info+0x93/0x125 [<00817805>] ? check_bugs+0xe6/0xe6 [<0040005b>] ? do_one_initcall+0x2b/0x170 [<0081a071>] ? native_smp_prepare_cpus+0x1c0/0x1c7 [<008115b2>] ? start_kernel+0x2b1/0x2b1 [<008115fd>] ? kernel_init+0x4b/0x10e [<008115b2>] ? start_kernel+0x2b1/0x2b1 panic: going to sleep forever, bye l4linux | panic: going to sleep forever, bye Anand Mayuresh Vivekanand

2 1

About Inter-process Communication
by ZhangEditing 24 Jul '12

24 Jul '12

Hello. I need to send megabytes of data from one virtual machine to another. I looked into source code of IPC streams for C++, but did not find any facility for sending the content of a large buffer (say, 512B). I have also noticed the buffer registers in the UTCB, but I haven't figured out how to use it. If there is a way to send the content of a large buffer, would you please reference me to the related documents? A simple example would be very helpful.

2 1

SATA AHCI driver head banging.
by Daniel Waddington 23 Jul '12

23 Jul '12

Hi, I am trying to build a SATA driver for our Fiasco.OC personality. The h/w is a Intel 82801J IOCH in a PC platform. I get can pick up the device in the PCI, get BAR5 and map in the control registers. I then initialize the card (into AHCI mode), set up memory (command list and command tables) and try to do an IDENTIFY_DEVICE command. The command issues, and returns a PIO Setup FIS (type 5f). PxTFD.STS.DRQ=1 PxTFD.STS.BSY=0 PxSERR=0 PxSACT=1. The PIO setup FIS indicates a transfer count of 512 bytes (which is correct). All good so far, but then no interrupt happens and no more FISes appear - and I don't know what to do next. The same behavior occurs on another PC platform with a IOCH9 controller. I have not done anything w.r.t. configuring or re-routing IRQs in the PCI subsystem (a black hole to me). Is there something that is a must that I'm clearly missing here?? Any clues, much appreciated. Daniel

2 1

Re: l4linux GPU direct access
by Abhishek Gupta 23 Jul '12

23 Jul '12

Hi Adam, My final objective is just to get the graphic acceleration working, so having the gpu initialized by fbdrv is perfectly fine but I can't find a working configuration. What we have are two configs which work well separately (fbdrv and pci direct access) but we didn't understand yet how to combine them. I can see the log messages from fbdrv of setting the vbe mode in fbdrv config(without mag) but when I combine fbdrv and pci direct access configs I cannot see any message from fbdrv. Abhishek Gupta

2 3

GHC on L4RE
by Henri Chapelle 17 Jul '12

17 Jul '12

Hi, Do you know if someone already ported GHC (Glasgow Haskell Compiler) to L4RE (X86 and ARM)? Regards, Henri Chapelle

1 0

Build an hybrid program
by Pierre Larus 13 Jul '12

13 Jul '12

Hi, I would like to build a Linux application which also uses L4 services. So, I tried to use l4linux mode in my makefile. But I have this compilation error : "arm-none-linux-gnueabi/bin/ld: cannot find -l4lx-re.o". I don't know how to build this lib. Pierre Larus ---------------------------------------------- My makefile : PKGDIR ?= .. L4DIR ?= $(PKGDIR)/../.. TARGET = main MODE = l4linux SRC_CC = main.cc REQUIRES_LIBS = cxx_libc_io cxx_io include $(L4DIR)/mk/prog.mk

2 1

L4Android performance issue
by Haohui Mai 13 Jul '12

13 Jul '12

Hi, I just got a chance to run both L4Android and Android-x86 on an Asus EEE PC to measure their performance. In short, it seems to me that mag is causing some problem. I ran the Android web browser, and measured the page load latency to measure the performance of both system. I tried to keep the configuration of both side the same. For example, both system only use VESA, and they share the same userspace binaries. L4Android did well in some cases, however, I saw more than 2x slow down from L4Android (notably http://www.android.com) I suspect that this comes from mag -- I noticed that the graphics performance of L4Android is not great, for example, even boot animation lags on L4Android. I suspect it'll take some time to fix, so is there a way to disable mag and let l4linux takes care of the frame buffer directly? Thanks. ~Haohui

3 7

L4Re GUI
by Robert Campbell 12 Jul '12

12 Jul '12

Dope seems to offer a subset of the functionality of the features of Mag. What is the motivation to keeping both DoPE and Mag?

5 8

problem about ipc
by gaober 11 Jul '12

11 Jul '12

>> 2.l4_ipc_error( ),return 4,i look up in l4re document it means >> L4_ENOT_EXISTENT.but how can i solve that? >The documentation in the header file (pkg/l4sys/include/ipc.h) is quite clear about the error source: >L4_IPC_ENOT_EXISTENT = 0x04, /**< Non-existing destination or source. >could you please give us a minimal code example (including the lua script and both communcation partners) that >causes this? You communication partner has probably terminated or something like that. i want to use touchscreen on my omap3530 board.then i add REQUIRES_LIBS_arm = libdrivers-input in file pkg/input/lib/src/makefie. then in function tsc_irq_func( ) in file pkg/drivers/input/src/tsc-omap3.c , l4_ipc_err( tag,l4_utcb()) return 4. the arm-omap3.devs # OMAP3 (OMAP3EVM, Beagleboard) hw-root { sys => new Device() { .hid = "System Control"; new-res Mmio(0x48002000 .. 0x48002fff); new-res Mmio(0x48004000 .. 0x48004fff); } prcm => new Device() { .hid = "OMAP PRCM"; new-res Mmio(0x48004000 .. 0x48004fff); new-res Mmio(0x48005000 .. 0x48005fff); } gpio => new Device() { .hid = "GPIO"; new-res Mmio(0x48004000 .. 0x48004fff); new-res Mmio(0x48310000 .. 0x48310fff); new-res Mmio(0x49050000 .. 0x49050fff); new-res Mmio(0x49052000 .. 0x49052fff); new-res Mmio(0x49054000 .. 0x49054fff); new-res Mmio(0x49056000 .. 0x49056fff); new-res Mmio(0x49058000 .. 0x49058fff); } lcd => new Device() { .hid = "OMAP_LCD"; new-res Mmio(0x48050000 .. 0x48050fff); } i2c1 => new Device() { .hid = "I2C"; new-res Mmio(0x48070000 .. 0x48070fff); } kp => new Device() { .hid = "OMAP_KP"; new-res Mmio(0x48070000 .. 0x48070fff); } mcspi => new Device() { .hid = "McSPI"; new-res Mmio(0x48098000 .. 0x48098fff); } tsc => new Device() { .hid = "OMAP_TSC"; new-res Mmio(0x48098000 .. 0x48098fff); new-res Irq(32); } } the l4_android-arm.vbus file is # vim:set ft=ioconfig: # configuration file for io gui => new System_bus() { #KBD => wrap(hw-root.KBD); #MOUSE => wrap(hw-root.MOUSE); tsc => wrap(hw-root.tsc); mcspi => wrap(hw-root.mcspi); kp => wrap(hw-root.kp); i2c1 => wrap(hw-root.i2c1); gpio => wrap(hw-root.gpio); } fbdrv => new System_bus() { sys => wrap(hw-root.sys); lcd => wrap(hw-root.lcd); } android_bus => new System_bus() { } the cfg file is require("L4"); local lxname = "vmlinuz.android"; local l = L4.default_loader; local io_caps = { sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0); gui = L4.default_loader:new_channel():svr(); android_bus = L4.default_loader:new_channel():svr(); fbdrv = L4.default_loader:new_channel():svr(); rom = L4.Env.rom; icu = L4.Env.icu; }; local fb_caps = { vbus = io_caps.fbdrv; rom = L4.Env.rom; fb = L4.default_loader:new_channel():svr(); }; L4.default_loader:startv( { caps = io_caps, log = { "io", "red" }, }, "rom/io", "rom/arm-omap3.devs", "rom/l4_android-arm.vbus"); L4.default_loader:startv( { caps = fb_caps, log = { "fb", "cyan" }, }, "rom/fb-drv"); local mag_caps = { mag = l:new_channel(), svc = l:new_channel(), }; l:start({ caps = { vbus = io_caps.gui, fb = fb_caps.fb, mag = mag_caps.mag:svr(), svc = mag_caps.svc:svr(), }, log = { "mag", "g" }, l4re_dbg = L4.Dbg.Warn, }, "rom/mag"); local android_caps = { log = L4.Env.log:m("rws"); vbus = io_caps.android_bus; rom = L4.Env.rom; fb = mag_caps.svc:create(L4.Proto.Goos, "g=800x476+0+0"); }; L4.default_loader:start( { caps = android_caps, l4re_dbg = L4.Dbg.Warn, log = { "android", "yellow" }, }, "rom/" .. lxname .. " console=ttyLv0 androidboot.console=ttyLv0 mem=128M l4bdds.add=rom/system-arm-ginger.img,rw boot=local android.ril=ttyLv1 ip=dhcp l4x_rd=rom/root-arm-ginger.img rw root=1:0 ramdisk_size=1500 init=/init --debug l4fb.touchscreen=1"); thanks!

2 1

Re: l4linux GPU direct access
by Abhishek Gupta 11 Jul '12

11 Jul '12

Hi Adam, It is not decided yet which graphics card will be used. Basically, we are just trying to check whether the idea of doing this works or not. If I can get xserver running on l4linux on kvm then the graphics card will be decided. Do you have any suggestions?? Abhishek Gupta

2 1

Questions about L4 virtual machines
by ZhangEditing 09 Jul '12

09 Jul '12

Hi! I'm trying to port an OSEK OS to L4. I know that a guest OS runs as a L4 process from Fiasco's point of view. But I have also noticed relevent APIs such as the l4vcpu_* family, VM API for SVM, VMX, and TZ, and the vCPU API of threads. My questions are as follows: 1. What are the differences between a VM and an ordinary process? 2. Is it possible to run a guest OS without utilizing VM/vCPU APIs? 3. What does a guest OS have to do in order to run on L4Re and Fiasco? Is there a guide for doing this? I'm new to L4 and probably need concrete instructions. Thank you in advance!

3 2

Tasks priority and time slice
by Pierre Larus 09 Jul '12

09 Jul '12

Hi, I am running two para-virtualized OS on L4RE. I would like to define tasks priority and time slice. The real time scheduling extensions does not seem to be implemented on ARM. But I have find this code in a Ned example: scheduler = L4.Env.mem_alloc:create(L4.Proto.Scheduler, 0x78, 0x70) I don't understand how to use second and third arguments. Regards, Pierre Larus

2 1

bbclone fbdrv lcd problem
by gaober 09 Jul '12

09 Jul '12

hiHi, On Wed Jun 22, 2011 at 12:54:50 +0400, Vasily Sartakov wrote: >> I try to start ex_fb_spectrum example on beagleboard clone with 7" >> 480x800 LCD and have error in fbdrv//lcd-omap3.c: >> when a i call any l4vbus_i2c* and l4vbus_gpio function i have return >> -38 --- ENOSYS error >> whats may be wrong? >The problem is that 'io' does not currently implement any of the i2c and >gpio functionality. There was some experiment some longer time ago from >which that code is from.now i am doing some work on touchscreen driver.my board is omap3530,with tcs2046.i see there is l4vbus_mcspi* function,but i cann't find the code for the tcs control device operating.maybe the snapshot doesn't have the "server"?can you offer me some example ,maybe some codes of lcd, i think it's great useful for me.thank you very much! >For the beagleboard the LCD is configured by u-boot and can then just be >used. Isn't that approach possible with your board? Wilbert Gao

2 1

Re: l4linux GPU direct access
by Abhishek Gupta 09 Jul '12

09 Jul '12

Hi Adam, I have checked the xserver code and found that the DEFAULT_INT10 was already set to x86emu and it was already using x86emu to execute the int10. Also, there is one more mode vm86 in which int10 can be executed but it uses the vm86 system call which is not supported in l4linux. Is there a way to add vm86 system call to the l4linux? Also, I have tried with video drivers cirrus, qxl but none of them worked. I tried Ubuntu on vmware player and it uses vmware video driver to run xserver and does not uses int10. Abhishek Gupta

2 3

problem about ipc
by gaober 09 Jul '12

09 Jul '12

hi! 1.i find there is l4_ipc_error( ) ops like that in .h files,but where can i find the implementation of that func? 2.l4_ipc_error( ),return 4,i look up in l4re document it means L4_ENOT_EXISTENT.but how can i solve that? thanks! 发自 Android 版 Yahoo! 邮箱

2 1

L4Android effort appreciated
by John van V. 07 Jul '12

07 Jul '12

Hello all, I just want to send out a message of appreciation (speaking for a world of users) thanking you for all this effort to put the user directly onto the OS, that is by removing the long-obsolete Linux monolithic kernel. Ultimately, I would like to see "the app" go away and to see the OS directly to support the human mind to work as it does naturally collaboratively, the whole point behind internetworking. Thanks, again...

1 0

Mount SD card partition as rootfs
by Pierre Larus 04 Jul '12

04 Jul '12

Hi, I am currently trying to mount a SD card partition as L4Linux rootfs. I am using a beagleboard. The first flash card partition (fat32) is mounted by U-boot and contains the L4Linux kernel . The second partition (ext3) contains the rootfs. I have compiled L4Linux to support SD card et Ext3 filesystem and configured L4 to give to L4Linux access to the MMC device through a virtual bus. But the SD card partitions are not available in L4Linux. Do I forget something ? Regards, Pierre Larus ------------------------------------------------------------------- entry l4LinuxUcos kernel fiasco -serial_esc roottask moe rom/l4lx.cfg module l4re module ned module io module l4lx.cfg module vmlinuz.arm module beagle.devs module beagle.io ------------------------------------------------------------------- hw-root { # MultiMediaCard 1 2 3 mmc => new Device() { .hid = "OMAP_HSMMC"; new-res Mmio(0x4809c000 .. 0x4809dfff); new-res Mmio(0x480b4000 .. 0x480b5fff); new-res Mmio(0x480ad000 .. 0x480aefff); } } mmiodev => new System_bus() { mmc => wrap(hw-root.mmc); } ------------------------------------------------------------------- local lxname = "vmlinuz.arm"; local DeviceFile = "beagle.devs" local IOFile = "beagle.io" local loader = L4.default_loader; local io_bus = loader:new_channel(); loader:start({ caps = { mmiodev = io_bus:svr(), icu = L4.Env.icu, sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0), }, }, "rom/io -vv rom/" .. DeviceFile .. " rom/" .. IOFile); loader:start( { caps = { vbus = io_bus, icu = L4.Env.icu, log = L4.Env.log:m("rws"), }, l4re_dbg = L4.Dbg.Warn, log = { "l4linux", "yellow" }, }, "rom/" .. lxname .. " root=/dev/mmcblk0p2 rw rootfstype=ext3 init=/sbin/init console=ttyLv0"); --------------------------------------------------------------------------------------- ... L4 serial driver ttyLv0 at MMIO 0x1 (irq = 210) is a L4 L4 shared mem serial driver l4cdds: No name given, not starting. brd: module loaded l4bdds: No name given, not starting. mousedev: PS/2 mouse device common for all mice sdhci: Secure Digital Host Controller Interface driver sdhci: Copyright(c) Pierre Ossman TCP cubic registered NET: Registered protocol family 17 VFS: Cannot open root device "mmcblk0p2" or unknown-block(0,0) Please append a correct "root=" boot option; here are the available partitions: Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) [<00129d68>] (unwind_backtrace+0x0/0xf0) from [<00335858>] (panic+0x58/0x178) [<00335858>] (panic+0x58/0x178) from [<00100aa0>] (mount_block_root+0x1d4/0x294) [<00100aa0>] (mount_block_root+0x1d4/0x294) from [<00100e24>] (prepare_namespace +0x164/0x1bc) [<00100e24>] (prepare_namespace+0x164/0x1bc) from [<00100794>] (kernel_init+0xe4 /0x118) [<00100794>] (kernel_init+0xe4/0x118) from [<00122410>] (kernel_thread_exit+0x0/ 0x8) panic: going to sleep forever, bye l4linux | panic: going to sleep forever, bye

2 1

Startup help for L4Linux
by Andrej S 02 Jul '12

02 Jul '12

Hallo all, I'm absolutely new to L4 and need some startup help. I'm able to build Fiasco with L4Re and L4Linux, but I have no plan, how to bind them together. I miss some simple how-to, to get an instance of L4Linux on top of Fiasco like bootable image as well as how to run it under Fiasco-UX Can you provide some instructions and how-tos? Interesting papers and hints for development and debugging are welcome too. Thanking you in anticipation Andrej

3 4

l4linux, making progress
by Ryan Brown 28 Jun '12

28 Jun '12

I've managed to get my l4linux build to start running, but it doesn't seem to get far: l4linux | libio: Warning: Finding 'icu' in system bus failed with 'No such object found' 4linux | PH 0 (t: 1) offs=00001000 vaddr=00400000 vend=005d1000 l4linux | phys=00400000 ephys=005d1000 l4linux | f_sz=001d0cb8 memsz=001d1000 flgs=r-x l4linux | PH 1 (t: 1) offs=001d2000 vaddr=005d1000 vend=00d36000 l4linux | phys=005d1000 ephys=00d36000 l4linux | f_sz=006c4c10 memsz=00765000 flgs=rw- l4linux | PH 2 (t: 4) offs=0015df14 vaddr=0055cf14 vend=0055cf38 l4linux | phys=0055cf14 ephys=0055cf38 l4linux | f_sz=00000024 memsz=00000024 flgs=--- l4linux | Starting binary at 0x400000, argc=3 argv=0x80007f9c *argv=0xb1007ff4 argv0=rom/vmlinuz l4linux | External resolver is at 0xa80006e0 l4linux | ======> L4Linux 2.6 starting... <======== l4linux | Linux version 3.0.0-l4-svn23 (ribrdb(a)ribox.sfo.corp.google.com) (gcc version 4.4.3 (Ubuntu 4.4.3-4ubuntu5.1) ) #10 Wed Jun 27 16:00:19 PDT 2012 l4linux | Binary name: rom/vmlinuz l4linux | Linux kernel command line (2 args): mem=200M console=ttyLv0 l4linux | Configuration checks disabled, you know what you're doing. l4linux | CPU mapping (l:p)[1]: 0:0 l4linux | Image: 00400000 - 00d36000 [9432 KiB]. l4linux | Areas: Text: 00400000 - 005d1000 [1860kB] (a bit longer) l4linux | Data: 005d1000 - 005edc60 [115kB] l4linux | Initdata: 005ef000 - 00c96000 [6812kB] l4linux | BSS: 00c96000 - 00d26000 [576kB] l4linux | gs=43 fs=43 l4linux | Device scan: l4linux | l4x_fiasco_gdt_entry_offset = 9 Then it just stops. What's happened here? Should I see more output? Or does the kernel output go somewhere else? I've compiled my kernel with an initramfs that does an "echo hello init" at the beginning of init, but I never see that. Do I need to worry about that 'icu' 'No such object found'? I tried adding a capability to icu for l4linux, but that didn't seem to help. Also, I'm having trouble getting my io config correct. IO prints out: io | Loading: config 'rom/l4lx-virtio.io' io | rom/l4lx-virtio.io:7.37-50: warning: could not find 'PCI/VEN_1AF4' but then later on I see: io | P6Device: S4__ "" io | Hw::Device[S4__] io | 0000:00:04.0: display controller [0] io | 0x1af4 0x1000 io | Red Hat, Inc Virtio network device io | IOPORT [0000000000c000-0000000000c03f 40] non-pref (32bit) (align=3f flags=4a03) io | IRQ [0000000000000b-0000000000000b 1] level high (32bit) (align=0 flags=104201) What's up with that? Here's my settings: modules.list: entry L4Linux-virtio kernel fiasco -serial_esc roottask moe rom/l4lx-virtio.cfg module l4re module ned module l4lx-virtio.cfg module io module rtc module x86-legacy.devs module l4lx-virtio.io module vmlinuz l4lx-virtio.cfg loader = L4.default_loader; bus_linux = loader:new_channel(); bus_rtc = loader:new_channel(); rtc_cap = loader:new_channel(); loader:start({ caps = { rom = rom; sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0); l4linux = bus_linux:svr(); icu = L4.Env.icu; rtc_bus = bus_rtc:svr(); }, log = { "io", "red" }, }, "rom/io -vvvv rom/x86-legacy.devs rom/l4lx-virtio.io"); loader:start({ caps = { rom = rom; vbus = bus_rtc; rtc = rtc_cap:svr(); }, log = { "rtc", "green" }, }, "rom/rtc"); L4.default_loader:start( { caps = { log = L4.Env.log:m("rws"); vbus = bus_linux; rtc = rtc_cap; }, l4re_dbg = L4.Dbg.Warn, log = { "l4linux", "yellow" }, }, "rom/vmlinuz mem=200M console=ttyLv0 "); l4lx-virtio.io l4linux => new System_bus() { # Add a new virtual PCI root bridge PCI0 => new PCI_bus() { # Allow access to virtio devices. pci_l4x[] => wrap(hw-root.match("PCI/VEN_1AF4")); } }

2 4

starting mag in l4con virtual console
by Valery V. Sedletski 28 Jun '12

28 Jun '12

hi, l4-hackers! I'm now experimenting with l4con from l4re. I found that now l4con is exporting the console access via Goos interface. And l4dope is started in Mag buffer. And equally, because l4con exports the same interface, it can be started in l4con virtual console. I tried that, it works perfectly. Then I tried the same with Mag in l4con buffer. -- It even starts, but the mouse isn't moving. I looked into Mag source, and discovered that Mag has plugins. But I have no idea how to use them. Can you give me a hint? Also, I found that there is two input plugins, one of them using event interface, other using libinput library. I suspect that I must to use the event one, but how? I start Mag the same way as DOpE. The single difference from the usual way of starting Mag is that vbus cap is missing (I gave the vbus cap to l4con, so, I think that Mag should not access input devices directly via vbus_input, but what instead?) So, I have the following output from Mag: [32mmag | libio: Warning: Query of 'vbus' failed![0m [32mmag | Hello from MAG[0m [32mmag | mapped frame buffer at 0x400000[0m [32mmag | View::Info:[0m [32mmag | flags: 0[0m [32mmag | size: 800x582 pos: 0, 0[0m [32mmag | bytes_per_line: 1600[0m [32mmag | buffer_offset: 0[0m [32mmag | RGBA(2): 5(11):6(5):5(0):0(0)[0m [32mmag | memory 400000-4e3580[0m [32mmag | L4INPUT native mode activated[0m [37ml4con | vc[4] 800x600@16, bpl:1600, gmode:0x0 save:1[0m [32mmag | L4INPUT: !!! W A R N I N G !!![0m [32mmag | L4INPUT: Please, do not use Fiasco's "-esc" with L4INPUT.[0m [32mmag | L4INPUT: !!! W A R N I N G !!![0m[32m[0m [32mmag | /media/os2l/var/src/genode/l4re/svn/l4/pkg/input/lib/src/init.c:110: failed l4input_internal_i8042_init(): -16[0m I found in the event input plugin source that it requires the "ev" cap. But where I can get it from? I start Mag this way: loader = L4.default_loader; ... local mag_svc = loader:new_channel(); -- Start mag loader:start( { caps = { fb = con_svc:create(L4.Proto.Goos, "g=800x600"); svc = mag_svc:svr(); }, l4re_dbg = L4.Dbg.Warn, log = {"mag", "green"}, }, "rom/mag"); Thanks in advance! WBR, valery

2 4

RE: Re: Keeping track of the CPU time for a thread
by Mohammad A Haque 27 Jun '12

27 Jun '12

Thank you for your reply. Just to test the functionality, I tried a very simple thread. It computes a factorial for some number of iterations. void entry_point(void * param) { int num_run = 1000000; int number = 15; int fact; thread_t self = env()->self(); for(int i=0;i<num_run;i++) { fact = 1; for(int j = 2; j<= number; j++) { fact = fact * j; } } printf("Factorial of %d is : %d\n", number, fact); l4_thread_stats_time(self.cap()); printf("Consumed time: %llu\n",l4_utcb_mr()->mr[0]); } What I found is - the consumed time does not depend on the number of iterations (num_run) - I tried from 1 to a very large number. It does vary with the number. Am I missing something? Thanks again. ---------------------------------------------------------------------- Date: Sun, 24 Jun 2012 23:29:25 +0200 From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> To: l4-hackers(a)os.inf.tu-dresden.de Subject: Re: Keeping track of the CPU time for a thread Message-ID: <20120624212925.GC1246(a)os.inf.tu-dresden.de> Content-Type: text/plain; charset=iso-8859-1 Hi, On Thu Jun 21, 2012 at 17:44:25 +0000, Mohammad A Haque wrote: > I want to measure how much CPU time a thread has consumed. When the > CPU time consumption exceeds a certain limit (specific to that > thread), I want to raise an interrupt. Please suggest me how can I do > it efficiently? The L4::Thread interface has the stats_time function to get the consumed time of a thread (FINE_GRAINED_CPUTIME in the kernel might be of interest here). Triggering an interrupt goes with its trigger function. Then it's just about plugging this together. Adam -- Adam adam(a)os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/

2 1

l4con
by Valery V. Sedletski 25 Jun '12

25 Jun '12

Hi again I forgot to ask, can l4con directly access video hardware? I knew that it supports some video acceleration features with, for example, Matrox cards (I have Matrox Millenium G400). So, can I use it with l4con video acceleration? If so, how to enable it? Is it detected automatically? Have you any plans for enancing fb_drv to support the video acceleration? There were some libraries used in Linux to support framebuffer acceleration. They could be ported to l4re... WBR, valery

2 1

how to build L4android for ARM?
by Jay Yao 24 Jun '12

24 Jun '12

Hi , I'm a rookie. And I'm very interest in L4Android. I want to use L4android in arm platform, but I don't know how to build L4android for arm , is there any build tutorials?

2 1

l4linux build failure, and a few questions
by Ryan Brown 24 Jun '12

24 Jun '12

I tried building l4linux for x86 and got this error: MODPOST vmlinux.o WARNING: modpost: Found 1 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o LD .tmp_vmlinux1 drivers/built-in.o: In function `pnp_register_irq_resource': /home/ribrdb/fiasco/src/l4linux/drivers/pnp/resource.c:70: undefined reference to `pcibios_penalize_isa_irq' make[1]: *** [.tmp_vmlinux1] Error 1 make: *** [sub-make] Error 2 Has anyone seen this before? Also I had a few questions about configuring l4linux: I see that the paravirtualization options are not supported. Is there a specific reason for this? I'd like to be able to use virtio devices from l4linux when running in a VM. Neither x86_64 or highmem is supported. Is there any way to run an l4 linux with more than 1G of memory? Can 32 bit l4linux run on a 64 bit fiasco kernel? Does 32 bit fiasco support more than 1G of physical memory? What would be involved if I wanted to port l4linux to x86_64? Thanks, and sorry for so many questions. Ryan Brown

2 1

Re: l4-hackers Digest, Vol 110, Issue 18
by Robert Campbell 24 Jun '12

24 Jun '12

> There's one thing to add, though: By running device drivers in dedicated > user-level processes, a crashing driver in the common case only takes > down its own process, but the rest of the system continues to run. > That's a major advantage, because you can have a monitoring process that > then restarts the driver [1] this way. > However, even a user space driver can still crash the system if it goes > rampant by misprogramming the DMA engine and you don't use an IOMMU. > Bjoern Are there plans to provide IOMMU support in Fiasco.OC?

2 1

Keeping track of the CPU time for a thread
by Mohammad A Haque 24 Jun '12

24 Jun '12

Hi, I want to measure how much CPU time a thread has consumed. When the CPU time consumption exceeds a certain limit (specific to that thread), I want to raise an interrupt. Please suggest me how can I do it efficiently? Thanks.

2 1

Re: l4linux GPU direct access
by Abhishek Gupta 21 Jun '12

21 Jun '12

Hi Adam, I was just trying to change the config file of l4linux to enable support for MTRRs because my Xserver log file had a warning (WW) System lacks support for changing MTRRs I was wondering why it is not allowed to enable to support for MTRRs? Below is the complete X.org log file: X.Org X Server 1.7.7 Release Date: 2010-05-04 X Protocol Version 11, Revision 0 Build Operating System: Linux 2.6.32.29-dsa-ia32 i686 Debian Current Operating System: Linux moarhost 3.0.0-l4-svn23 #72 SMP Thu Mar 8 18:05:24 CET 2012 i686 Kernel command line: mem=400M root=/dev/hda Build Date: 19 February 2011 02:37:36PM xorg-server 2:1.7.7-13 (Cyril Brulebois <kibi(a)debian.org>) Current version of pixman: 0.16.4 Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Thu Jan 1 00:00:27 1970 (==) Using system config directory "/usr/share/X11/xorg.conf.d" (==) No Layout section. Using the first Screen section. (==) No screen section available. Using defaults. (**) |-->Screen "Default Screen Section" (0) (**) | |-->Monitor "<default monitor>" (==) No monitor specified for screen "Default Screen Section". Using a default monitor configuration. (==) Automatically adding devices (==) Automatically enabling devices (WW) The directory "/usr/share/fonts/X11/misc" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/100dpi/" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/75dpi/" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/Type1" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/100dpi" does not exist. Entry deleted from font path. (WW) The directory "/usr/share/fonts/X11/75dpi" does not exist. Entry deleted from font path. (WW) The directory "/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType" does not exist. Entry deleted from font path. (==) FontPath set to: built-ins (==) ModulePath set to "/usr/lib/xorg/modules" (II) The server relies on udev to provide the list of input devices. If no devices become available, reconfigure udev or disable AutoAddDevices. (II) Loader magic: 0x81ecca0 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 6.0 X.Org XInput driver : 7.0 X.Org Server Extension : 2.0 (--) using VT number 7 (--) PCI:*(0:0:1:0) 1234:1111:1af4:1100 Technical Corp. rev 0, Mem @ 0xf0000000/16777216 (WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory) (II) LoadModule: "extmod" (II) Loading /usr/lib/xorg/modules/extensions/libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension SELinux (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib/xorg/modules/extensions/libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib/xorg/modules/extensions/libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (==) AIGLX enabled (II) Loading extension GLX (II) LoadModule: "record" (II) Loading /usr/lib/xorg/modules/extensions/librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension RECORD (II) LoadModule: "dri" (II) Loading /usr/lib/xorg/modules/extensions/libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension XFree86-DRI (II) LoadModule: "dri2" (II) Loading /usr/lib/xorg/modules/extensions/libdri2.so (II) Module dri2: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.1.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DRI2 (==) Matched vesa as autoconfigured driver 0 (==) Matched fbdev as autoconfigured driver 1 (==) Assigned the driver to the xf86ConfigLayout (II) LoadModule: "vesa" (II) Loading /usr/lib/xorg/modules/drivers/vesa_drv.so (II) Module vesa: vendor="X.Org Foundation" compiled for 1.7.7, module version = 2.3.0 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 6.0 (II) LoadModule: "fbdev" (II) Loading /usr/lib/xorg/modules/drivers/fbdev_drv.so (II) Module fbdev: vendor="X.Org Foundation" compiled for 1.7.6.901, module version = 0.4.2 ABI class: X.Org Video Driver, version 6.0 (II) VESA: driver for VESA chipsets: vesa (II) FBDEV: driver for framebuffer: fbdev (II) Primary Device is: PCI 00@00:01:0 (WW) Falling back to old probe method for fbdev (II) Loading sub module "fbdevhw" (II) LoadModule: "fbdevhw" (II) Loading /usr/lib/xorg/modules/linux/libfbdevhw.so (II) Module fbdevhw: vendor="X.Org Foundation" compiled for 1.7.7, module version = 0.0.2 ABI class: X.Org Video Driver, version 6.0 (II) Loading sub module "vbe" (II) LoadModule: "vbe" (II) Loading /usr/lib/xorg/modules/libvbe.so (II) Module vbe: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.1.0 ABI class: X.Org Video Driver, version 6.0 (II) Loading sub module "int10" (II) LoadModule: "int10" (II) Loading /usr/lib/xorg/modules/libint10.so (II) Module int10: vendor="X.Org Foundation" compiled for 1.7.7, module version = 1.0.0 ABI class: X.Org Video Driver, version 6.0 (II) VESA(0): initializing int10 (WW) System lacks support for changing MTRRs (II) VESA(0): Primary V_BIOS segment is: 0xc000

1 0

L4 Driver Security
by Tobias Fink 20 Jun '12

20 Jun '12

Hey List, me again with one (hopefully final) question. I'm learning about Driver Security in L4Re. I have some statements which I would like to have confirmed to understand the underlying principles: 1. L4 Drivers use DMA and are therefore able to write directly to the device memory and thus can cause crashes or damage if not carefully implemented. 2. While the L4Re Io-Server manages the access of drivers to the hardware's address spaces, it doesn't prevent drivers to write "bad" things into the device memory. 3. Untrusted, untested drivers can cause system crashes. best regards Tobi

2 2

Re: l4linux GPU direct access
by Abhishek Gupta 19 Jun '12

19 Jun '12

Hi Adam, Where can I add x86emu inside L4Linux to switch modes??

2 1

Re: L4Android on Pandaboard
by Matthias Lange 19 Jun '12

19 Jun '12

On 19.06.2012, at 15:49, ZhangEditing wrote: > android_bus => new System_bus() > { > sys => wrap(hw-root.sys); > prcm => wrap(hw-root.prcm); > sysdma => wrap(hw-root.sysdma); > gic => wrap(hw-root.gic); > hsmmc1 => wrap(hw-root.hsmmc1); > hsmmc2 => wrap(hw-root.hsmmc2); > hsmmc3 => wrap(hw-root.hsmmc3); > hsmmc4 => wrap(hw-root.hsmmc4); > hsmmc5 => wrap(hw-root.hsmmc5); > } The gic shouldn't be assigned to L4Android as it is driven by Fiasco. > In addition, I don't know how to assign registers that affect global configuration of the platform (e.g., the system control registers), although I don't think it is appropriate to assign such registers to only one OS. You can write a L4Re server which configures those registers. Then L4Android can access those registers via the server interface. Matthias. -- Dipl.-Inf. Matthias Lange <mlange(a)sec.t-labs.tu-berlin.de> Security in Telecommunications TU Berlin / Deutsche Telekom Laboratories Ernst-Reuter-Platz 7, 10587 Berlin Phone: +49 - 30 - 8353 58 553 Mobile: +49 - 160 - 587 28 07 Web: http://www.t-labs.tu-berlin.de/sect

1 0

Re: L4Android on Pandaboard
by Matthias Lange 19 Jun '12

19 Jun '12

On 18.06.2012, at 02:59, ZhangEditing wrote: > > You should have a look into the Pandaboard TRM and gather the right MMIO regions needed for MMC etc. Then connect those to the vbus for the L4Android kernel. > > I tried to do so, but L4Android recognizes only SDHCI. Maybe I still missed something. > Are there resources other than MMIO regions and IRQs that have to be configured for the I/O server? Probably you need some GPIO pins. Have a look into the Pandaboard TRM. Matthias. -- Dipl.-Inf. Matthias Lange <mlange(a)sec.t-labs.tu-berlin.de> Security in Telecommunications TU Berlin / Deutsche Telekom Laboratories Ernst-Reuter-Platz 7, 10587 Berlin Phone: +49 - 30 - 8353 58 553 Mobile: +49 - 160 - 587 28 07 Web: http://www.t-labs.tu-berlin.de/sect

1 0

Re: l4-hackers Digest, Vol 110, Issue 14
by Abhishek Gupta 18 Jun '12

18 Jun '12

Hi Adam, Where should I add x86emu inside L4Linux to switch modes??

1 0

L4Android on Pandaboard
by ZhangEditing 17 Jun '12

17 Jun '12

Hello, everyone! I'm new to L4Android and I'm interested in running L4Android on Pandaboard (OMAP4430). I tried to pack the system image of Android userland together with the kernel into a single U-image, but Pandaboard cannot finish loading the U-image. If the system image of Android userland is not included in the U-image, Pandaboard is able to load the U-image and boot the kernel. So I unpacked the system image to a separate partition on the SD card and I'm now trying to make L4Android use the partition. However, L4Android does not seem to recognize the entire SD card. There is no MMC devices under /dev/block. Instead, only 15 ram devices and 1 l4bdds device are there. I'm not sure whether L4Android has the right driver for SD card-related devices on Pandaboard. On the other hand, since I'm not familiar with Pandaboard, I don't know if I'm using the right device configuration (in the form of a .devs file) for the I/O server of L4Re. Could anyone help? Does anyone have a suitable .devs file for Pandaboard OMAP4430? Thank you in advance!

2 1

Re: l4linux GPU direct access
by Abhishek Gupta 16 Jun '12

16 Jun '12

Hi Adam, Thanks for your suggestion. We tried what you suggested and it worked. But that's not what we want. We want Graphics Acceleration and use vesa framebuffer. How can I make sure that int10 is passed to the l4linux by l4 and executes int10 module successfully.

2 1

adding libraries to L4/fiasco & L4re
by smkim 15 Jun '12

15 Jun '12

Hi hackers. I have questions about adding additional libraries for L4/fiasco & L4re. I tried to find some documents about it, but I failed. My question is Is there any guildlines which explains the process how to port additional libaries in L4/fiasco & L4re? If not, I hope you to suggest the way to solve it. What I wanna port is OpenCV. Best regards, Seongmin Kim.

2 1

IPC between Tasks
by Tobias Fink 15 Jun '12

15 Jun '12

Hi, I'm planning on building a small example of a producer/consumer build on top of L4Re. From the documentation I know about the shared memory inteface which will help to pass information from the producer to the consumer but I am a bit clueless on how I notify the consumer that there is something new to read. The semaphore is only to be used in between threads so there is no way to use them for IPC between Tasks?! Is there another possibility to make this work other than to use polling? regards Tobi

4 7

Connect two devices to vbus
by Pierre Larus 13 Jun '12

13 Jun '12

Hi, In my project, I have defined two io memory ressources as devices. I want connect these two devices to vbus. "io_bus.gpt2" is actually connected to vbus. But is it possible to also connect "io_bus.intc" to vbus ? local name = "l4rtos"; local DeviceFile = "beagle.devs" local IOFile = "beagle.io" local loader = L4.default_loader; local io_bus = { gpt2 = loader:new_channel(); intc = loader:new_channel(); }; loader:start({ caps = { gpt2 = io_bus.gpt2:svr(), intc = io_bus.intc:svr(), icu = L4.Env.icu, sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0), }, }, "rom/io rom/" .. DeviceFile .. " rom/" .. IOFile); loader:start( { caps = { vbus = io_bus.gpt2, icu = L4.Env.icu, log = L4.Env.log:m("rws"), }, }, "rom/" .. name); Regards, Pierre Larus

2 1

porting file system for L4/fiasco & L4re
by mkmaeng 13 Jun '12

13 Jun '12

Hello everyone. I have questions about using file system for L4/fiasco & L4re. I tried to convert applications using file I/O to L4 environment but I failed. So I realized that I need to use file system in L4/fiasco, but I couldn't find any documents about it. I have two questions. 1. How can I put root file system on L4/fiasco? Are there any references or documents that I can refer? 2. How can I verify whether file system is working or not. Are there any libraries for L4 to use file I/O? I hope you to suggest direction to solve this problems for me. Thank you very much. Best regards, Minkyu Maeng.

1 0

I have a question about l4linux
by Ednilson Ricardo 11 Jun '12

11 Jun '12

Hello, I would like to know what forms of input and output data L4Linux. thank you

3 6

porting file system for L4/fiasco & L4re
by mkmaeng 11 Jun '12

11 Jun '12

Hello everyone. I have questions about using file system for L4/fiasco & L4re. I tried to convert applications using file I/O to L4 environment but I failed. So I realized that I need to use file system in L4/fiasco, but I couldn't find any documents about it. I have two questions. 1. How can I put root file system on L4/fiasco? Are there any references or documents that I can refer? 2. How can I verify whether file system is working or not. Are there any libraries for L4 to use file I/O? I hope you to suggest direction to solve this problems for me. Thank you very much. Best regards, Minkyu Maeng.

2 1

l4 linux questions
by Ryan Brown 11 Jun '12

11 Jun '12

The l4 linux page doesn't have much information about the l4re version of l4 linux. How stable is it? What is the performance like? Is there any way to mount the l4re VFS inside linux? I was thinking perhaps I could mount it using 9p to an l4 server. But it looks like 9p needs tcp/ip. Is there a way I can use something like l4shmnet to talk to an l4 server instead of talking to another l4linux?

2 1

Hardware irq and vcpu entry
by Pierre Larus 11 Jun '12

11 Jun '12

Hi I am porting an RTOS on L4RE. The RTOS run in a l4_thread and I am currently trying to handle hardware timer irq. I would like to know if it is possible to attach an hardware irq (timer irq) to a vcpu entry ? I try to do this in a vpcu thread: vcpu_state->state = L4_VCPU_F_EXCEPTIONS | L4_VCPU_F_IRQ; vcpu_state->entry_ip = (l4_addr_t)&vcpu_entry; vcpu_state->user_task = L4_INVALID_CAP; InitClockDevice(); icucap = l4re_get_env_cap("icu"); irqcap = l4re_util_cap_alloc(); l4_factory_create_irq(l4re_global_env->factory, irqcap); l4_icu_bind(icucap, 38, irqcap); l4_irq_attach(irqcap, 0x38, current_thread_cap); StartUpMain(); But this solution does not work. The thread vcpu support works because when I use the l4_irq_trigger() function the irq are catched by the vcpu entry. The irq attach also works because I can handle hardware interrupt using a dedicated thread: icucap = l4re_get_env_cap("icu"); irqcap = l4re_util_cap_alloc(); l4_factory_create_irq(l4re_global_env->factory, irqcap); l4_icu_bind(icucap, 38, irqcap); l4_irq_attach(irqcap, 0x38, current_thread_cap); while (1) { l4_irq_receive(irqcap, L4_IPC_NEVER); isr_handler(); } Regards, Pierre LARUS

2 1

l4linux GPU direct access
by Abhishek Gupta 07 Jun '12

07 Jun '12

Hi, I was trying to run xserver on l4linux using vesa frame buffer (l4 is running on kvm) and virtual machine hangs and it seems that a infinite loop is started which is continuously try to do something but doesn't succeed. When I tried to debug it using gdb, it displays 0xb6ee9b28 in SetResetBIOSVars (pInt=0x820f5a0, set=<value optimized out>) at ../../../../hw/xfree86/int10/helper_exec.c:686 this code is from the xserver 1.7.7 static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set) { int pagesize = getpagesize(); unsigned char* base = xf86MapVidMem(pInt->scrnIndex, VIDMEM_MMIO, 0, pagesize); int i; if (set) { for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++) MEM_WW(pInt, i, *(base + i)); } else { for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++) /*line 685*/ *(base + i) = MEM_RW(pInt, i); /*line 686*/ //This line of code is not working } xf86UnMapVidMem(pInt->scrnIndex,base,pagesize); } The value of base becomes 0 after xf86MapVidMem func is called. So my Guess is that this func is failing and returning NULL but I am not able to figure out why Also I read in previous years mailing list that Linux tries to execute int10 to set the VESA mode but L4 applications are not allowed to execute real-mode code. Does this have anything to do with my problem?? How can I fix this problem? Also, Is there a way to allow L4 applications to execute code in real mode and then switch back? May be add some code to L4 to allow applications to execute code in real mode and then switch back. Abhishek Gupta Indian School of Mines

2 1

Fiasco.OC: sigma0 stucks in ipc-path
by Stefan kalkowski 07 Jun '12

07 Jun '12

Dear kernel-hackers, I think I came along a problem in the IPC-path of Fiasco.OC sometimes in the past, but it was somehow hard to reproduce. But now I've an example that quite reliable triggers the issue. The symptom in the past, and in the concrete example was that our roottask in Genode (called core) was requesting memory from sigma0, either implicitly just by touching some memory-area, like a ROM-module loaded by the bootloader, or explicitly by using the sigma0-protocol, e.g. to request I/O memory for the framebuffer. After that the request was received by sigma0, and also processed, but the answer never reached the faulter/client in this case the core-pager thread. The typical picture in the kernel-debugger then looks like the following: http://pastebin.com/cFvn1NV2 sigma0 is marked as ready, but it still stucks in the ipc-syscall. By instrumenting the kernel I could break down the point where sigma0 never returns. It is when trying to establishing the actual mapping in 'Thread::transfer_msg_items' in file src/kern/thread-ipc.cc. The spot is the following: ``` cpu_lock.clear(); L4_error err = fpage_map(snd->space(), sfp, rcv->space(), L4_fpage(buf->d), item->b, &rl); cpu_lock.lock(); ``` After the cpu lock is given away, sigma0 never aquires it back successfully. It looks to me like a race-condition, nevertheless simply letting the lock being locked doesn't solved the problem ;-). Maybe given your insight knowledge, you're much faster in tracking the problem down to its root? I've to add, that the problem occurred on x86 as well as ARM, on different QEMU versions, as well as real hardware. I also could reproduce it with slightly older versions of Fiasco.OC, and in different development stages of Genode. Nevertheless, it was never that reliable to reproduce. The current example which reproduces it reliable at least with my QEMU (qemu-kvm-0.14.0) version. You can find in form of an ISO-image here: http://dl.dropbox.com/u/82567292/avplay.iso You can try the iso-image like the following: qemu -no-kvm -m 256 -soundhw all -serial mon:stdio -cdrom avplay.iso Or, if you've to build it on your own, here is my topic branch, including the avplay run-script that triggers the problem: https://github.com/skalk/genode/tree/fiasco.oc-ipc-issue To compile and run it yourself you've to do the following steps (after installing the genode toolchain from http://genode.org/download/tool-chain): git clone git@github.com:skalk/genode.git cd genode git checkout -b issue origin/fiasco.oc-ipc-issue git clone git@github.com:genodelabs/linux_drivers.git make -C base-foc prepare make -C libports prepare PKG="libav libc sdl zlib" tool/create_builddir foc_x86_32 BUILD_DIR=build sed -i "/#REPOSITORIES.*libports/s/#//" build/etc/build.conf sed -i "/#REPOSITORIES.*linux_drivers/s/#//" build/etc/build.conf make -C build run/avplay Thank you in advance & best regards! Stefan

4 7

[l4ankh] Problems with fixed l4ankh
by Timur 03 Jun '12

03 Jun '12

Hi! I had fixed the l4ankh driver and after that it started to work properly. Now only thread is used to receive packets. In lines 158-162 we clear the rcv buffer: that is necessary to be done as after opening a session we start to receive packets that should not be served; otherwise the response time will be quite slow. This is not the best solution, but I do not have time to make it better. Now I face the following problem: the driver in ankh (I use 8139cp) stops receiving packets after some time (for me it is usually 3-4 minutes). This situation occurs when the interrupt handler was called and the device register IntrStatus already equals "zero". An interrupt doesn't work after that. -- Galiullin Timur

3 5

I have a question about L4Linux
by Ednilson Ricardo 03 Jun '12

03 Jun '12

Hello, I have some doubts about the L4Linux, can you help me? *** What are the purposes of L4Linux?Hardware subjaecnte that OS (capacity and types of memory, processor, bus, etc.).*** With this operating system can work? What capacity and type of hardware it runs? What is the architecture that it needs to function? the type of memory itworks? processors that it works, buses, and everything involved in the operating system. What it needs hardware to run? What type of application it serves?Interaticas, batch, real-time, etc..*** What are the characteristics related to the accomplishment of the application,low response time, low turnaround time, etc.. (View aqielas applications, which it meets the requirements) as it meets these requirements? -> It is otimisado,blibioterca specific uses, he uses some dynamic code that allows it meets these requirements, then how it will work.*** What is your architecture? (Monolithic? Layered? Micro-kernel virtual machineor some other system) PREFERENCE TO EXPLAIN AND THE GREATERLEVEL POSSIBLE to detail.*** If the operating system is not supposed or threads (the core of User, hybrid?)And how the theads are implemented in the OS (if it meets it has a mechanism forimplementation (How it was implemented)

2 4

Debugging l4linux + l4re
by Haohui Mai 03 Jun '12

03 Jun '12

Hi folks, I'm running mag + L4Linux on a real machine that doesn't have a serial port. It's really difficult to debug -- I'm wondering if there're any ways to open a new window under mag, and to redirect all serial port I/O to that window? It would be really helpful for debugging. I appreciate if anyone could share if he happens wrote this program before, or giving me some suggestions. Your help is appreciated! ~Haohui

2 1

Ankh network
by Johan Dams 31 May '12

31 May '12

Hi. I've noticed that when sending more than one pbuf in low_level_output() that each pbuf gets sent individually over the network and is being treated as individual packets. I 'fixed' this problem by copying the different pbufs into one buffer and sending this buffer in one go (basically as a test to verify the issue). I guess the problem has to do with how l4ankh_send() calls l4shmc_rb_sender_commit_packet() after each pbuf instead of waiting until all pbufs of the packet in question are passed on with l4shmc_rb_sender_next_copy_in(). Best regards, Johan

1 0

PowerPC support
by G S Madhusudan 31 May '12

31 May '12

This is in reply to Oliver Horst's posting on PPC support. I am running a research program to develop variants of L4 for use in India at IIT-Madras. http://www.iitm.ac.in/ Our target platforms are Freescale QorIQ processors (P2041, P4080 and T4240 - with hypervisor support) and Cortex A9 processors. We will initially use std dev boards but we are also developing our own custom HW. As someone pointed out it helps if someone has knowledge of PPC and kernels. I have been hacking open source kernels since 1985 ! (BSD 4.x) and have been working on PPC development since 1998, so while I do not underestimate the task it can be done. We also have access to Freescale's processor architecture team so that helps a bit. The project goal is actually ambitious since we want to replace Linux in security sensitive installations. I lead a Mach 3.0 based effort in the 90s along with IBM research and I am all too painfully aware of how uKernel based projects can fail ! I am also coordinating a processor development effort and Fiasco+ Genode combination will also be ported on to that processor. But it is a specialized custom processor so I suspect no one else other than my team be interested in that port. But one aspect of teh processor is aimed at improving the MMU so that the cost of context switches can be improved. If you cannot fix the OS, just fix the CPU ! Any thoughts on this aspect are welcome. On top of Fiasco we are developing UTM + router type appliances. Later we plan to port the Drizzle RDBMS. We would be glad to work with anyone with similar goals. Currently it is a 4 member team along with 7 MTech students doing projects on various aspects of this research. We also have access to sufficient P2041 and p4080 boards. Once our boards are ready (the 2041 boards i being PCB routed now), we plan to create an engineering curriculum using this HW and focusing on secure systems and uKernel OSs. the plan is to offer it to Indian engineering schools but anyone can use it. Regards G S Madhusudan

1 0

Using pthread on L4/Fiasco
by 석현철 23 May '12

23 May '12

Thank you. I made a stupid mistake. When I added “REQUIRES_LIBS = libpthread” into Makefile, I modified three Makefiles. There are hello/Makefile, hello/server/Makefile, and hello/server/src/Makefile. I tested one by one. But I found I made a mistake. At last try, I wrote REQUIRES = libpthread instead of REQUIRES_LIBS = libpthread on hello/server/src/Makefile. After correcting my mistake, I can test pthread application. Thank you! Marcus Hyunchul Seok.

1 0

Using pthread on L4/Fiasco
by 석현철 23 May '12

23 May '12

Hi. Hackers I’m trying to use pthread in an application which runs on L4. I modified “main.c” in Hello application, including “#include <pthread.h>”. And when I compiled L4Re, I got error messages: main.o: In function `main': /root/l4re-core-2011081207/src/l4/pkg/hello/server/src/main.c:39: undefined reference to `pthread_create' /root/l4re-core-2011081207/src/l4/pkg/hello/server/src/main.c:44: undefined reference to `pthread_join' make[5]: *** [hello] Error 1 I think this is because it cannot fine pthread.h header file. But I don’t know how to fix it. When I looked up previous lists, I could find one thread related to pthread in 2011 list. (the thread title is “Silly Pthread Issues”) I think that it is the same problem, but the reply is only one. Said “Add REQUIRES_LIBS = libpthread to the Makefile.” Actually, I tried it, but I couldn’t solve the problem. How can I use the pthread? Please, Help me!! Thank you! Hyunchul Seok The modified code is below: #include <stdio.h> #include <unistd.h> //#include <pthread-l4.h> #include <pthread.h> void *process_test(void *arg) { int i = (int)arg; int j; for (;;) { for (j = 0; j < i; j++) { printf(" "); } printf("%d thread\n", i); sleep(i); } } int main(void) { pthread_t threads[10]; int status[10]; int i; for (i = 0; i < 3; i++) { pthread_create(&threads[i], NULL, process_test, (void *)i); puts("New thread creation!"); } for (i = 0; i < 3; i++) { pthread_join(threads[i], (void **)&status[i]); } return 0; }

2 1

[Announcement] Karma VMM first public release
by Matthias Lange 18 May '12

18 May '12

We are happy to announce the first public release of the Karma Virtual Machine Monitor [0]. Karma is a virtual machine monitor (VMM) that runs Linux in a virtual machine on top of the Fiasco.OC [1] microkernel. Its main design directives are speed and simplicity. Unlike KVM, VirtualBox or VMWare, Karma does no emulation, but resorts to aggressive paravirtualization and therefore has low complexity and shows superior performance for a number of benchmarks. Karma requires hardware assisted CPU virtualization. A feature that is available on all recent x86 CPUs (SVM or VT). Optionally, it can make use of hardware assisted memory virtualization (Nested Paging or ePT), if available. The Karma VMM is currently being used as a research vehicle at Technische Universität Berlin and Technische Universität Dresden. It main features are: - Trustworthy isolation of virtual machines by means of the microkernel. VMM compromise does no harm to other virtual machines as one instance of Karma runs exactly one virtual machine. - Clean, tiny code base, less than 9000 source lines of code. - Near native (guest)-Linux performance. - Supports: * SMP * Networking * Direct harddisk access via AHCI * RTC and Hpet support Karma is released under the terms of the Gnu General Public License Version 2. [0] http://karma-vmm.org [1] http://os.int.tu-dresden.de/fiasco [2] http://www.isti.tu-berlin.de/security_in_telecommunications [3] http://os.inf.tu-dresden.de -- Dipl.-Inf. Matthias Lange <mlange(a)sec.t-labs.tu-berlin.de> Security in Telecommunications TU Berlin / Telekom Innovation Laboratories Ernst-Reuter-Platz 7, 10587 Berlin Phone: +49 - 30 - 8353 58 553 Mobile: +49 - 160 - 587 28 07 Web: http://www.t-labs.tu-berlin.de/sect

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Booting L4/Fiasco + L4Re on PC
by 석현철 16 May '12

16 May '12

Hello. I’ve tried to boot L4/Fiasco on PC. I followed the directions for building from both “http://os.inf.tu-dresden. de/fiasco/build.html” and “http://os.inf.tu-dresden.de/L4Re/build.html” And I could run L4/Fiasco on QEMU. Now I hope I want to boot L4 on PC environment. As I searched, it can be done through GRUB. (But, I am not convinced that it is right way.) Anyway, I’ve tried to boot L4 by using GRUB. I use Ubuntu Linux for compiling L4/Fiasco and L4Re. In this, there is GRUBv2. I made the bootable ISO image. (It is done by “make grub2iso E=hello MODULE_SEARCH_PATH={mypath}”) And then, what should I do in order to boot L4 on PC? How should I configure the GRUB configuration? I really want to know how to boot L4 on PC. Please, help me! Kind Regards, Hyunchul Seok.

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Re: understanding l4re
by Björn Döbel 15 May '12

15 May '12

Hi, On 14.05.2012 18:13, Ryan Brown wrote: > Thank you for your answers, they were very helpful. Now I have some more > questions: > > Are any of these documents relevant to, or helpful in working with > Fiasco.OC? http://l4hq.org/docs/manuals/ No. These docs don't describe the Fiasco.OC API (although many of the concepts are shared). The relevant documentation for Fiasco and the L4 Runtime Environment is at https://os.inf.tu-dresden.de/L4Re/doc/ (yes, that's all for now - if you have any questions, please ask and we're glad to help). There's also a Wiki: http://wiki.tudos.org/Main_Page > Is there a limit on how many threads you can create with pthreads? As in any other system, pthread_create() returns -EAGAIN if there are insufficient system resources to create another thread. This may happen, if the lib is not able to allocate a stack or TLS area for the thread or in the Fiasco.OC case if there are insufficient kernel resources. > How does thread scheduling work? As a policy this should be implemented > in user space, right? Actually, scheduling is the only policy that is implemented in the kernel and as far as I know most L4 variants do this, although there have been experiments to do it in user space. [1] > Does pthreads take care of this? I see that it > handles resuming the highest priority waiting thread for example when > unlocking a mutex. But what if more threads are runnable than the number > of cores? Fiasco.OC schedules threads based on their priorities. (Same priority leads to round-robbin scheduling.) There are separate run queues for every physical CPU and you have to explicitly bind a thread to a physical core. > Are shared libraries supported? Yes. There is a port of ldso in l4/pkg, most libs are built as shared variants as well. There's even an example for starting a version of the hello example with shared libraries: * First check out L4Re as documented on the web page. * Then go to l4/pkg and do $> svn up examples/ * Then build examples/misc/shared-hello * In l4/conf/modules.list there is an example entry "hello-shared" that should get you set up. > Actually, I think I saw that fork/exec, etc were stubs. These may be stubs in the C library, but there are no implementations of fork/exec for L4Re. (Although, this would be possible.) > I believe I've seen L4 apis for creating new address > spaces, but what about loading an executable into the address space? This is done by an ELF loader. The default loaders are moe (for the first binary) and ned (the Lua-based init program). You can also write your own and use the functionality provided by l4/pkg/libloader. > I suppose I should take more of a look at moe and ned to understand this. Indeed. ;) > How does the L4re logger get initialized and connected to the serial > console? When being started, an L4Re application gets an initial set of capabilities (== communication channels). These are the initially available services and one of them is the Log channel which by default provides stdout and stderr for your application. The default log implementation is provided by the kernel who has a serial console driver built in (debugging...). > I see some code inside bootstrap for initializing the uart, is > this where it happens? This is the first place where this happens. Bootstrap is a bit weirdly placed in l4/pkg. Actually, it is the "kernel" that is initially booted for every L4 setup. It sets up a multiboot environment and then hands over control to Fiasco, which then is the real kernel to run. As the Fiasco codebase is separate from the L4Re code base, you'll find another UART driver in Fiasco as well. Yep, that's redundant. > Thanks for the help, and sorry for so many questions. No worries. May I ask if you have any special project in mind? Cheers, Bjoern [1] J. Stoess: Towards Effective User-Controlled Scheduling for Microkernel-Based Systems, SIGOPS OSR, July 2007

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Source of KVM-L4 ?
by Rolf Sommerhalder 14 May '12

14 May '12

Hello list, Is there any source code available of "KVM-L4", e.g. KVM which has been ported to L4Linux? There are some publications from TU Dresden which report about this successful port as KVM-L4. Is its source code available at all, or is it just hiding from search engines in some public repository or archive? Thanks, Rolf

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Fiasco.OC on Cortex-A9
by Johan Dams 12 May '12

12 May '12

Hi all, I'm wondering if anyone has come across an issue with Fiasco.OC on Cortex-A9 based systems. The problem is that I do not get past this instruction (and with that I mean that the system just locks up): "mcr p15, 0, %[control], c1, c0 \n" // control in src/kern/arm/bootstrap.cpp. The exact same code works fine on a Cortex-A8 based processor. Changing cache on or off (in the control variable) does not change anything. Also, just reading the current content of the register and writing it back locks the system. I have been going over compiler flags, tried different compilers altogether (using 4.5.3-r1 right now), and looked if something odd was going on with the generated assembly code, etc. with no results. This code is a standard ARM instruction, and comes well before any paging or even the actual kernel starts. The SOC in question is a Freescale i.MX6 Quad core Cortex A9, which I realize not many have actually used yet. However, if similar issues presented itself on other platforms, these might give some clues. Any ideas? Best regards, Johan

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understanding l4re
by Ryan Brown 11 May '12

11 May '12

Hi. I'm exploring developing software that runs on Fiasco.OC/L4re, so I'm trying to understand how the various pieces fit together. If I'm following the makefiles correctly it looks like some uclibc files (like libc/inet) are getting compiled, but they seem to be making linux system calls. I also see the libc_backends code, and I'm not sure how this fits in. It looks like these are mostly stubs, is it expected that you'll link the final binary with the real implementation you want? I also took a look at libpthreads, and I don't see much l4 specific code. It looks like mutexes are implemented as spinlocks? Isn't there a better way to do synchronization in fiasco?

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[ankh+l4linux] Doesn't work
by Timur 03 May '12

03 May '12

Hi, after ifconfig eth0 up l4linux crashes with errors: -------------------------- l4lx_irq_dev_startup: creating IRQ thread for 66 (IRQ-cap 42d000) l4lx_irq_dev_startup: creating IRQ thread for 66 (IRQ-cap 42d000) l4linux | l4lx_thread_create: Created thread 433 (IRQ66) (u:b3000e00, sp:006c9ff4) l4linux | irq_thread: Started IRQ thread for IRQ 66 l4linux | wait_for_irq_message: IRQ 66 (42d) receive failed, error = 0x4 ------------------------ l4_is_invalid_cap(p->irq_cap) return false in wait_for_irq_message, but l4_irq_wait_u(p->irq_cap, &src_id, L4_IPC_NEVER, utcb) return L4_IPC_ENOT_EXISTENT. How can this be? -- Galiullin Timur

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Re: Running Fiasco.OC in Bochs
by Norman Feske 01 May '12

01 May '12

Hello Julius, > I am successfully running Fiasco.OC on Bochs (2.4.6) with PCI emulation > enabled (although all my slots are empty). I had encountered the same > double fault issue and discovered that I could work around it by > configuring Fiasco to use RTC scheduling (instead of PIT). APIC seems to > work fine, too. thank you for this excellent suggestion! By using RTC as scheduling timer and re-enabling PCI, I was able to bring the whole scenario (including the GUI) to life. Cheers Norman

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Re: Fwd: Running Fiasco.OC in Bochs
by Martin Unzner 29 Apr '12

29 Apr '12

Hi Norman, Björn told me about your problem because I write my Belegarbeit using a Framework which includes Bochs. I was not able to reproduce your exact error, but since I have experienced faults at the same stage of booting when I started with Bochs, my workaround might at least be worth a try. Using your setup, my Bochs instance hung up instead of reporting a double fault, but then again, everything worked when I disabled the PCI bridge. So maybe pci: enabled=0 in bochsrc or even omitting the --enable-pci parameter while configuring might help in your case. In general, I experienced that compiling Bochs with less configuration parameters usually produces a better emulator. Regards, Martin Am 29.04.2012 08:36, schrieb Björn Döbel: > Hi, > > Kannst Du dem Norman helfen? > > Björn > > -------- Original-Nachricht -------- > Betreff: Running Fiasco.OC in Bochs > Datum: Sat, 28 Apr 2012 21:14:37 +0200 > Von: Norman Feske<norman.feske(a)genode-labs.com> > An: l4-hackers(a)os.inf.tu-dresden.de > > Hello, > > for tracing/profiling purposes, I'd like to run Genode on Fiasco.OC in > Bochs. My prior attempts with the OKL4 and Pistachio kernels went fine. > However, when booting the setup with Fiasco.OC, I get the following > kernel message right at the start: > > Freeing init code/data: 28672 bytes (7 pages) > > DOUBLE FAULT! > EAX=ec7ff000 ESI=00000000 DS=0023 > EBX=fcdcf000 EDI=fcdcf170 ES=0023 > ECX=ec7ff000 EBP=f0060100 GS=0043 > EDX=ec7ff000 ESP=fcdcffbc SS=0010 ESP0=00000000 > EFL=00200246 EIP=f006592c CS=0008 > Return reboots, "k" tries to enter the L4 kernel debugger... > > Has anyone successfully used Fiasco.OC with Bochs before? If yes, I > would very much appreciate a known-good starting point for experimentation. > > For reference, I am using the following kernel configuration: > > > https://raw.github.com/genodelabs/genode/master/base-foc/config/x86_32.kern… > > My 'bochsrc' file looks as follows: > > display_library: x > romimage: file=/usr/local/share/bochs/BIOS-bochs-latest > megs: 128 > com1: enabled=1, mode=file, dev=serial.out > boot: cdrom > ata0-master: type=cdrom, path=var/run/demo.iso, status=inserted > mouse: enabled=1, type=imps2 > log: ./bochs.out > panic: action=fatal > vgaromimage: file=/usr/local/share/bochs/VGABIOS-lgpl-latest > vga: extension=vbe > pci: enabled=1, chipset=i440fx, slot1=pcivga > > The Bochs version is the official release 2.5.1 configured with the > following arguments: > > --with-x11 --enable-plugins --enable-pci --enable-clgd54xx > > Regards > Norman >

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Running Fiasco.OC in Bochs
by Norman Feske 28 Apr '12

28 Apr '12

Hello, for tracing/profiling purposes, I'd like to run Genode on Fiasco.OC in Bochs. My prior attempts with the OKL4 and Pistachio kernels went fine. However, when booting the setup with Fiasco.OC, I get the following kernel message right at the start: Freeing init code/data: 28672 bytes (7 pages) DOUBLE FAULT! EAX=ec7ff000 ESI=00000000 DS=0023 EBX=fcdcf000 EDI=fcdcf170 ES=0023 ECX=ec7ff000 EBP=f0060100 GS=0043 EDX=ec7ff000 ESP=fcdcffbc SS=0010 ESP0=00000000 EFL=00200246 EIP=f006592c CS=0008 Return reboots, "k" tries to enter the L4 kernel debugger... Has anyone successfully used Fiasco.OC with Bochs before? If yes, I would very much appreciate a known-good starting point for experimentation. For reference, I am using the following kernel configuration: https://raw.github.com/genodelabs/genode/master/base-foc/config/x86_32.kern… My 'bochsrc' file looks as follows: display_library: x romimage: file=/usr/local/share/bochs/BIOS-bochs-latest megs: 128 com1: enabled=1, mode=file, dev=serial.out boot: cdrom ata0-master: type=cdrom, path=var/run/demo.iso, status=inserted mouse: enabled=1, type=imps2 log: ./bochs.out panic: action=fatal vgaromimage: file=/usr/local/share/bochs/VGABIOS-lgpl-latest vga: extension=vbe pci: enabled=1, chipset=i440fx, slot1=pcivga The Bochs version is the official release 2.5.1 configured with the following arguments: --with-x11 --enable-plugins --enable-pci --enable-clgd54xx Regards Norman -- Dr.-Ing. Norman Feske Genode Labs http://www.genode-labs.com · http://genode.org Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

1 0

Performance of l4_task_unmap call
by Chen Tian 26 Apr '12

26 Apr '12

Hi, I did a small test: a parent task first maps and then unmaps a page to its child. Both parent and child task are running on the same core. I found the execution is very slow and 99% time are spent on l4_task_unmap( L4_FP_OTHER_SPACES flag is used). After some investigation, I found the flag "need_xcpu_tlb_flush" in map_util.cpp:766 is set to true. My guess is that this flag controls the tlb of the cpu at which the child task is running. However, in my case, both tasks are running on the same core, setting this flag can have huge negative impact on performance. I am thinking to put a check before this statement: if (current_cpu() != space's CPU) set the flag to true. Is this correct? If so, how to get space's cpu? space->cpu() ? Thanks for the help. Chen

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Bootfs got overwritten
by Haohui Mai 26 Apr '12

26 Apr '12

Hi, I'm encountering a problem where the memory region of BOOTFS of L4Re got overwritten. Interestingly, the page is overwritten by things in the bootfs. Here are the physical memory mapping set up by BOOTFS: ... BOOTFS: [2227000-23297b8] [C:506000] rtc BOOTFS: [232a000-26d5411] [C:507000] mag BOOTFS: [26d6000-2848a94] [C:508000] fb-drv BOOTFS: [129d000-129daa4] [C:509000] vandroid-x86.cfg BOOTFS: [126b000-126b3b7] [C:50a000] x86-legacy.devs … The page 0x2239000 (which belongs to rtc) is magically overwritten by the first page of x86-legacy.devs. I confirmed it with both JDB and QEMU monitor. I'm running the newest snapshot of L4Re / L4Android on top of the UP version L4.Fiasco kernel. What would be the best approach to debug the problem? is it there a way to mark the whole BOOTFS as read-only so that I can figure out what's going on? Thanks! ~Haohui

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Re: Fiasco.OC development status
by Robert Campbell 24 Apr '12

24 Apr '12

I'm interested in userland changes and possible ports of libraries and frameworks. I'll definitely be focusing on the Fiasco.OC kernel. However, I'm at a crossroads with choosing the userland i.e whether to go with L4Re or Genode. IIRC, the port of Qt to L4Re or L4Env was version 3.x. Genode has a port of Qt 4.7.x. Genode has taken their development public So I am able to watch their activity. However, with L4Re I'm not sure what to expect in new releases bar what the publications might imply. If you are able to provide information on possible ports and update to existing ports then that would aid my decision and I would appreciate it. P.S

1 0

L4Android and L4Linux parallel on an i.MX53
by Tobias Fink 22 Apr '12

22 Apr '12

Hello List, for my bachelor project I'm trying to run Android and Linux parallel on an i.MX53 Board. While the first approach with KVM seemed not to be the right way to go L4 looks promising. While I found many interesting and helpful topics in this list I still have some questions. I tried to first build the "Hello World" example which worked fine but failed in building other examples because of not fulfilled dependencies (first to note io). I already checked out "l4linux_requirements". What else do I need? The board is a custom board with very little documentation. I have some Linux drivers for the connected hardware. Is it possible to use them with L4Linux or would I have to get/write drivers for L4 itself? Sorry about these very basic questions. I've just started working with L4. Regards Tobi

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Windows in QEMU on KVM-L4
by Rolf Sommerhalder 22 Apr '12

22 Apr '12

Hi, In their paper [1], the authors mention that they were able to run 32-bit versions of Windows XP and 7, among other guest OSes, in KVM-L4 on AMD x86 processors with AMD-V extensions. Does anyone from the list happen to have an .iso around which boots on such an AMD machine and demonstrates the performance of Windows (any version will do) running in KVM-L4? Alternatively, I would be grateful for any recipe how to adapt a demo CD or Fisco.OC/L4Re build environment so that it allows to start a Windows image in QEMU/KVM on L4. So far, I have managed to install and to run Windows 7 Pro in a QEMU/KVM image on my Linux host. As this image is over 4 GByte by itself, plus QEMU with its dependencies, there is no way of just extending the ramdisk image in order to load and run it in L4Linux. After searching this list, I so far found two possible ways to proceed: a) Extended the ramdisk so that it mounts a disk partition /dev/hdaX, and then chroot to that mounted partition. Then try to launch the QEMU image from that new root. However, a previous poster here ran into a problem while trying this, and it is unclear to me if was able to overcome it [2]. b) Abandon the ramdisk and have L4Linux mount a disk partition as its root file system directly upon boot. This was tried in 2006 and it is unclear if it finally worked [3]. In both cases, I presume that the binaries in that partition (QEMU and its dependencies) must match the version of the L4Linux kernel (which is 3.0). My Linux build environment uses Ubuntu 10.04 LTS (which uses kernel 2.6.x). My only interest at this early stage of a quick Proof of Concept is just to get a feeling if a faithfully virtualised Windows run on top of KVM-L4 still performs reasonably well on a recent (Business-) PC, so that it is still acceptable to the average user. Previous results published suggested that real-world Linux applications incur (only) a 4..5% overhead when run on top of L4Linux, compared to running them natively on (bare metal) Linux. Now I would like to know if this surprisingly low overhead also continues throughout KVM-L4 with Windows as one of its "applications". Thanks in advance for any hints, Rolf [1] Virtual Machines Jailed - Virtualization in Systems with Small Trusted Computing Bases Michael Peter, Henning Schild, Adam Lackorzynski, Alexander Warg VTDS'09: Workshop on Virtualization Technology for Dependable Systems (Eurosys 2009 affiliated workshop) , March 2009 http://os.inf.tu-dresden.de/papers_ps/peterschild09_vtds_virtual_machines_j… [2] Using hard disk as root filesystem http://www.mail-archive.com/l4-hackers@os.inf.tu-dresden.de/msg00851.html [3] Booting L4Linux/Fiasco with root=/dev/hda http://os.inf.tu-dresden.de/pipermail/l4-hackers/2006/002396.html

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l4_task_cap_equal broken?
by Stefan kalkowski 20 Apr '12

20 Apr '12

Dear Fiasco.OC developers, while working with Genode on top of Fiasco.OC, I've encountered the following problem. When I transfer ipc-gates via ipc between tasks, it comes to the point where a task receives a gate it already owns. These duplicates are detected due to an additional identifier that is transfered together with the gate. To detect fraud (whether somebody has send an invalid gate/id combination) the received gate gets compared with the locally available one via "l4_task_cap_equal". Now, the problem is "l4_task_cap_equal" often fails even when both capabilities point to the same ipc-gate. The following code-snippet demonstrates this issue: ... tag = l4_task_cap_equal(L4_BASE_TASK_CAP, i->kcap(), rcv_cap); if (!l4_msgtag_label(tag)) { unsigned long id1 = l4_debugger_global_id(i->kcap()), id2 = l4_debugger_global_id(rcv_cap); printf("my_cap=%lx (id=%lx) rcv_cap=%lx (id=%lx)", i->kcap(), id1, rcv_cap, id2); if (id1 == id2) enter_kdebug("FAIL"); } ... This snippet is executed after a thread in the roottask received from another thread of the same task a capability via IPC. Thereby rcv_cap is the cap that was received via ipc and i->kcap() is the cap that was retrieved via the additional transfered identifier. When executed I get the following output: ... my_cap=20f000 (id=12) rcv_cap=205000 (id=12) --------------------------------------------------------------------- CPU 0 [00145e81]: FAIL [ entrypoint] jdb: The debugger's global id (here: 12) indicates that both capabilities reference the same object. Nevertheless, the equality test fails. Can you confirm that this is undesired syscall's behaviour, or do I miss something important? The attached kernel patch fixes the problem for me, but may introduce other problems (e.g.: not sure whether obj() returns always valid pointers). Regards Stefan

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Fiasco.OC development status
by QiuYi 19 Apr '12

19 Apr '12

> On 10.04.2012 07:20, Robert Campbell wrote: >> Thank you Bjoern. >> Any idea when new release will be made and what changes and improvements to >> expect? > Unfortunately, there is no more specific answer than: There will be a > new release soon (maybe this summer). No major new features, but all > components will have undergone further developments & fixes. > Are there any features you are interested in specifically and that you > are missing from or cannot find in the current release? > Bjoern I am interested in the drivers of touchscreen, keypad and NANDflash on the beagleboard at the L4RE and L4linux. qiuy.

1 0

FPU state management in L4Fiasco.OC program
by Mai, Haohui 18 Apr '12

18 Apr '12

Hi, I'm writing a new OS kernel atop of L4Fiasco.OC. I'm having some difficulties to let my OS support user-level processes that uses floating-point instruction. So far, My OS closely follows L4Linux, it creates a new task for each user-level process, and marks as all threads of the task as alien thread to capture all page faults and exceptions. My OS works fines with page fault and syscalls. However, I'm confused with what I should do with floating-point exception (exception #7), which is issued to my kernel at the first time it tries to perform floating-point arithmetic. I tried to return to the user-level process with an empty message ( l4_msgtag_t tag = l4_msgtag(0, 0, 0, 0) ), or an empty message with L4_MSGTAG_TRANSFER_FPU (l4_msgtag_t tag = l4_msgtag(0, 0, 0, L4_MSGTAG_TRANSFER_FPU) ), but I had no luck. The user-level process immediately calls "int $0x3" and stops. I read through L4Linux's code and it seems it's doing similar thing, except that it did initialize the FPU state before asking L4 to transfer the FPU state to user-level process. Am I missing something? What's the recommend way of doing it? Your comments are highly appreciated. ~Haohui

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shmc/l4shmnet improvements
by Stefan Fritsch 17 Apr '12

17 Apr '12

Hi, the attached shmc.diff fixes many bugs in shmc and adds some new functionality. l4shmnet.diff then uses this to implement a protocol that does not require one end to wait for the other end during boot, and that allows to set the link state up and down. The old protocol is still supported. The changes may be used under the MIT license (which is included in the include/shmbuf.h file. You can find the detailed changelog for shmc.diff below. The diff is on top of the diff I have sent in November. Cheers, Stefan Add include/shmbuf.h which implements the l4shmnet packet protocol, to be used by l4linux and others. include/shmc.h: - l4shmc_iterate_chunk(): New function to iterate over all chunk names - l4shmc_chunk_size(): change return value to allow returning an error - l4shmc_area_size_free(): New function to get remaining free space - l4shmc_area_overhead(): New function to get overhead not usable by chunks - l4shmc_chunk_overhead(): New function to get size overhead per chunk include/types.h: - Make l4shmc_chunk_desc_t members volatile to avoid races - l4shmc_area_t: add _size member for fast access - l4shmc_chunk_t: add _capacity member that stores the size outside of the shm area and is therefore safe from tampering by remote end shmc/include/internal.h: - l4shmc_chunk_ready(): need HW memory barrier - l4shmc_chunk_size(): Check for overflow - l4shmc_chunk_capacity() adapt to new _capacity member - l4shmc_chunk_consumed(): don't need a memory barrier lib/src/shmc.c: - l4shmc_create(): protect from integer overflows, initialize lock - l4shmc_area_overhead(): new function - l4shmc_chunk_overhead(): new function - next_chunk(): utility function that gets the next chunk, with proper sanity checks to avoid invalid memory access/loops if the other side is malicious - l4chmc_iterate_chunk(): new function - l4shmc_add_chunk(): Add sanity checks, use next_chunk(), initialize complete chunk struct properly before inserting into linked list - l4shmc_area_size_free(): new function - l4shmc_get_chunk_to(): Add sanity checks, use next_chunk()

2 4

Re: Can't get sender from l4_ipc_wait()
by Haohui Mai 17 Apr '12

17 Apr '12

Hi, Thanks for you suggestions. I did get sources from l4_ipc_wait() -- but I still cant map it back to the thread originating the IPC. I created an IPC gate for each task to receive page faults and exceptions, where I set the label of the gate to be my task identifier. I did get my task identifier back, but it seems there's no way to get my thread identifier since the source code of L4 Fiasco suggests that l4_ipc_wait() will only return the label of the IPC gate as the source. Setting the same pager for all threads in a single task seems a reasonable thing to do but obviously it lost the information for thread identifier. In order to recover this information, does it mean that I should create an IPC gate for each thread, setting its label to thread identifier in order to recover this information? Taking a step back, am I doing the right thing? If the answer is no, what would be the suggested architecture? Your comments are highly appreciated. ~Haohui On Apr 10, 2012, at 1:55 AM, Adam Lackorzynski wrote: > Hi, > > On Sun Apr 08, 2012 at 17:08:10 -0500, Mai, Haohui wrote: >> Can you elaborate a little bit? Some code skeletons would be quite helpful. >> >> I already created a new address space through l4_factory_task_create(), and >> my own kernel can serve all page faults / exceptions / IPC for that task. >> >> This is done by mapping the capability of my own kernel, which is its >> thread id, into the newly created task. Therefore, I assume that the IPC >> gate is set up. > > Are the other tasks trusted so that you can give out your own thread > cap? That's usually no good thing to do. > >> What else should I do in order to have my kernel getting the source of the >> IPC when calling l4_ipc_wait()? > > It's basically just l4_factory_create_gate, in the same way as > l4_factory_task_create. Create it with a label of your choice and > binding to the pager, and map it instead of the thread directly. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/

2 1

Questions about Vcon.
by Juwon.Song 13 Apr '12

13 Apr '12

Hello l4-hackers, I will try to use the Vcon of Fiasco. But I don't know about the usage of Vcon. I want to know more information about Vcon. If you have the more information and usage of Vcon, give me the data or examples. Thank you. Song.

2 1

Re: Fiasco.OC development status
by Robert Campbell 12 Apr '12

12 Apr '12

Thank you Bjoern. Any idea when new release will be made and what changes and improvements to expect? > Hi Robert, > >> Is Fiasco.OC being actively developed(i.e new and on going research, >> new features) or is it just being maintained (small adjustments, bug >> fixes etc...)? > > yes, it's actively being worked on and our group uses it as the basis > for research projects. To get an (incomplete) overview of our research > work, you might want to look at our publications list: > http://www.inf.tu-dresden.de/index.php?node_id=1429 > > If you have more specific questions, feel free to ask. > > Cheers, > Bjoern

2 1

Bind irq to icu failed
by Shashi Sharma 09 Apr '12

09 Apr '12

Hi, I am trying to use e1000e driver in Ankh to bring-up intel's 82574L ethernet controller. But its unable to allocate interrupt and I cant figure out the source of the problem. Here is the ankh log: ------------------------------------------------------------------------ ankh | Initialized DDELinux 2.6 ankh | Initializing DDE page cache ankh | ddekit_pci_init ankh | pci bus constructor ankh | PCI: L4 root bridge is device 4e768 ankh | init_wq_head ankh | l4dde26_register_rx_callback: New rx callback @ 0x1000270. ankh | Softirq daemon starting ankh | <6>e1000e: Intel(R) PRO/1000 Network Driver - 0.3.3.3-k6 ankh | <6>e1000e: Copyright (c) 1999-2008 Intel Corporation. ankh | unimplemented: pci_set_master ankh | <3>0000:00:01.0: 0000:00:01.0: Failed to initialize MSI-X interrupts. Falling back to MSI interrupts. ankh | <3>0000:00:01.0: 0000:00:01.0: Failed to initialize MSI interrupts. Falling back to legacy interrupts. ankh | <6>0000:00:01.0: eth0: (PCI Express:2.5GB/s:Width x1) 0x14815cM ankh | <6>0000:00:01.0: eth0: Intel(R) PRO/1000 Network Connection ankh | <6>0000:00:01.0: eth0: MAC: 3, PHY: 8, PBA No: ffffff-0ff ankh | <6>Intel(R) PRO/1000 Network Driver - version 7.3.21-k3-NAPI ankh | <6>Copyright (c) 1999-2006 Intel Corporation. ankh | <6>net_namespace: 636 bytes ankh | open_network_devices() ankh | opening lo ankh | <6>device lo entered promiscuous mode ankh | set interface to promiscuous mode. ankh | opening eth0 ankh | <6>device eth0 entered promiscuous mode ankh | set interface to promiscuous mode. ankh | Thread 0xb0 for IRQ 10 ankh | Bind irq to icu failed with -2 ankh | claim_irq: failed to attach IRQ ankh | <3>0000:00:01.0: eth0: Unable to allocate interrupt, Error: -16 ankh | error opening eth0 : -16 ankh | Opened -16 network devices. ankh | lo IRQ: 0x00 MAC: 00:00:00:00:00:00 MTU: 16436 ankh | Registered @ registry. ankh | Gooood Morning Ankh-Morpoooooork! TID = 0x57 ankh | Creating session factory. ankh | Configuration: debug,promisc,device=eth0,shm=shm,bufsize=16384,phys_mac ankh | Debug mode ON. ankh | Using promiscuous mode. ankh | Device 'eth0' requested. ankh | SHM area 'shm' requested. ankh | Buffer size: 16384 ankh | Physical MAC requested. ankh | rom/ankh: /home/shashi/Desktop/L4/src/l4/pkg/ankh/server/src/session: 159: Ankh::ServerSession::ServerSession(bool, bool, bool, const char*, const char*, unsigned int. bool): Assertion `_dev' failed. --------------------------------------------------------------------------------------- I appreciate your help. Regards, Shashi

4 8

Can't get sender from l4_ipc_wait()
by Mai, Haohui 08 Apr '12

08 Apr '12

Hi, It seems that l4_ipc_wait() will always set the sender to zero. I tested it in example at /pkg/examples/sys/ipc/ipc_example.c, in the l4re-2011081207 snapshot. Here is the patch I applied to the file (to print out label): --- a/ipc_example.c 2011-08-12 00:20:36.000000000 -0500 +++ b/ipc_example.c 2012-04-05 17:29:24.844608359 -0500 @@ -84,6 +84,7 @@ continue; } + printf ("IPC from %lx, %d\n", label, label == 0); /* So, the IPC was ok, now take the value out of message register 0 * of the UTCB and store the square of it back to it. */ l4_utcb_mr()->mr[0] = l4_utcb_mr()->mr[0] * l4_utcb_mr()->mr[0]; And here is the result I got: ... vandroid| Sending: 4 vandroid| IPC from 0, 1 vandroid| Received: 16 ... So it seems that l4_ipc_wait() doesn't return the sender. I'm writing an OS on top of Fiasco.OC. This information is important for pager because it'll need it to figure out which page it'll map in. Do you have any ideas to fix it, or any idea to work around it (at least L4Linux works)? Your comments are appreciated. ~Haohui

2 1

Tracing only write page-faults
by Ivan Bludov 08 Apr '12

08 Apr '12

Hello. I want to trace all write page-faults from an application. I use the pager that wait for page-fault and maps the fpage to thread calling l4_ipc_send_and_wait setting L4_ITEM_MAP. For tracing only write page-faults I map fpage as L4_FPAGE_RO if it was read-pf and then I map the same fpage with L4_FPAGE_RW if the next write-pf occurs. (I mean I map the same fpage with the different flags twice). But an application doesn't continue run. Also I have tried to l4_task_unmap(L4_FP_OTHER_SPACES) this fpage before mapping it as L4_FPAGE_RW. It doesn't work. What should I use to change fpage's rights to L4_FPAGE_RW for fpage that is already mapped as L4_FPAGE_RO for an application? Ivan Bludov

2 1

support for multi-core in Fiasco.OC
by K M 05 Apr '12

05 Apr '12

I am using Fiasco.OC with VirtualBox and have successfully booted and run some demos. However, I am unable to get the kernel to use more than one core on my quad-core machine. I have enabled all 4 processors within the VirtualBox L4 machine, but when I run the "thread_migrate" example, only one CPU is ever recognized and used. What am I doing wrong? Thanks, Kevin

2 1

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