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Ethernet on l4linux
by Gayathri Nagarajan 20 Feb '15

20 Feb '15

I am getting an ERROR : NETWORK IS UNREACHABLE, when i run socket program in l4linux. I am using 64-bit host, upon that - virtual machine which is 32-bit, upon that - ubuntu, upon that - fiasco+l4re+l4re+l4linux *//l4linux_socket.io <http://l4linux_socket.io> file* l4linux => new System_bus() { NIC => wrap(hw-root.NIC); } *//l4linux_socket.cfg* -- vim:set ft=lua: local lxname = "vmlinuz"; if L4.Info.arch() == "arm" then lxname = "vmlinuz.arm"; end loader = L4.default_loader; vbus_l4linux = loader:new_channel(); loader:start( { caps={ sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0); icu = L4.Env.icu; l4linux = vbus_l4linux:svr(); }, },"rom/io -vv rom/l4linux_socket.io"); loader:start( { caps = { log = L4.Env.log:m("rws"), vbus = vbus_l4linux; }, l4re_dbg = L4.Dbg.Warn, log = { "l4linux", "yellow" }, }, "rom/" .. lxname .. " mem=64M console=ttyLv0 l4x_rd=rom/new_ramdisk root=0:0 ramdisk_size=8400 init=/bin/sh"); *//l4linux_socket.list* modaddr 0x01100000 entry l4linux_socket kernel fiasco -serial_esc roottask moe rom/l4linux_socket.cfg module l4re module ned module l4linux_socket.cfg module io module l4linux_socket.io module vmlinuz module new_ramdisk Please help us in resolving the error Thank you

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Re: Problem with Socket program in l4linux
by TaeWoong Song 18 Feb '15

18 Feb '15

> On Feb 18, 2015, at 1:58 PM, Harini Balachandran <harinisbcn(a)gmail.com> wrote: > > Sir, > > I referred the document you suggested. I have set up my environment like this > Base - windows 8 , 64- bit > upon this, virtual machine , then UBUNTU, then l4re+fiasco+l4linux > > Procr = intel core i5 , > x86 board What is your x86 board ? What is your ethernet tranceiver ? (I used ARM board which has Atheros AR8031 for gigabit ethernet ) > > The document you sent was with respect to ARM procr. > Can I use the same .io and .cfg files? Yes, whichever procr you use you should use .io and .cfg to enable ethernet driver and network device on L4Linux. But should change addresses in .io file like 'new-res Mmio(0x02188000 .. 0x0218BFFF);’. You can find mmio addresses in data sheet for your CPU. And refer to URL http://os.inf.tu-dresden.de/L4Re/doc/io.html <http://os.inf.tu-dresden.de/L4Re/doc/io.html> Also should change information of architecture such as ‘if L4.Info.arch() == "arm” then’ in .cfg file > If not, I dont know how to modify according to my set up. > Also how to modify the l4linux source code as it has been done for ARM in the document ie mach_setup.c > What is the ethernet driver you’ll use ? Where is source codes for the ethernet driver ? (I used ‘FEC ethernet driver’) If mach_setup.c hasn’t registering 'platform device’ for your ethernet driver, should add it to mach_setup.c source code. Thanks, Taeung > > Kindly help > > > Regards, > Harini > > On Mon, Feb 16, 2015 at 12:29 PM, taeung <treeze.taeung(a)gmail.com <mailto:treeze.taeung@gmail.com>> wrote: > > On 02/16/2015 03:19 PM, Harini Balachandran wrote: >> Hello sir, >> We saw your question related to networking being posted on l4re mailing list.We request you to assist us. >> >> I have copied my binaries of socket program compiled statically to ramdisk for executing on l4linux. >> When I execute, >> >> //server side >> /tmp # ./server1 >> Socket created >> bind done >> Waiting for incoming connections.... >> >> >> //client side >> /tmp # ./client1 >> connect failed. Error: Network is unreachable >> >> Please list us the network support drivers that are to be enabled in l4linux configuration.Is there any other changes that have to be made apart from enabling the networking support in l4linux? >> Thank You. >> > > 1. It is important that what is your boad and what is cpu on your board > 2. You should register a network device in IO server > 3. To access network device on L4 Linux, you need to configure ‘.io’ file > > 4. I don't know if this is of any help but I do hope so > The link has a document about porting and enabling ethernet on L4Linux. > http://developerpostit.blogspot.kr/search/label/l4%20device%20driver <http://developerpostit.blogspot.kr/search/label/l4%20device%20driver> > > Thanks, > Taeung > >> >> Regards, >> Harini > >

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Re: Problem with Socket program in l4linux
by taeung 16 Feb '15

16 Feb '15

On 02/16/2015 03:19 PM, Harini Balachandran wrote: > Hello sir, > We saw your question related to networking being posted on l4re > mailing list.We request you to assist us. > I have copied my binaries of socket program compiled statically to > ramdisk for executing on l4linux. > When I execute, > > //server side > /tmp # ./server1 > Socket created > bind done > Waiting for incoming connections.... > > > //client side > /tmp # ./client1 > connect failed. Error: Network is unreachable > > Please list us the network support drivers that are to be enabled in > l4linux configuration.Is there any other changes that have to be made > apart from enabling the networking support in l4linux? > Thank You. > 1. It is important that what is your boad and what is cpu on your board 2. You should register a network device in IO server 3. To access network device on L4 Linux, you need to configure ‘.io’ file 4. I don't know if this is of any help but I do hope so The link has a document about porting and enabling ethernet on L4Linux. http://developerpostit.blogspot.kr/search/label/l4%20device%20driver Thanks, Taeung > > Regards, > Harini

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Ram size of the arm images
by cem akpolat 13 Feb '15

13 Feb '15

Hi, As you know there are many configuration file for arm boards under l4re/mk/platforms folder. When we open one of them, vexpress, it contains the following information: PLATFORM_NAME = "ARM Versatile Express" PLATFORM_ARCH = arm PLATFORM_RAM_BASE = 0x60000000 PLATFORM_RAM_SIZE_MB = 256 The interesting part here is the size of the RAM, because you cannot give same size of the RAM when you compile the l4 lua configuration. In case you give l4linux raises "memory cannot reach out of the ..." error. what is the exact reason of that? is there any specific point where the ram size of arm boards are static defined? Thanks in advance, Cem Akpolat

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Problem with socket program on l4linux
by Gayathri Nagarajan 13 Feb '15

13 Feb '15

I have copied my binaries compiled statically to ramdisk for executing on l4linux. When I execute, //server side /tmp # ./server1 Socket created bind done Waiting for incoming connections.... //client side /tmp # ./client1 connect failed. Error: Network is unreachable But I have enabled the network support and drivers in L4Linux configuartion. Where will the .config file be located, so as to reconfirm if I have enabled correctly? I couldn't find it in l4linux build directory. Also, I executed packet sniffer on l4linux, which showed /tmp # ./simplesniffer eth0 Opening device eth0 ERROR: eth0: No such device exists (SIOCGIFHWADDR:No such device) Thank you L4 community

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Running l4android on cubieboard2
by cem akpolat 12 Feb '15

12 Feb '15

Dear all, Couple of months ago, I was trying to run l4 on the samsung nexus s, but then I decided to switch to Cubieboard2 due to the simple configurations and costs stemming from the JTAG/UART interfaces which are quite expensive(around 1000 Euro). What I did: + the fiasco is compiled for All-sunxi and cubieboard + l4re is compiled for cubieboard2. + the uImage is generated through the following command make uimage -C ~/l4android/src/l4/ E=L4LinuxARM O=~l4android/src/build/l4/ + boot.scr file for uboot is created in which the compiled kernel image is given as kernel as belowe ------------ setenv kernel_addr_r 0x46000000 # 8M setenv fdt_addr 0x49000000 # 2M setenv fdt_high 0xffffffff # Load fdt in place instead of relocating fatload mmc 0 0x43000000 /script.bin fatload mmc 0 ${kernel_addr_r} /uImage setenv bootargs "console=ttyS0,115200 hdmi.audio=EDID:0 disp.screen0_output_mode=EDID:1280x1024p60 rw root=/dev/mmcblk0p2 rootwait" fatload mmc 0 ${fdt_addr} /sun7i-a20-cubieboard2.dtb bootm ${kernel_addr_r} - ${fdt_addr} --------------------- #End of the setup # What I am seeing on the console outputs ------------------- ## Booting kernel from Legacy Image at 46000000 ... Image Name: L4 Image #32 Created: 2015-01-12 10:46:51 UTC Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 10268672 Bytes = 9.8 MiB Load Address: 41000000 Entry Point: 41000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 49000000 Booting using the fdt blob at 0x49000000 Loading Kernel Image ... OK Using Device Tree in place at 49000000, end 4900873e Using machid 0x10bb from environment Starting kernel ... L4 Bootstrapper Build: #32 Mo 12. Jan 11:46:50 CET 2015, 4.7.3 Scanning up to 1024 MB RAM, starting at offset 32MB Memory size is 1024MB (40000000 - 7fffffff) RAM: 0000000040000000 - 000000007fffffff: 1048576kB Total RAM: 1024MB Scanning fiasco Scanning sigma0 Scanning moe Moving up to 14 modules behind 41100000 moving module 02 { 41999000-419ca623 } -> { 41a89000-41aba623 } [202276] moving module 01 { 4198f000-4199833b } -> { 41a7f000-41a8833b } [37692] moving module 00 { 4193c000-4198e42b } -> { 41a2c000-41a7e42b } [336940] moving module 13 { 4163c000-4193bfff } -> { 4172c000-41a2bfff } [3145728] moving module 12 { 4128a000-4163b477 } -> { 4137a000-4172b477 } [3871864] moving module 11 { 41289000-412890e4 } -> { 41379000-413790e4 } [229] moving module 10 { 411f1000-41288c43 } -> { 412e1000-41378c43 } [621636] moving module 09 { 411cf000-411f0623 } -> { 412bf000-412e0623 } [136740] moving module 08 { 41080000-411ce453 } -> { 41170000-412be453 } [1369172] moving module 07 { 4107f000-4107f588 } -> { 4116f000-4116f588 } [1417] moving module 06 { 4107e000-4107e03b } -> { 4116e000-4116e03b } [60] moving module 05 { 4107d000-4107d425 } -> { 4116d000-4116d425 } [1062] moving module 04 { 4102a000-4107cc03 } -> { 4111a000-4116cc03 } [338948] moving module 03 { 41010000-41029457 } -> { 41100000-41119457 } [103512] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x40002000 Regions of list 'regions' [ 40000000, 400001cf] { 1d0} Root mbi_rt [ 40001000, 40001bbf] { bc0} Kern fiasco [ 40002000, 4005efff] { 5d000} Kern fiasco [ 40090000, 400968fb] { 68fc} Sigma0 sigma0 [ 40098000, 4009e177] { 6178} Sigma0 sigma0 [ 40140000, 4016e6a3] { 2e6a4} Root moe [ 40170000, 40186f13] { 16f14} Root moe [ 41000000, 4100f5ff] { f600} Boot bootstrap [ 41100000, 41a2bfff] { 92c000} Root Module API Version: (87) experimental Sigma0 config ip:40090100 sp:00000000 Roottask config ip:40140260 sp:00000000 Starting kernel fiasco at 40001388 Non-HYP kernel detected but running in HYP mode, switching back. ------------------------ What exactly Fiasco tries to tell me with this message "Non-HYP kernel detected but running in HYP mode, switching back.". Thanks, Cem Akpolat

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Re: Problem Launching L4Linux
by Piwe li 12 Feb '15

12 Feb '15

Hi, Thank you for your answer Adam. Nothing happens when I press ESC. I also tried to send ESC with the QEMU monitor using "sendkey esc" which has also no effect. Same thing with the Hello World. I really don't know what could cause this problem but I think it may have something to do with capabilities (just a guess). I have to say that my QEMU works fine, I tested it with another Linux. My .dtb is good too. Do you have any ideas or suggestions ? I was also wondering about the "libio: Warning: Query of 'vbus' failed!" during the boot of L4Linux. I don't think it is a problem (due to the fact that I'm not using any IPC) but I'm not sure. Thank you for all the help, Louis. ----------------------------------------------------------------- > I am actually trying to launch L4Linux on Fiasco.OC+L4RE on Xilinx Zynq > using QEMU but I get an error at the end of the boot of L4Linux : > > */bin/sh: can't access tty; job control turned off* This is a standard message when launching the shell with init=/bin/sh, it's not L4Linux specific. > */ #* > > > > Even if I have a shell prompt I can?t type anything, that?s why I am > sending this email. Does pressing ESC get you into Fiasco's jdb? Otherwise the configs do not show me anything obvious wrong right now. > I am aware that my problem is very similar to this one > http://os.inf.tu-dresden.de/pipermail/l4-hackers/2013/005920.html but I > tried every solution you suggested. > > > > I am working under *Ubuntu 64bits 14.04* and I am compiling with > *arm-linux-gnueabi-gcc > 4.7.3*. > > To emulate the *Xilinx Zynq*, I?m using *QEMU emulator version 2.0.50* > configured this way : > > *./configure --target-list="arm-softmmu,microblazeel-softmmu" --enable-fdt > --disable-kvm* > > To launch QEMU, here is my command line : > > *qemu-system-arm -M arm-generic-fdt -dtb ~/Documents/zynq-zc706.dtb -kernel > ~/Documents/gitL4/l4-hypervisor/build/l4/images/bootstrap.elf -serial > mon:stdio* > > Zynq is ARM so I?m using this ramdisk : > http://os.inf.tu-dresden.de/download/ramdisk-arm.rd >

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Problem with executing a binary on l4linux
by Harini Balachandran 11 Feb '15

11 Feb '15

We mounted the ramdisk and copied the binary to l4linux ramdisk but while executing on l4linux, /# cd tmp /tmp#./hello /bin/sh: ./hello : not found How do I execute my binary? Regards, Harini

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testing tools
by Waldo Paz Rodriguez 11 Feb '15

11 Feb '15

hello l4hackers, I need to know which types of testing and tools are available for testing devices drivers, system call performance, scheduling and any modification made on the system. best regards, waldo

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Running the FERRET Examples
by Karl Steger 10 Feb '15

10 Feb '15

Hi L4 hackers, I'm trying to run the scalar demo from the FERRET package. Although the server loop from "l4/pkg/ferret/server/re/sensordir.cc" starts, no scalar sensor is registered in "l4/pkg/ferret/examples/demo/scalar_demo/main.c" as the program execution pauses at this line: ret = ferret_create(srv, 10, 1, 0, FERRET_SCALAR, 0, "0:100:%", s1, &malloc); which leads to an l4_ipc_call to the sensor directory. Could you please tell me if there is a problem with my configuration file below or provide a working configuration file? >require("L4"); > >local ld = L4.default_loader; >local ferret = ld:new_channel(); >local sensordir = ld:new_channel(); > >ld:start( >{ caps = { ferret=ferret:svr(), sensordir=sensordir:svr() } >}, >"rom/ferret_sensor_dir"); > >ld:start( >{ caps = { ferret=ferret, sensordir=sensordir }, > log = { "f_scalar_demo", "green" } >}, >"rom/fer_scalar_demo"); Thanks and regards, Karl

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Getting dataspace of a tmpfs-file blocks forever
by Stark, Josef 10 Feb '15

10 Feb '15

Hey, when I have created and filled a file in tmpfs, reading normally (-> read() ) from it works fine. However, I cannot get the associated dataspace. The call would just block forever. Here is an example code snippet: ========================== const char* filename="/tmp/test"; mount("/", "tmp", "tmpfs", 0, 0); int fd=open(filename,O_WRONLY|O_CREAT); write(fd,"Hello",6); close(fd); fd=open(filename,O_RDONLY); char buf[15]; read(fd,buf,15); printf("file content: %s\n",buf); cxx::Ref_ptr<L4Re::Vfs::File> fp = L4Re::Vfs::vfs_ops->get_file(fd); printf("Got file!\n"); L4::Cap<L4Re::Dataspace> ds = fp->data_space(); printf("Got Dataspace!"); long int size = ds->size(); printf("Dataspace size: %li\n",size); printf("Done.\n"); close(fd); ============================ It would just output file content: Hello Got file! but nothing more, which tells me that reading normally from the file works, but the fp->data_space() call blocks. If I tried the same with an existing file in /rom/, it works just fine (except for the writing part, obviously). How can I make this work? Thanks, Josef

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Profiling/Runtime Monitoring in Fiasco.OC and L4Re
by "Patrick Stäblein" 10 Feb '15

10 Feb '15

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How to Install L4Re
by Jerry L 10 Feb '15

10 Feb '15

Hi all, I want to install L4Re in my zedboard. Who can give me some information about how to do it. I searched online and did not find any useful information about it. Thank you very much. best, Jian

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Re: How to run an application on l4linux
by Björn Döbel 09 Feb '15

09 Feb '15

Hi, > Do i have to generate kernel modules and copy to my ramdisk for > executing any linux application on l4linux? Or is there any other method ? No, you only have to generate kernel modules if you want to load them into the L4Linux kernel. If you simply want to run a Linux user application on top of L4Linux all you have to do is to make this program binary available to L4Linux, for instance by putting it onto the ramdisk. (You can mount the ramdisk with the -o loop option as Matthias already indicated.) > Regarding building kernel modules, I did the following: > I auto.conf file, I added CONFIG_L4_BLK_DS_DRV = y > I generated hello.ko file. Also, in its Makefile i had given L4linux > build directory path > In l4linux.cfg file ,I added l4bdds.add=rom/hello.ko > I did not copy the hello.ko file into my ramdisk-x86.rd. > But when i booted my l4linux, I couldn't find l4bdds in dev directory.My > command was > /# cat /dev/l4bdds > cat:can't open '/dev/l4bdds':No such file or directory Do you see any messages regarding L4bdds during bootup? Björn

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Mounting l4linux ramdisk
by Harini Balachandran 09 Feb '15

09 Feb '15

I am trying to execute a hello world application on l4 linux.I generated hello.ko file.What is the procedure to mount the l4linux ramdisk and how to copy my .ko file to it. I gave the following command on the l4linux command prompt. [root]# mkdir /mnt/rd [root]# mount /dev/ram0 /mnt/rd mount:mounting /dev/ram0 on /mnt/rd failed:no such file or directory.

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How to run an application on l4linux
by Gayathri Nagarajan 09 Feb '15

09 Feb '15

Many thanks for the l4 team in helping me resolve my errors. I have succesfully built fiasco.oc,l4re,l4linux I want to execute a socket program(linux application) on l4linux or using l4linux. Hence, I am in need of step by step procedure for executing it. Also, is there any links or reference pages regarding how to use l4linux and how to run linux applications on l4linux? Gayathri

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Re:Linux boot problem
by Gayathri Nagarajan 05 Feb '15

05 Feb '15

Upon the boot of l4linux iso image using QEMU, I got the following: vmlinuz | RAMDISK: ext2 filesystem found at block 0 vmlinuz | RAMDISK: Loading 3072KiB [1 disk] into ram disk... done. vmlinuz | EXT4-fs (ram0): couldn't mount as ext3 due to feature incompatibilities vmlinuz | EXT4-fs (ram0): mounting ext2 file system using the ext4 subsystem vmlinuz | EXT4-fs (ram0): mounted filesystem without journal. Opts: (null) vmlinuz | VFS: Mounted root (ext2 filesystem) on device 1:0. vmlinuz | Freeing unused kernel memory: 144K (00709000 - 0072d000) vmlinuz | Clocksource tsc unstable (delta = 3346692958 ns) vmlinuz | /bin/sh: can't access tty; job control turned off I disabled ACPI and power management options also. I have included init=/bin/sh in l4linux.cfg script. Still the linux command prompt doesn't appear via l4linux launch. The script is below: //l4linux.cfg: L4.default_loader:start({}, "rom/vmlinuz mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-x86.rd root=1:0 ramdisk_size=4000 init=/bin/sh");

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l4linux boot problem
by Gayathri Nagarajan 04 Feb '15

04 Feb '15

Upon the boot of l4linux iso image using QEMU, I got the following: vmlinuz | RAMDISK: ext2 filesystem found at block 0 vmlinuz | RAMDISK: Loading 3072KiB [1 disk] into ram disk... done. vmlinuz | EXT4-fs (ram0): couldn't mount as ext3 due to feature incompatibilities vmlinuz | EXT4-fs (ram0): mounting ext2 file system using the ext4 subsystem vmlinuz | EXT4-fs (ram0): mounted filesystem without journal. Opts: (null) vmlinuz | VFS: Mounted root (ext2 filesystem) on device 1:0. vmlinuz | Freeing unused kernel memory: 144K (00709000 - 0072d000) vmlinuz | Clocksource tsc unstable (delta = 3346692958 ns) vmlinuz | /bin/sh: can't access tty; job control turned off I even disabled power management and ACPI options in l4linux configuration, still the same fault.

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Problem with L4linux
by Gayathri Nagarajan 02 Feb '15

02 Feb '15

When I executed l4linux as an l4re application , the attached image got generated. How to resolve this?

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UX/RT - a Universally eXtensible Real-Time OS
by Andrew Warkentin 01 Feb '15

01 Feb '15

I am planning to write a new L4-based multi-server OS called UX/RT (initially I will use Fiasco.OC as the kernel since it has x86_64 support and supports kernel capabilities, but may eventually support seL4 as well). Unlike the other current L4 OS environments, it will be a multi-server Unix-like OS resembling QNX and Plan 9. I am intending it to have good support for both desktop and embedded systems (servers are not a huge priority; the microkernel architecture might limit the maximum throughput for heavily I/O-bound workloads). I am dissatisfied with all the current mainstream OSes and want to take on the challenge of making something better. I am planning to reuse as much existing third-party code as possible, especially as I will probably be working on it alone at first (of course if anybody here wants to contribute they can). However, due to the design, the only part of L4Re that I can use as-is is sigma0 (which may require minor changes to fit into the XIP-based boot process I am going to use). I will be implementing my own root task which may use a few parts of moe, although I haven't looked too closely at the source for moe so I'm not sure if there's anything there that I can use. Other than sigma0, the low-level kernel headers, and possibly some parts of moe, I'm not sure if there is much else from L4Re (or Genode) that would be useful in the context of a pure Unix-like multi-server OS. Most of the code I reuse will come from BSD and GNU (which gets me quite far; the root task will probably be the biggest part of the base OS that will be primarily original code). I already have a very good idea of the design I'm going to use; I'll post more about it later.

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Problem with Socket program
by Gayathri Nagarajan 01 Feb '15

01 Feb '15

I am trying to execute a socket program like - client server. I am getting errors like "undefined reference to socket". But I have included <sys/socket.h>. I tried adding library "-lsocket", still the same error. Also, I get errors like "Library Dependencies missing", "Cflags dependencies missing". What libraries have to be added in the makefile for any socket program? The kernel implementation of socket is also available in uclibc pkg of l4re. How do I make my program linked to the socket call? Please help us resolve this error to get the program built successfully. Thank you very much

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Problem Launching L4Linux
by Piwe li 31 Jan '15

31 Jan '15

Hi everybody, I am actually trying to launch L4Linux on Fiasco.OC+L4RE on Xilinx Zynq using QEMU but I get an error at the end of the boot of L4Linux : */bin/sh: can't access tty; job control turned off* */ #* Even if I have a shell prompt I can’t type anything, that’s why I am sending this email. I am aware that my problem is very similar to this one http://os.inf.tu-dresden.de/pipermail/l4-hackers/2013/005920.html but I tried every solution you suggested. I am working under *Ubuntu 64bits 14.04* and I am compiling with *arm-linux-gnueabi-gcc 4.7.3*. To emulate the *Xilinx Zynq*, I’m using *QEMU emulator version 2.0.50* configured this way : *./configure --target-list="arm-softmmu,microblazeel-softmmu" --enable-fdt --disable-kvm* To launch QEMU, here is my command line : *qemu-system-arm -M arm-generic-fdt -dtb ~/Documents/zynq-zc706.dtb -kernel ~/Documents/gitL4/l4-hypervisor/build/l4/images/bootstrap.elf -serial mon:stdio* Zynq is ARM so I’m using this ramdisk : http://os.inf.tu-dresden.de/download/ramdisk-arm.rd You can find below my serial output, my modules.list file and my l4lx.cfg file. Thanks in advance, Louis. Here is my serial output : *SPI device 0x7f7d798ea450* *L4 Bootstrapper* * Build: #2 Fri Jan 30 10:04:49 CET 2015, 4.7.3* * Scanning up to 512 MB RAM* * Memory size is 512MB (00100000 - 200fffff)* * RAM: 0000000000100000 - 00000000200fffff: 524288kB* * Total RAM: 512MB* * mod09: 0166f000-0196f000: ramdisk-arm.rd* * mod08: 01325000-0166e47c: vmlinuz.arm* * mod07: 01324000-013240bd: arm-rv.io <http://arm-rv.io>* * mod06: 0120e000-01323704: io* * mod05: 0120d000-0120d189: l4lx.cfg* * mod04: 011ba000-0120cbd4: ned* * mod03: 011a0000-011b9458: l4re* * mod02: 0116e000-0119f624: moe* * mod01: 01164000-0116d33c: sigma0* * mod00: 01115000-01163828: fiasco* * Moving up to 10 modules behind 1200000* * moving module 00 { 1115000-1163827 } -> { 1a5a000-1aa8827 } [321576]* * moving module 01 { 1164000-116d33b } -> { 1aa9000-1ab233b } [37692]* * moving module 02 { 116e000-119f623 } -> { 1ab3000-1ae4623 } [202276]* * moving module 03 { 11a0000-11b9457 } -> { 196f000-1988457 } [103512]* * moving module 04 { 11ba000-120cbd3 } -> { 1989000-19dbbd3 } [338900]* * moving module 05 { 120d000-120d188 } -> { 1200000-1200188 } [393]* * moving module 06 { 120e000-1323703 } -> { 1201000-1316703 } [1136388]* * moving module 07 { 1324000-13240bc } -> { 1317000-13170bc } [189]* * moving module 08 { 1325000-166e47b } -> { 1318000-166147b } [3445884]* * moving module 09 { 166f000-196efff } -> { 1662000-1961fff } [3145728]* * moving module 03 { 196f000-1988457 } -> { 1962000-197b457 } [103512]* * moving module 04 { 1989000-19dbbd3 } -> { 197c000-19cebd3 } [338900]* * Scanning fiasco -serial_esc* * Scanning sigma0* * Scanning moe rom/l4lx.cfg* * Relocated mbi to [0x110e000-0x110e15d]* * Loading fiasco* * Loading sigma0* * Loading moe* * find kernel info page...* * found kernel info page at 0x102000* *Regions of list 'regions'* * [ 101000, 101b3f] { b40} Kern fiasco* * [ 102000, 15efff] { 5d000} Kern fiasco* * [ 190000, 1965fb] { 65fc} Sigma0 sigma0* * [ 198000, 19e17b] { 617c} Sigma0 sigma0* * [ 240000, 26cafb] { 2cafc} Root moe* * [ 270000, 286f0f] { 16f10} Root moe* * [ 1100000, 11143f3] { 143f4} Boot bootstrap* * [ 110a000, 110a121] { 122} Boot mbi* * [ 110e000, 110e25a] { 25b} Root Multiboot info* * [ 1114048, 111409f] { 58} Boot mbi* * [ 1200000, 19cebd3] { 7cebd4} Root Module* *API Version: (87) experimental* * Sigma0 config ip:00190100 sp:01113de4* *Roottask config ip:00240260 sp:00000000* * Starting kernel fiasco at 001012fc* *Hello from Startup::stage2* *Number of IRQs available at this GIC: 96* *Cache config: ON* *ID_PFR[01]: 00001031 00000011 ID_[DA]FR0: 00000000 00000000* *ID_MMFR[04]: 00100103 20000000 01230000 00002111* *-----Gpt_ticks : 1638 -----* *L2: ID=00000000 Type=00000000 Aux=00000000 WMask=ff S=1* *L2: Type L2C-Unknown Size = 0kB* *SERIAL ESC: allocated IRQ 82 for serial uart* *Not using serial hack in slow timer handler.* *Welcome to Fiasco.OC (arm)!* *L4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden * *Rev: 72df873 compiled with gcc 4.7.3 for zynq [] * *Build: #1 Fri Jan 30 09:52:25 CET 2015 * *Calibrating timer loop... done.* *MDB: use page size: 20* *MDB: use page size: 12* *SIGMA0: Hello!* * KIP @ 102000* * allocated 4KB for maintenance structures* *SIGMA0: Dump of all resource maps* *RAM:------------------------* *[0:100000;100fff]* *[0:15f000;18ffff]* *[0:197000;197fff]* *[0:19f000;23ffff]* *[4:240000;26cfff]* *[0:26d000;26ffff]* *[4:270000;286fff]* *[0:287000;110dfff]* *[4:110e000;110efff]* *[0:110f000;11fffff]* *[4:1200000;19cefff]* *[0:19cf000;1f0fffff]* *IOMEM:----------------------* *[0:0;fffff]* *[0:20100000;ffffffff]* *MOE: Hello world* *MOE: found 499200 KByte free memory* *MOE: found RAM from 100000 to 1f100000* *MOE: allocated 496 KByte for the page array @0x19f000* *MOE: virtual user address space [0-bfffffff]* *MOE: rom name space cap -> [C:501000]* * BOOTFS: [1962000-197b458] [C:503000] l4re* * BOOTFS: [197c000-19cebd4] [C:504000] ned* * BOOTFS: [1200000-1200189] [C:505000] l4lx.cfg* * BOOTFS: [1201000-1316704] [C:506000] io* * BOOTFS: [1317000-13170bd] [C:507000] arm-rv.io <http://arm-rv.io>* * BOOTFS: [1318000-166147c] [C:508000] vmlinuz.arm* * BOOTFS: [1662000-1962000] [C:509000] ramdisk-arm.rd* *MOE: cmdline: moe rom/l4lx.cfg* *MOE: Starting: rom/ned rom/l4lx.cfg* *MOE: loading 'rom/ned'* *Ned says: Hi World!* *Ned: loading file: 'rom/l4lx.cfg'* *l4linux | libio: Warning: Query of 'vbus' failed!* *l4linux | PH 0 (t: 1) offs=00008000 vaddr=02000000 vend=023b4f8c* *l4linux | phys=02000000 ephys=023b4f8c* *l4linux | f_sz=003303b6 memsz=003b4f8c flgs=rwx* *l4linux | PH 1 (t: 4) offs=002f401c vaddr=022ec01c vend=022ec040* *l4linux | phys=022ec01c ephys=022ec040* *l4linux | f_sz=00000024 memsz=00000024 flgs=r-x* *l4linux | PH 2 (t: 1685382481) offs=00000000 vaddr=00000000 vend=00000000* *l4linux | phys=00000000 ephys=00000000* *l4linux | f_sz=00000000 memsz=00000000 flgs=rwx* *l4linux | Starting binary at 0x20002a0, argc=7 argv=0x80007f8c *argv=0xb1007ff0 argv0=rom/vmlinuz.arm* *l4linux | External resolver is at 0xa8000788* *l4linux | ======> L4Linux starting... <========* *l4linux | Linux version 3.13.0-l4 (novasys@vmxub) (gcc version 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1) ) #1 Fri Jan 30 10:04:39 CET 2015 * *l4linux | Binary name: rom/vmlinuz.arm* *l4linux | This is an AEABI build.* *l4linux | Linux kernel command line (6 args): mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-arm.rd root=1:0 ramdisk_size=4000 init=/bin/sh * *l4linux | CPU mapping (l:p)[1]: 0:0* *l4linux | Image: 02000000 - 02400000 [4096 KiB].* *l4linux | Areas: Text: 02000000 - 0230a000 [3112kB] (a bit longer)* *l4linux | Data: 0230a000 - 0232b7c0 [133kB]* *l4linux | Initdata: 022ed000 - 02309d5c [115kB]* *l4linux | BSS: 023303b6 - 023b4f8c [530kB]* *l4linux | Device scan:* *l4linux | Device scan done.* *l4linux | l4lx_thread_create: Created thread 413 (cpu0) (u:b3000e00, v:b3000c00, sp:0230bfa4)* *l4linux | main thread will be 413* *l4linux | l4x_register_pointer_section: addr = 02000000 size = 3887104* *l4linux | section-with-init: Virt: 0x2000000 to 0x23b4f8b [3795 KiB]* *l4linux | section-with-init: Phys: 0x0038d000 to 0x00741f8b, [3795 KiB]* *l4linux | Main thread running, waiting...* *l4linux | L4x: Memory size: 64MB* *l4linux | L4x: Setting superpages for main memory* *l4linux | L4x: Adjusted memory start: 02000000* *l4linux | Main memory: Virt: 0x2400000 to 0x63fffff [65536 KiB]* *l4linux | Main memory: Phys: 0x01a00000 to 0x059fffff, [65536 KiB]* *l4linux | l4x: vmalloc area: 06400000 - 0e400000* *l4linux | l4x_register_pointer_section: addr = 02000000 size = 3887104* *l4linux | text: Virt: 0x2000000 to 0x23b4f8b [3795 KiB]* *l4linux | text: Phys: 0x0038d000 to 0x00741f8b, [3795 KiB]* *l4linux | l4x_rd_path: rom/ramdisk-arm.rd* *l4linux | Loading: rom/ramdisk-arm.rd* *l4linux | INITRD: Size of RAMdisk is 3072KiB* *l4linux | RAMdisk from 00002000 to 00302000 [3072KiB]* *l4linux | l4lx_thread_create: Created thread 418 (timer) (u:b3000a00, v:00000000, sp:0234dfa0)* *Booting Linux on physical CPU 0x0* *Linux version 3.13.0-l4 (novasys@vmxub) (gcc version 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1) ) #1 Fri Jan 30 10:04:39 CET 2015* *CPU: Fiasco [410fc090] revision 0 (ARMv7), cr=00000000* *CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache* *Machine: L4* *Memory policy: Data cache writeback* *INITRD: 00002000 - 00302000* *Built 1 zonelists in Zone order, mobility grouping on. Total pages: 17209* *Kernel command line: mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-arm.rd root=1:0 ramdisk_size=4000 init=/bin/sh* *PID hash table entries: 512 (order: -1, 2048 bytes)* *Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)* *Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)* *Memory: 64804K/69636K available (2328K kernel code, 133K rwdata, 664K rodata, 115K init, 530K bss, 4832K reserved)* *Virtual kernel memory layout:* * vector : 0xbffff000 - 0xc0000000 ( 4 kB)* * fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)* * vmalloc : 0x06400000 - 0x0e400000 ( 128 MB)* * lowmem : 0x00000000 - 0x06400000 ( 100 MB)* * modules : Virtual kernel memory layout:* * vector : 0xbffff000 - 0xc0000000 ( 4 kB)* * fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)* * vmalloc : 0x06400000 - 0x0e400000 ( 128 MB)* * lowmem : 0x00000000 - 0x06400000 ( 100 MB)* * moNR_IRQS:220* *l4timer: Using IRQ210* *sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483648000ns* *Console: colour dummy device 80x30* *console [ttyLv0] enabled* *Calibrating delay loop... 2636.18 BogoMIPS (lpj=13180928)* *pid_max: default: 32768 minimum: 301* *Mount-cache hash table entries: 512* *CPU: Testing write buffer coherency: ok* *Setting up static identity map for 0x222f940 - 0x222f940* *NET: Registered protocol family 16* *DMA: preallocated 256 KiB pool for atomic coherent allocations* *bio: create slab <bio-0> at 0* *Failed to create "l4x" debugfs directory: 1* *Switched to clocksource l4kipclk* *NET: Registered protocol family 2* *TCP established hash table entries: 1024 (order: 0, 4096 bytes)* *TCP bind hash table entries: 1024 (order: 0, 4096 bytes)* *TCP: Hash tables configured (established 1024 bind 1024)* *TCP: reno registered* *UDP hash table entries: 256 (order: 0, 4096 bytes)* *UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)* *NET: Registered protocol family 1* *Trying to unpack rootfs image as initramfs...* *rootfs image is not initramfs (junk in compressed archive); looks like an initrd* *INITRD: Freeing memory.* *l4x: Checks passed.* *NetWinder Floating Point Emulator V0.97 (double precision)* *msgmni has been set to 126* *io scheduler noop registered* *io scheduler deadline registered* *io scheduler cfq registered (default)* *L4 serial driver* *ttyLv0 at MMIO 0x1 (irq = 211, base_baud = 230400) is a L4* *l4ser_shm: L4 shared mem serial driver* *l4cdds: No name given, not starting.* *brd: module loaded* *l4bdds: No name given, not starting.* *mousedev: PS/2 mouse device common for all mice* *TCP: cubic registered* *NET: Registered protocol family 17* *RAMDISK: ext2 filesystem found at block 0* *RAMDISK: Loading 3072KiB [1 disk] into ram disk... done.* *EXT4-fs (ram0): couldn't mount as ext3 due to feature incompatibilities* *EXT4-fs (ram0): mounting ext2 file system using the ext4 subsystem* *EXT4-fs (ram0): mounted filesystem without journal. Opts: (null)* *VFS: Mounted root (ext2 filesystem) readonly on device 1:0.* *Freeing unused kernel memory: 112K (022ed000 - 02309000)* */bin/sh: can't access tty; job control turned off* */ #* Here is my modules.list : *modaddr 0x01100000* *default-kernel fiasco -serial_esc* *default-bootstrap bootstrap* *entry L4Linux ARM* *roottask moe rom/l4lx.cfg* *module l4re* *module ned* *module l4lx.cfg* *module io* *module arm-rv.io <http://arm-rv.io>* *module vmlinuz.arm* *module ramdisk-arm.rd* Here is my l4lx.cfg : *-- vim:set ft=lua:* *local lxname = "vmlinuz";* *if L4.Info.arch() == "arm" then* * lxname = "vmlinuz.arm";* *end* *L4.default_loader:start(* * { caps = {* * log = L4.Env.log:m("rws"),* * },* * l4re_dbg = L4.Dbg.Warn,* * log = { "l4linux", "yellow" },* * },* * "rom/" .. lxname .. " mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-" .. L4.Info.arch() .. ".rd root=1:0 ramdisk_size=4000 init=/bin/sh");* But I also tried this one : *-- vim:set ft=lua:* *local lxname = "vmlinuz";* *if L4.Info.arch() == "arm" then* * lxname = "vmlinuz.arm";* *end* *L4.default_loader:start(* * { caps = {* * },* * l4re_dbg = L4.Dbg.Warn,* * log = L4.Env.log,* * },* * "rom/" .. lxname .. " mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-" .. L4.Info.arch() .. ".rd root=1:0 ramdisk_size=4000 init=/bin/sh");*

2 1

l4linux boot failed
by Nicolas VARONA 31 Jan '15

31 Jan '15

Hi l4Hackers, I want to run the l4linux given in l4re-snapshot-2014092821. So, I built the fiasco and the l4re. I created an iso image with grub2 and the modules given in example (entry l4linux) as test: make grub2iso E=L4linux MODULES_LIST=$cwd/l4/conf/modules.list MODULE_SEARCH_PATH=$cwd/kernel/fiasco/mybuild qemu-system-i386 -m 512M -cdrom l4linux.iso -serial file:$cwd/log I enabled needed options such as the VPCI bus and followed the instructions given in mails approaching my problem (http://os.inf.tu-dresden.de/pipermail/l4-hackers/2013/005938.html and http://os.inf.tu-dresden.de/pipermail/l4-hackers/2011/004861.html ). I can launch Linux but the boot crashes. I also tried with VBUS and modaddr 0x02000000 with the same result. So I put the logs in a file. I tried unsuccessfully to see my mistake. In addition, are the last warnings a problem? My configuration: I run a Kubuntu in a Vm: Distributor ID: Ubuntu Description: Ubuntu 14.04.1 LTS Release: 14.04 it's a x86-32bit I have: gcc (Ubuntu 4.8.2-19ubuntu1) 4.8.2 I wanted to compile for i386. I give to you the log file, the module list, and the l4lx-gfx.cfg used in modules. Thanks in advance for your help, Nicolas ################################### log ######################################### L4 Bootstrapper Build: #2 mardi 27 janvier 2015, 15:47:44 (UTC+0100), x86-32, 4.8.2 RAM: 0000000000000000 - 000000000009fbff: 639kB RAM: 0000000000100000 - 000000001fffdfff: 523256kB Total RAM: 511MB Scanning fiasco -serial_esc Scanning sigma0 Scanning moe rom/l4lx-gfx.cfg need 1244 bytes to copy MBI reserved 1244 bytes at 0x2000 Moving up to 13 modules behind 1100000 moving module 12 { 22a1000-25a0fff } -> { 318c000-348bfff } [3145728] moving module 11 { 1dc0000-22a0ccc } -> { 2cab000-318bccc } [5115085] moving module 08 { 195d000-1dbf07b } -> { 2848000-2caa07b } [4595836] moving module 07 { 17d4000-195cea8 } -> { 26bf000-2847ea8 } [1609385] moving module 06 { 8c3000-17d30c3 } -> { 17ae000-26be0c3 } [15794372] moving module 04 { 66c000-8c2741 } -> { 1557000-17ad741 } [2451266] moving module 03 { 532000-66b48c } -> { 141d000-155648c } [1283213] moving module 02 { 2e0000-531e7b } -> { 11cb000-141ce7b } [2432636] moving module 10 { 214000-214226 } -> { 11ca000-11ca226 } [551] moving module 09 { 213000-21323e } -> { 11c9000-11c923e } [575] moving module 05 { 212000-21256a } -> { 11c8000-11c856a } [1387] moving module 01 { 1bc000-211dca } -> { 1172000-11c7dca } [351691] moving module 00 { 14a000-1bb4f7 } -> { 1100000-11714f7 } [464120] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x400000 Regions of list 'regions' [ 0, fff] { 1000} Arch BIOS [ 1000, 1fff] { 1000} Kern fiasco [ 2000, 24db] { 4dc} Root mbi_rt [ 9fc00, 9ffff] { 400} Arch BIOS [ f0000, fffff] { 10000} Arch BIOS [ 100000, 10b193] { b194} Sigma0 sigma0 [ 140000, 193363] { 53364} Root moe [ 2d0400, 2df43f] { f040} Boot bootstrap [ 300000, 38ffff] { 90000} Kern fiasco [ 400000, 475fff] { 76000} Kern fiasco [ 11c8000, 11cafff] { 3000} Root Module [ 141d000, 348bfff] { 206f000} Root Module [ 1fffe000, 1fffffff] { 2000} Arch BIOS [ fffc0000, ffffffff] { 40000} Arch BIOS API Version: (87) experimental Sigma0 config ip:0010021c sp:00000000 Roottask config ip:001401f6 sp:00000000 Starting kernel fiasco at 00300854 [1;32mWelcome to Fiasco.OC (ia32)! [0;32mL4/Fiasco.OC ia32 microkernel (C) 1998-2013 TU Dresden Rev: unknown compiled with gcc 4.8.2 for Intel Pentium Pro [] Build: #12 Tue Jan 27 15:29:54 CET 2015 [0m [31mPerformance-critical config option(s) detected: CONFIG_NDEBUG is off [m Superpages: yes Kmem:: cpu page at 1fff8000 (4096Bytes) ACPI-Init ACPI: RSDP[0xf09e0] r00 OEM:BOCHS. ACPI: RSDT[0x203ffbc1] r01 OEM:BOCHS. OEMTID:BXPCRSDT ACPI: FACP[0x203ff1c0] r01 OEM:BOCHS. OEMTID:BXPCFACP ACPI: SSDT[0x203ff234] r01 OEM:BOCHS. OEMTID:BXPCSSDT ACPI: APIC[0x203ffb11] r01 OEM:BOCHS. OEMTID:BXPCAPIC ACPI: HPET[0x203ffb89] r01 OEM:BOCHS. OEMTID:BXPCHPET IO-APIC: MADT = 0x203ffb11 IO-APIC[ 0]: struct: 0x203ffb45 adr=fec00000 IO-APIC[ 0]: pins 24 PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge) PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge) PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge) PIN[ 3m]: vector=23, del=0, dm=physical, dest=0 (high, edge) PIN[ 4m]: vector=24, del=0, dm=physical, dest=0 (high, edge) PIN[ 5m]: vector=25, del=0, dm=physical, dest=0 (high, edge) PIN[ 6m]: vector=26, del=0, dm=physical, dest=0 (high, edge) PIN[ 7m]: vector=27, del=0, dm=physical, dest=0 (high, edge) PIN[ 8m]: vector=28, del=0, dm=physical, dest=0 (high, edge) PIN[ 9m]: vector=29, del=0, dm=physical, dest=0 (high, edge) PIN[10m]: vector=2a, del=0, dm=physical, dest=0 (high, edge) PIN[11m]: vector=2b, del=0, dm=physical, dest=0 (high, edge) PIN[12m]: vector=2c, del=0, dm=physical, dest=0 (high, edge) PIN[13m]: vector=2d, del=0, dm=physical, dest=0 (high, edge) PIN[14m]: vector=2e, del=0, dm=physical, dest=0 (high, edge) PIN[15m]: vector=2f, del=0, dm=physical, dest=0 (high, edge) PIN[16m]: vector=30, del=0, dm=physical, dest=0 (high, edge) PIN[17m]: vector=31, del=0, dm=physical, dest=0 (high, edge) PIN[18m]: vector=32, del=0, dm=physical, dest=0 (high, edge) PIN[19m]: vector=33, del=0, dm=physical, dest=0 (high, edge) PIN[20m]: vector=34, del=0, dm=physical, dest=0 (high, edge) PIN[21m]: vector=35, del=0, dm=physical, dest=0 (high, edge) PIN[22m]: vector=36, del=0, dm=physical, dest=0 (high, edge) PIN[23m]: vector=37, del=0, dm=physical, dest=0 (high, edge) IO-APIC: dual 8259: yes IO-APIC: ovr[ 0] 00 -> 2 0 IO-APIC: ovr[ 1] 05 -> 5 d IO-APIC: ovr[ 2] 09 -> 9 d IO-APIC: ovr[ 3] 0a -> a d IO-APIC: ovr[ 4] 0b -> b d Allocate cpu_mem @ 0xfeffa400 FPU0: SSE Local APIC[00]: version=11 max_lvt=5 APIC ESR value before/after enabling: 00000000/00000000 Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling ACPI: FACS phys=1fffe000 virt=0x203fe000 ACPI: HW sig=0 SERIAL ESC: allocated IRQ 4 for serial uart Absolute KIP Syscalls using: Sysenter Enable MSI support: chained IRQ mgr @ 0xfeffa150 SERIAL ESC: allocated IRQ 4 for serial uart Not using serial hack in slow timer handler. CPU[0]: GenuineIntel (6:6:3:0)[00000663] Model: QEMU Virtual CPU version 2.0.0 at 3392MHz 32 KB L1 I Cache (8-way associative, 64 bytes per line) 32 KB L1 D Cache (8-way associative, 64 bytes per line) 2048 KB L2 U Cache (8-way associative, 64 bytes per line) Freeing init code/data: 24576 bytes (6 pages) Calibrating timer loop... done. MDB: use page size: 22 MDB: use page size: 12 SIGMA0: Hello! KIP @ 400000 Found Fiasco: KIP syscalls: yes allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [4:2000;2fff] [0:3000;9efff] [0:10c000;13ffff] [4:140000;193fff] [0:194000;3fffff] [0:470000;11c7fff] [4:11c8000;11cafff] [0:11cb000;141cfff] [4:141d000;348bfff] [0:348c000;1d70ffff] IOMEM:---------------------- [0:0;fff] [0:9f000;fffff] [0:1fffe000;febfffff] [0:fec01000;fedfffff] [0:fee01000;ffffffff] IO PORTS-------------------------- [0:0;fffffff] MOE: Hello world MOE: found 447912 KByte free memory MOE: found RAM from 2000 to 1d710000 MOE: allocated 471 KByte for the page array @0x3000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [141d000-155648d] [C:503000] l4re BOOTFS: [1557000-17ad742] [C:504000] ned BOOTFS: [11c8000-11c856b] [C:505000] l4lx-gfx.cfg BOOTFS: [17ae000-26be0c4] [C:506000] io BOOTFS: [26bf000-2847ea9] [C:507000] fb-drv BOOTFS: [2848000-2caa07c] [C:508000] mag BOOTFS: [11c9000-11c923f] [C:509000] x86-legacy.devs BOOTFS: [11ca000-11ca227] [C:50a000] l4lx-x86.io BOOTFS: [2cab000-318bccd] [C:50b000] vmlinuz BOOTFS: [318c000-348c000] [C:50c000] ramdisk-x86.rd No fpage received MOE: cmdline: moe rom/l4lx-gfx.cfg MOE: Starting: rom/ned rom/l4lx-gfx.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/l4lx-gfx.cfg' [37mio | Io service[0m [37mio | Find root Pointer[0m [37mio | Find root Pointer: f09e0[0m [37mio | ACPI: RSDP 0xf09e0 00014 (v00 BOCHS )[0m [37mio | ACPI: RSDT 0x1ffffbc1 00034 (v01 BOCHS BXPCRSDT 00000001 BXPC 00000001)[0m [37mio | ACPI: FACP 0x1ffff1c0 00074 (v01 BOCHS BXPCFACP 00000001 BXPC 00000001)[0m [37mio | ACPI: DSDT 0x1fffe040 01180 (v01 BOCHS BXPCDSDT 00000001 BXPC 00000001)[0m [37mio | ACPI: FACS 0x1fffe000 00040[0m [37mio | ACPI: SSDT 0x1ffff234 008DD (v01 BOCHS BXPCSSDT 00000001 BXPC 00000001)[0m [37mio | ACPI: APIC 0x1ffffb11 00078 (v01 BOCHS BXPCAPIC 00000001 BXPC 00000001)[0m [37mio | ACPI: HPET 0x1ffffb89 00038 (v01 BOCHS BXPCHPET 00000001 BXPC 00000001)[0m [37mio | Parsing all Control Methods:[0m [37mio | Table [[0m[37mDSDT](id 0001) - 144 Objects with 18 Devices 52 Methods 8 Regions[0m [37mio | Parsing all Control Methods:[0m [37mio | Table [[0m[37mSSDT](id 0002) - 155 Objects with 32 Devices 42 Methods 1 Regions[0m [37mio | tbxfload-0274 [02] TbLoadNamespace : ACPI Tables successfully acquired[0m [37mio | evxfevnt-0175 [02] Enable : Transition to ACPI mode successful[0m [37mio | evgpeblk-0523 [04] EvCreateGpeBlock : GPE 00 to 0F [_GPE] 2 regs on int 0x9[0m [37mio | Completing Region/Field/Buffer/Package initialization:.....................................[0m [37mio | Initialized [0m[37m9/9 Regions 2/2 Fields 21/21 Buffers 5/5 Packages (308 nodes)[0m [37mio | Initializing Device/Processor/Thermal objects by executing _INI methods:[0m [37mio | Executed [0m[37m0 _INI methods requiring 1 _STA executions (examined 53 objects)[0m [37mio | ACPICA-Version:20121018, System in ACPI MODE, 32bit timer[0m [37mio | evgpeblk-0615 [03] EvInitializeGpeBlock : Enabled 16 GPEs in this block[0m [37mio | IRQ [00000000000000-00000000000000 1] none (32bit) (align=0 flags=40201)[0m [37mio | IRQ [00000000000000-00000000000000 1] none (32bit) (align=0 flags=40201)[0m [37mio | rom/l4lx-x86.io[0m[37m:[0m[37m17[0m[37m.[0m[37m28[0m[37m-[0m[37m36[0m[37 m: warning: could not find '[0m[37mPNP0100[0m[37m'[0m[37m[0m [37mio | Ready. Waiting for request.[0m [37mmag | Hello from MAG[0m [37mfb-drv | Trying execution of ``set VBE mode'' using x86emu[0m [37mfb-drv | Found VESA BIOS version 3.0[0m [37mfb-drv | OEM [0m[37mSeaBIOS VBE(C) 2011[0m [37mfb-drv | VBE mode 0x117 successfully set.[0m [37mfb-drv | Framebuffer memory: phys: fc000000 - fc400000[0m [37mfb-drv | virt: 400000 - 800000[0m [37mfb-drv | Starting server loop[0m [37mmag | mapped frame buffer at 0x400000[0m [37mmag | View::Info:[0m [37mmag | flags: 0[0m [37mmag | size: 1024x768 pos: 0, 0[0m [37mmag | bytes_per_line: 2048[0m [37mmag | buffer_offset: 0[0m [37mmag | RGBA(2): 5(11):6(5):5(0):0(0)[0m [37mmag | memory 400000-800000[0m [37mmag | Plugin: Mag_client service started[0m [37mmag | Plugin: Frame-buffer service started[0m [37mmag | L4INPUT native mode activated[0m [37mmag | L4INPUT: !!! W A R N I N G !!![0m [37mmag | L4INPUT: Please, do not use Fiasco's "-esc" with L4INPUT.[0m [37mmag | L4INPUT: !!! W A R N I N G !!![0m[37m[0m [37mmag | serio: i8042 AUX port at 0x60,0x64 irq 12[0m [37mmag | serio: i8042 KBD port at 0x60,0x64 irq 1[0m [37mmag | input: ImExPS/2 Generic Explorer Mouse on isa0060/serio1[0m [37mmag | input: AT Translated Set 2 keyboard on isa0060/serio0[0m [37mmag | connect "ImExPS/2 Generic Explorer Mouse", isa0060/serio1/input0[0m [37mmag | connect "AT Translated Set 2 keyboard", isa0060/serio0/input0[0m [33ml4linux | PH 0 (t: 1) offs=00001000 vaddr=00400000 vend=007d0000[0m [33ml4linux | phys=[0m[33m00400000 ephys=007d0000[0m [33ml4linux | f_sz=[0m[33m003d0000 memsz=003d0000 flgs=r-x[0m [33ml4linux | PH 1 (t: 1) offs=003d1000 vaddr=007d0000 vend=008e3000[0m [33ml4linux | phys=[0m[33m007d0000 ephys=008e3000[0m [33ml4linux | f_sz=[0m[33m00063316 memsz=00113000 flgs=rw-[0m [33ml4linux | PH 2 (t: 4) offs=002eb18c vaddr=006ea18c vend=006ea1b0[0m [33ml4linux | phys=[0m[33m006ea18c ephys=006ea1b0[0m [33ml4linux | f_sz=[0m[33m00000024 memsz=00000024 flgs=---[0m [33ml4linux | Starting binary at 0x400000, argc=6 argv=0xafff4f90 *argv=0xb1007ff4 argv0=rom/vmlinuz[0m [33ml4linux | External resolver is at 0xa80006f9[0m [33ml4linux | [34;1m======> L4Linux starting... <========[0m[0m [33ml4linux | Linux version 3.16.0-l4 (novasys@ubuntu) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #54 Fri Jan 30 10:35:02 CET 2015[0m [33ml4linux | Binary name: rom/vmlinuz[0m [33ml4linux | Linux kernel command line (5 args): mem=64M console=tty0 l4x_rd=rom/ramdisk-x86.rd root=1:0 ramdisk_size=4000[0m [33ml4linux | CPU mapping (l:p)[1]: 0:0[0m [33ml4linux | Image: 00400000 - 008e3000 [5004 KiB].[0m [33ml4linux | Areas: Text: 00400000 - 007d0000 [3904kB] (a bit longer)[0m [33ml4linux | Data: 007d0000 - 00805700 [213kB][0m [33ml4linux | Initdata: 00807000 - 00834000 [180kB][0m [33ml4linux | BSS: 00834000 - 008cd000 [612kB][0m [33ml4linux | gs=43 fs=43[0m [33ml4linux | Device scan:[0m [33ml4linux | Device: L4ICU[0m [33ml4linux | Device: PCI0[0m [33ml4linux | Device: pci_l4x[0000][0m [33ml4linux | PORT: 0000c040 - 0000c04f[0m [33ml4linux | PORT: 000001f0 - 000001f7[0m [33ml4linux | PORT: 000003f6 - 000003f6[0m [33ml4linux | IRQ: 0000000e - 0000000e[0m [33ml4linux | PORT: 00000170 - 00000177[0m [33ml4linux | PORT: 00000376 - 00000376[0m [33ml4linux | IRQ: 0000000f - 0000000f[0m [33ml4linux | Device: pci_l4x[0001][0m [33ml4linux | IRQ: 0000000b - 0000000b[0m [33ml4linux | MEM: febc0000 - febdffff[0m [33ml4linux | PORT: 0000c000 - 0000c03f[0m [33ml4linux | Device scan done.[0m [33ml4linux | l4x_fiasco_gdt_entry_offset = 9[0m [33ml4linux | rtc not found[0m [33ml4linux | WARNING: RTC server does not seem to be there![0m [33ml4linux | l4lx_thread_create: Created thread 417 (cpu0) (u:b3000e00, v:b3000c00, sp:007d1fac)[0m [33ml4linux | main thread will be 417[0m [33ml4linux | l4x_register_pointer_section: addr = 007d0000 size = 1126400[0m [33ml4linux | section-with-init: Virt: 0x7d0000 to 0x8e2fff [1100 KiB][0m [33ml4linux | section-with-init: Phys: 0x00ab5000 to 0x00bc7fff, [1100 KiB][0m [33ml4linux | Main thread running, waiting...[0m [33ml4linux | WARNING: Unknown wrmsr: 0000008b at 0x410c07[0m [33ml4linux | L4x: Memory size: 64MB[0m [33ml4linux | L4x: Setting superpages for main memory[0m [33ml4linux | L4x: Adjusted memory start: 00400000[0m [33ml4linux | Main memory: Virt: 0xc00000 to 0x4bfffff [65536 KiB][0m [33ml4linux | Main memory: Phys: 0x03800000 to 0x077fffff, [65536 KiB][0m [33ml4linux | l4x: vmalloc area: 04c00000 - 0cc00000[0m [33ml4linux | Filling lower ptabs...[0m [33ml4linux | Done (1819 entries).[0m [33ml4linux | l4x_register_pointer_section: addr = 00400000 size = 3997696[0m [33ml4linux | text: Virt: 0x400000 to 0x7cffff [3904 KiB][0m [33ml4linux | text: Phys: 0x0064f000 to 0x00a1efff, [3904 KiB][0m [33ml4linux | Loading: rom/ramdisk-x86.rd[0m [33ml4linux | INITRD: Size of RAMdisk is 3072KiB[0m [33ml4linux | RAMdisk from 0cd1b000 to 0d01b000 [3072KiB][0m [33ml4linux | rtc not found[0m [33ml4linux | l4lx_thread_create: Created thread 41e (timer0) (u:b3000a00, v:00000000, sp:00861fa8)[0m [33ml4linux | WARNING: Unknown wrmsr: 0000008b at 0x410c07[0m [33ml4linux | WARNING: Unknown rdmsr: 00000186 at 0x80e632[0m [33ml4linux | WARNING: Unknown rdmsr: 00000187 at 0x80e632[0m [33ml4linux | WARNING: Unknown wrmsr: 000000c1 at 0x80e704[0m [33ml4linux | Invalid IO-Port access at pc = 0081c97a port=0x110[0m [33ml4linux | Die message: Trap: 13[0m [33ml4linux | panic: going to sleep forever, bye[0m #################################### l4lx-gfx.cfg ########################### -- vim:set ft=lua: loader = L4.default_loader; local lxname = "vmlinuz"; if L4.Info.arch() == "arm" then lxname = "vmlinuz.arm"; end -- Start io vbus_l4linux = loader:new_channel(); vbus_input = loader:new_channel(); vbus_fbdrv = loader:new_channel(); loader:start( { caps = { sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0); icu = L4.Env.icu; input = vbus_input:svr(); l4linux = vbus_l4linux:svr(); fbdrv = vbus_fbdrv:svr(); }, }, "rom/io rom/x86-legacy.devs rom/l4lx-x86.io"); -- Start fb-drv (but only if we need to) local fb = L4.Env.vesa; if (not fb) then fb = loader:new_channel(); loader:start({ caps = { fb = fb:svr(), vbus = vbus_fbdrv }}, "rom/fb-drv -m 0x117"); end local mag_mag = loader:new_channel(); local mag_svc = loader:new_channel(); -- Start mag loader:start( { caps = { vbus = vbus_input; mag = mag_mag:svr(); svc = mag_svc:svr(); fb = fb; }, }, "rom/mag"); -- Start Linux loader:start( { caps = { log = L4.Env.log:m("rws"), fb = mag_svc:create(L4.Proto.Goos, "g=640x480"); vbus = vbus_l4linux; }, l4re_dbg = L4.Dbg.Warn, log = { "l4linux", "yellow" }, }, "rom/" .. lxname .. " mem=64M console=tty0 l4x_rd=rom/ramdisk-" .. L4.Info.arch() .. ".rd root=1:0 ramdisk_size=4000"); ############################## modules.list ###################################### modaddr 0x01100000 default-kernel fiasco -serial_esc default-bootstrap bootstrap entry L4Linux roottask moe rom/l4lx-gfx.cfg module l4re module ned module l4lx-gfx.cfg module io module fb-drv module mag module x86-legacy.devs module l4lx-x86.io module vmlinuz module ramdisk-x86.rd

2 1

Makefile in l4re
by Harini Balachandran 31 Jan '15

31 Jan '15

Sir, I have some doubts regarding makefile in l4re.What does each statement in a makefile in l4re refer to? For ex,what does REQUIRES_LIBS refer to? Thank you.

2 1

SOCKET PROGRAMMING IN L4RE
by Sushma Rao 31 Jan '15

31 Jan '15

Sir, 1.Is it possible to perform client server communication using sockets in l4re? If so, what libraries should be added to the code? 2.Does l4re supports native c++ code or should we write specific code for l4re to execute client server communication?

2 1

kobject kinvoke from ned
by teclis High Elf 31 Jan '15

31 Jan '15

Is there a way to send commands to the kinvoke method of a kobject from a ned script? I saw in l4/pkg/ned/doc/ned.dox that an IPC gate can be used to send an io stream directly from a ned script. Is there some lua sample code I could look at that shows making a kinvoke call of a kobject from a ned script? thanks

3 3

is there any step by step document?
by 水镜 29 Jan '15

29 Jan '15

hi , is there any step by step document about l4 kernel?‍

2 1

[Out-Of-Topic]How to Access Input GPIO of OMAP4460 without L4Re (direct access)
by Erry Pradana Darajati 28 Jan '15

28 Jan '15

Hi L4 Hackers, My subject seems out of topic, but i don't know where i can ask this kind of thing, and i think there are many people have a knowledge about this subject. I have a problem. I want to directly access GPIO140 (in GPIO5 ball) as input. I have a function to print the value of GPIO5_DATAIN (0x4805 B138). But when i print that out, the value of it still not changed (zero value). I Conclude, the pin still not accepting the input. I have already done these things : 1. Set GPIO5_OE to 0x1 2. See the value of MCSPI1_CS3 Pad Configuration (0x4A10 013C) and it give me value like this (0x011B 001B) which is for GPIO_140 -> MUX_MODE=gpio_140. PULLUDENABLE=0x1(enable). PULLTYPESELECT=0x1(enable). Which is in my current knowledge, is a right setting for accepting input. But still, it's still not successful So where or what did i miss ? is it still any configuration / address to set ? I appologize for the Out-of-Topic Subject .Thank you for any answer and suggestion and help. -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

3 2

SERVICES
by Sushma Rao 28 Jan '15

28 Jan '15

Can you please suggest a simple kernel service(like ipc) which is not present in l4re but already existing in linux?

2 1

ERROR WHILE INSTALLING L4RE
by Sushma Rao 27 Jan '15

27 Jan '15

Sir when I execute the command make O=path/to/builddir while building l4re I got this error How to resolve it

3 2

Help in booting L4Linux(on Freescale i.MX6Q) using root file system on SD card.
by taeung 27 Jan '15

27 Jan '15

Hi, l4 hackers Is there anybody who can a bit give hints about SD card on L4 Linux to him ? On 01/26/2015 09:10 PM, Praveen B wrote: > Hi Taeung, > > Thank you very much. > > It is part of my Masters project. > My project is to run L4Android using Genode(www.genode.org > <http://www.genode.org>) framework on Freescale i.MX6 board. > But root filesystem has to be present on microSD Card. So I am trying > to enable SD card support for L4Linux right now. > > The guide describes how to enable Ethernet controller. Did you try to > enable SD card controller as well? Is it difficult than this? Yes I tried to enable SD card. But I couldn't do it. Because I didn't complete modifying 'mach_setup.c' in L4 linux to enable SD card. > > I have some doubts. > How do I give names such as, > NIC => new Device() --name: NIC > .hid = "imx6q-fec.0"; --imx6q-fec.0 > "imx6q-fec.dev" --imx6q-fec.dev > > Are they just arbitrary? Can I use any names of my choice if I want to > enable SD card support? Yes, but the name have to make a pair with the name of argument for 'l4x_register_platform_device_callback()' function. but I'm not sure it. > > The guide still uses ramdisk and not some other rootfs, isn't it? > Can I modify .cfg file so that I can boot from SD card > like(//dev/mmcblk1p1)?/ > In my opinion, in order to enable SD card in L4 you have to do as below.. 1. Register SD card in io server 2. Modify mach_setup.c for SD card 3. Modify SD card driver source code for L4 (if it is needed to enalbe SD card in L4) For anything I know, three things is my thought. Is there anybody who can a bit give hints to him ? > Thank you again for creating such a good guide for beginners like me. My pleasure, I had lots of help from l4-hackers. Thanks, Taeung > > Regards > Praveen > > > > On Mon, Jan 26, 2015 at 9:20 AM, taeung <treeze.taeung(a)gmail.com > <mailto:treeze.taeung@gmail.com>> wrote: > > Hi Praveen :-) > > Here it is > https://www.dropbox.com/s/os65yqiieay83hs/L4_Porting_and_Device_Driver_Guid… > > I'm sorry to be so late. > I forgot it. > > Cheer up ! > > Would you mind if I ask you a question about working on L4 Linux ? > Is the project homework from your university ? > > Thanks, > Taeung > > > > On 01/23/2015 06:47 PM, Praveen B wrote: >> Hi Taeung, >> >> I'm a student, working on L4Linux as part of my project. I am >> using Freescale i.MX6Q board. I'm trying to boot using root >> filesystem on SD card. But could not understand, how I could do it. >> >> It seems(from l4-hackers mailing list) that you have already >> tried to boot L4Linux using a different root filesystem than >> ramdisk on freescale i.mx6q board. >> >> Could you help me in doing this? >> >> I've read your post, >> http://os.inf.tu-dresden.de/pipermail/l4-hackers/2014/006463.html. >> But I could not find the file, >> https://www.dropbox.com/s/abj9ao5uk9r3w72/The_Guide_to_access_HW_on_L4Linux… >> >> It gives 404 error. *It would be very helpful if you can provide >> this file.* >> >> Please send the file or give any suggestions how I can proceed. >> >> Thank you >> Praveen > >

1 0

Clock/Power Management Framework on L4
by Li Qiu 26 Jan '15

26 Jan '15

Hi, Hackers, Under Linux, the clock framework defines programming interfaces to support software management of the system clock tree. Is there similar framerwork/server on L4 variants? Any information related to it would be useful. Thanks! -Li

2 1

User-level objects
by li94575 23 Jan '15

23 Jan '15

Hi， As I know, we can set access permissions for the kernel objects, and access to user-level objects is through IPC_Gate. So, can I set access permissions for user-level objects through the IPC_Gate? Another question is that If multiple clients need to access a particular service object, do they use different IPC_Gate or the same?

3 6

CLIENT SERVER COMMUNICATION
by Sushma Rao 23 Jan '15

23 Jan '15

my objective is client has to get input at client side and send it to server and server should reply to the message got from the client during runtime. How to do that?

3 2

1st Microkernel Stammtisch 2015
by Julian Stecklina 23 Jan '15

23 Jan '15

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Dear Microkernel Hackers in and around Dresden, let's meet for a drink and trade stories! Where: Campus, Hübnerstr. 13, Dresden, Germany When: Thursday, Jan 29th, 2015 @ 20:00 CET Please leave an entry in this doodle, if you plan to join, so we can reserve a sufficiently large table: http://doodle.com/ktv4nrn5wutg569w Feel free to forward this mail, Julian -----BEGIN PGP SIGNATURE----- Version: OpenKeychain v3.1.2 iGcEAREIACcgHEp1bGlhbiBTdGVja2xpbmEgPGpzQGFsaWVuOC5kZT4FAlTCHuIA CgkQ2EtjUdW3H9kobACfSvmrOIxq/sOggHb78yVTzuKbGi4AoOxiBKy7UUBP/WbY XP3xTD4Trk3q =4V+q -----END PGP SIGNATURE-----

1 0

L4LINUX
by Sushma Rao 23 Jan '15

23 Jan '15

how to execute snort(IDS-Intrusion detection system) upon the paravirtualised linux layer ie.L4linux. please assist us by giving steps for its building and execution. thanks in advance :)

2 1

PROBLEM WHILE GETTING INPUT IN RUNTIME
by Sushma Rao 23 Jan '15

23 Jan '15

I successfully executed the client-server application in l4 re pkg folder. Now,I would like to implement chat server application in l4re, program does not take the values at run time. So I am unable to make client and server communicate with each other.I have included libc_be_file_stdin. kindly let me know how to make it run.If possible, can you give us the source code of simple chat server.

2 1

Is anyone has experience with pandaboard omap4460？
by Zachary 22 Jan '15

22 Jan '15

Hi, I want to buy a pandaboard to run L4Android. Dose L4Android supports omap4460? Is anyone has experience with it? Best, Zachary

5 12

executing snort(IDS)on l4 linux
by Vidya Lakshmi 22 Jan '15

22 Jan '15

Greetings sir, We have been trying to run networking applications like IDS (SNORT) in L4RE. We are able to run IDS on Ubuntu. Can we use the same IDS application on the para-virtualized Linux(L4 Linux) environment without modifying the IDS application OR should we generate modules.list and conf files for its execution. Also please suggest us any network security application to run on l4RE-FIASCO.OC. Please guide us. Thanking you, Regards R.Vidya Lakshmi

2 1

client server communication
by Gayathri Nagarajan 22 Jan '15

22 Jan '15

I executed the simple client server application, which is inside the l4 pkg directory of l4re. But, in that application, input is given inside the program itself. I want to take the input from user and send it to server through IPC GATE and the server has to respond to client (which will again be given by user). I tried using scanf, cin, sscanf, io.read...but the program takes only the garbage values. I am unable to give input in qemu... It would be helpful if some sample code is given for such kind of applications wherein the user inputs at run time... Gayathri

1 0

L4linux build problem
by Gayathri Nagarajan 21 Jan '15

21 Jan '15

I am trying to build l4linux. Version of l4linux - 3.16.0 I am using fiasco.oc and l4re I configured using the command : sudo make O=build/kernel menuconfig and changed the path to l4re build directory in l4linux configuration. The following errors come when I build it. user@user-VirtualBox:~/src/l4re/src/l4linux$ sudo make O=build/kernel make[1]: Entering directory `/home/user/src/l4re/src/l4linux/build/kernel' GEN ./Makefile scripts/kconfig/conf --silentoldconfig Kconfig =============================================== For quick build instructions, please visit: http://wiki.tudos.org/Quickstart http://l4linux.org/build.shtml =============================================== ERROR: CONFIG_HIGHMEM64G must not be enabled. ERROR: CONFIG_PCI_GOANY must not be enabled. ERROR: CONFIG_X86_MCE must not be enabled. ERROR: CONFIG_X86_MCE must not be enabled. ERROR: CONFIG_MTRR must not be enabled. ERROR: CONFIG_PARAVIRT must not be enabled. ERROR: CONFIG_KEXEC must not be enabled. ERROR: CONFIG_CPU_FREQ must not be enabled. ERROR: CONFIG_VM86 must not be enabled. ERROR: CONFIG_HT_IRQ must not be enabled. ERROR: CONFIG_DMI must not be enabled. ERROR: CONFIG_TRANSPARENT_HUGEPAGE must not be enabled. ERROR: CONFIG_COMPACTION must not be enabled. ERROR: CONFIG_X86_PAE must not be enabled. ERROR: CONFIG_X86_SMAP must not be enabled. ERROR: CONFIG_PNP must not be enabled. ERROR: CONFIG_HPET_TIMER must not be enabled. make[1]: *** [check_linux_config] Error 1 make: *** [sub-make] Error 2 I tried reconfiguring again to diable the features mentioned above. But I could not find the location of the above features in the menu-based window. Please help to resolve the problem. Gayathri

2 1

Device Driver Terminology
by teclis High Elf 21 Jan '15

21 Jan '15

Hi maybe this is an overly pedantic point but is there a specific term for device drivers in L4Re? In QNX they call them resource managers because they perform the same function as a device driver in a monolithic OS such as Linux but they run in their own address space like a POSIX process and behave like daemon. User space driver isn't really appropriate either because they don't have the same restrictions as user space drivers in a monolithic OS.

3 2

Re: Bash-script with l4re-App
by Björn Döbel 20 Jan '15

20 Jan '15

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi Waldo, please send your questions to the l4-hackers(a)os.inf.tu-dresden.de mailing list. On 19.01.2015 20:59, Waldo Paz Rodriguez wrote: > hello l4hacker, I am working with yse5250 card and I need in > implement a driver for a sensor of this card, using L4Re, but I > cant find an example of make this. Can you help me? That is a fairly vague question, so I can only give you a vague answer. In general, device drivers request IO resources (IRQs, IO memory) from a resource manager and then use these resources to manage their device. The interface to request those resources is specified by the IO libraries, which you find either in l4/pkg/libio-direct or l4/pkg/libio-io. Some example drivers can be found in l4/pkg/drivers. If you have more specific questions, please do not hesitate to ask them on the mailing list. Hth, Bjoern - -- Dr.-Ing. Bjoern Doebel Mail: doebel(a)tudos.org TU Dresden, OS Chair Phone: +49 351 463 38 799 Noethnitzer Str. 46 Fax: +49 351 463 38 284 01187 Dresden, Germany WWW: http://www.tudos.org/~doebel - -- "When the seagulls follow the trawler, it's because they think sardines will be thrown into the sea." (Eric Cantona) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlS+GbUACgkQP5ijxgQLUNnVkACeImBFYz/a1sEMWFYz4FJhOhvI uZkAnRuFmsAEzjsK2f73LVfND22kMNnI =XnBR -----END PGP SIGNATURE-----

1 0

Compare security of normal OS and Fiasco.oc with L4re
by Gayathri Nagarajan 19 Jan '15

19 Jan '15

How to show that an application running on l4re with fiasco.oc is more secure than running the same application on normal operating system? Which application can be chosen for proving the security aspects of l4re? Some of which that I know are 1. DMS - Denial of mitigation system 2. IDS - Intrusion Detection system 3. Firewall etc... But I want a very basic and simple application to demonstrate the security when compared with running the same on normal os. Help needed. Gayathri

2 1

build system library path
by teclis High Elf 15 Jan '15

15 Jan '15

If I create a new library is there a library include path in the Fiasco/L4Re build system that I need to add my new library to before I can link to it? thanks

2 1

Source Code of the Monitoring Frameworks FERRET and HAECER
by Karl Steger 13 Jan '15

13 Jan '15

Hi L4 hackers, Would it be possible to make the source code of the monitoring frameworks FERRET [http://os.inf.tu-dresden.de/papers_ps/pohlack-phd.pdf] and HAECER [http://os.inf.tu-dresden.de/papers_ps/haehnel-diplom.pdf] public? I would like to develop a generic monitoring framework with similar capabilities for L4Re. Even if the code was not up to date with the current release or still pertained to L4Env, it would help me greatly. Thanks and regards, Karl

4 3

Problem with running client-server application in l4re
by Gayathri Nagarajan 13 Jan '15

13 Jan '15

I am able to generate "clntsrv.iso" image for the clntsrv application given in l4/pkg/examples directory. But when i execute in qemu, i get * BOOTFS: [1418000-154fef5] [C:503000] l4re* * BOOTFS: [1550000-162e6e6] [C:504000] clntsrv-client* * BOOTFS: [162f000-1714483] [C:505000] clntsrv-server* *No fpage received* *MOE: cmdline: moe --init=rom/clntsrv-server* *MOE: Starting: rom/clntsrv-server * *MOE: loading 'rom/clntsrv-server'* *Could not register my service, is there a 'calc_server' in the caps table?* *MOE: task 1565571 exited with 1* Please help... Gayathri

2 1

PF_RING installation on l4re
by Vidya Lakshmi 07 Jan '15

07 Jan '15

sir, I'm very new to fiasco microkernel. I need assistance for running PF_RING on top of l4re. Please give us guidelines/procedure for the same. Thanks in advance.

2 1

Re: L4Re GPIO
by Erry Pradana Darajati 05 Jan '15

05 Jan '15

>Hi >This piece of code is missing the mapping of the GPIO4's MMIO region. For your >client program to successfully access the GPIO chip you need to create a virtual >device in IO's lua configuration file. Then you attach this device to a virtual bus. In the >startup script you hand IO's capability to that virtual bus to the 'vbus' cap of your >client. Then you client can query its vbus to discover connected devices and their >resources (see documentation of libvbus for reference). Then your client can map the >GPIO's chip MMIO region. > >Best, >Matthias. Thank you for the explanation. I am reading through the libvbus doc right now. I'm still not fully understand but if i conclude the method to access the gpio of omap4460 in Pandaboard is : Define the res.mmio(address) in lua .dev script. Make vbus capabilities in .cfg. Make a program that can access GPIO via vbus with a client-server concept? I'm sorry i'm not fully understand about this, but what is the server of this client i am making. Also, before i your email, i already 'porting' a omap4460-chip driver in io module. and editing the .devs file so it matches with the memory of omap4460 (The two file is attached). Is my step right, and after that what should i do to be able to access it via my main program. When i try to compile the omap44x2.c it give me error like attached below. Is it because i'm not insert all of the virtual function in my program ? because actually i am not really in my goal in the mean time. I really appreciate and say biggest thanks with any of your suggestion and answer P.S : I am attaching my current main program just in case. And i still access it directly. without main2.c : http://pastebin.com/eZKqy1LE omap44x2.c : http://pastebin.com/0hupnnyR arm-omap4.devs : http://pastebin.com/pK6k7F5y error output : http://pastebin.com/s2skR3wu

4 3

L4Android on Pandaboard
by Lin 05 Jan '15

05 Jan '15

Hi hackers, I'm trying to get L4Android working on a PandaBoard ES(OMAP 4460). I managed to run Fiasco and L4Linux successfully, but L4Android give me some error: Welcome to Fiasco.OC (arm)! L4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden Rev: unknown compiled with gcc 4.7.3 for Pandaboard [] Build: #1 Tue Dec 23 16:44:35 CST 2014 Per_cpu_data_alloc: (orig: 0xf005e290-0xf005ec58) Allocate 2504 bytes (2KB) for CPU[2] local storage (offset=118bd70, 0xf11ea000-0xf11ea9c8) Number of CPUs: 2 Calibrating timer loop... Per_cpu_data_alloc: (orig: 0xf005e290-0xf005ec58) Allocate 2504 bytes (2KB) for CPU[1] local storage (offset=118dd70, 0xf11ec000-0xf11ec9c8) done. FPU1: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl MDB: use page size: 20 Cache config: ON MDB: use page size: 12 ID_PFR[01]: 00001231 00000011S ID_[DA]FR0: 00010444 00000000 IID_MMFR[04]: 00100103 20000000 01230000 00102111 GCPU[1]: goes to idle loop MA0: Hello! KIP @ 80002000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [4:80000000;80000fff] [0:8006f000;8008ffff] [0:80097000;80097fff] [0:8009f000;8013ffff] [4:80140000;8016efff] [0:8016f000;8016ffff] [4:80170000;80186fff] [0:80187000;810fffff] [4:81100000;8451bfff] [0:8451c000;bbffffff] IOMEM:---------------------- [0:0;7fffffff] [0:bd000000;ffffffff] MOE: Hello world MOE: found 928900 KByte free memory MOE: found RAM from 80000000 to bc000000 MOE: allocated 960 KByte for the page array @0x80187000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [81100000-81119458] [C:503000] l4re BOOTFS: [8111a000-8116cc04] [C:504000] ned BOOTFS: [8116d000-812bb454] [C:505000] io BOOTFS: [812bc000-81353c44] [C:506000] mag BOOTFS: [81354000-81375624] [C:507000] fb-drv BOOTFS: [81376000-81376666] [C:508000] l4_gingerbread-arm.cfg BOOTFS: [81377000-81377589] [C:509000] arm-rv-eb-mc.devs BOOTFS: [81378000-8137810a] [C:50a000] l4_android-arm.vbus BOOTFS: [81379000-8177247c] [C:50b000] l4linux.android-arm BOOTFS: [81773000-81873000] [C:50c000] root-arm-ginger.img BOOTFS: [81873000-8451c000] [C:50d000] system-arm-ginger.img MOE: cmdline: moe rom/l4_gingerbread-arm.cfg MOE: Starting: rom/ned rom/l4_gingerbread-arm.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/l4_gingerbread-arm.cfg' io | Io service io | Ready. Waiting for request. mag | Hello from MAG fb | Using LCD driver: ARM AMBA PrimeCell 11x Here is my modules.list file: entry lx_ginger-arm roottask moe rom/l4_gingerbread-arm.cfg kernel fiasco -serial_esc module l4re module ned module io module mag module fb-drv module l4_gingerbread-arm.cfg #from L4Android website module arm-rv-eb-mc.devs #from l4re-snapshot-2014092821/src/l4/pkg/io/config module l4_android-arm.vbus #from l4re-snapshot-2014092821/src/l4/pkg/io/config module l4linux.android-arm module root-arm-ginger.img module system-arm-ginger.img Any ideas on what's going wrong or next steps I can take to diagnose the issue? Thanks! Best regards, Lin

2 1

Re: Iostream and string in L4Re
by Erry Pradana Darajati 05 Jan '15

05 Jan '15

Hi, I already fix the line to this line >> REQUIRES_LIBS += libc_be_file_stdin libstdc++ but it still gave error. But the error is not in the compiler. It's on the linker. My code is like this : char cmd[12] ; printf("Initialization Finished\n"); while(1) { printf("erry@erry-OS : \t"); gets(cmd); if(strcmp(cmd,"clear")==0) { ............. It gives undefined referenced error to gets in main.o (Liunker error not compiler error). Where do i go wrong. And also, how to use getline() in this scope ? >> And also, how to make hello-cfg be able to accept keyboard input. I have >> already include libc_be_file_stdin and include line below in my hello.cfg >> but it still not working : >> >> *L4.default_loader:start({ caps = { log = L4.Env.log,},l4re_dbg = >> L4.Dbg.Warn,log = { "l4linux", "yellow" },}, "rom/hello");* > >That looks ok to me. How are you trying to get the input in your >program? I'm trying to get input using getchar(). But when i load the kernel. It's still skips the input sequence and going into loop (I'm accpeting the keyboard input inside While(1)) Thank you for any help -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

2 1

Re: L4Re GPIO
by Erry Pradana Darajati 28 Dec '14

28 Dec '14

>> 1. I want to QEMU to accept input from keyboard to emulate and study how to >> use an configure of IO. I study this as a part of my main goal to access >> GPIOs of Pandaboard. Well, in my last email i stated that i already include > x86-legacy.devs module in modules.list, and define >> REQUIRES_LIBS=libc_be_file_ >stdin, and using "default-kernel fiasco >> -serial_esc" defined. But, it still not respond to any of my keyboard >> input. So, what did i miss? > >The x86-legacy.devs is for x86-based platforms. The pandaboard is ARM >based, so you do not need that file there. Also, the input here is also >based on the UART that is driven by the kernel, so there's no driver >necessary in user-land here. As already questioned in the other mail, >how are you trying to get the input in your program? Yes, I am testing this scenario in QEMU using x86 Build. The purpose of this testing is to understand how to access and use the IO using L4Re. Because i'm still not fully understand about it. So i'm trying to make a L4RE Build x86, boot it in the QEMU and directly access using keyboard input (not via serial). But i still cannot do that. In Pandaboard ARM. i am already understand and be able to access keyboard via UART3 >> 2. I have modified omap3 driver that included in the package to be used >> with omap4460 registers, but i have a few difficulties. There are few >> missing registers (like Clr_irq_enable1 register that not present in >> OMAP4460) and i am still cannot comprehend the scm_offset table. Because >> when i crossreferencing the source with the OMAP3 TRM the i cannot >> understand the value. My question is. Is it be able to use only some of the >> defined register to do simple IO task, and enable or disable register ? > >I've not written the particular code, but the scm_offset seems to select >a specific gpio block. >For starting to work on a driver I recommend to start with a simple >program and directly work on the MMIO. This helps to understand how the >device is working. When basic things work, such as switching pins >on/off, settings directions, interrupts, etc things can be integrated. I am studying to directly access the GPIO. So if i wrote simple program (let's say main.c program in testGPIO module that i created myself). I don't need to call the .devs and .io or call the driver module ? And also, i already make successful block code to access GPIO but not using L4Re API. But it cannot be implemented in L4Re Block code. It's something like this : http://pastebin.com/TMc9ieBr Thank you, and i really appreciate any answer and helps. -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

2 1

Paper: undermine memory isolation in Fiasco OC covert channels
by teclis High Elf 23 Dec '14

23 Dec '14

Hi, These researchers from TU Berlin claim to be able to undermine memory isolation in Fiasco OC through the use of covert channels. I'd be very interested to hear the opinion of the Fiasco experts. (Could a system built on Fiasco be hardened against such an attack be adding access control for UDP ports)?? http://eprint.iacr.org/2014/984.pdf

3 4

Re: L4Re GPIO
by Erry Pradana Darajati 22 Dec '14

22 Dec '14

Thank you for the help in my last email. I want to continue the question from my last email. 1. I want to QEMU to accept input from keyboard to emulate and study how to use an configure of IO. I study this as a part of my main goal to access GPIOs of Pandaboard. Well, in my last email i stated that i already include x86-legacy.devs module in modules.list, and define REQUIRES_LIBS=libc_be_file_stdin, and using "default-kernel fiasco -serial_esc" defined. But, it still not respond to any of my keyboard input. So, what did i miss? 2. I have modified omap3 driver that included in the package to be used with omap4460 registers, but i have a few difficulties. There are few missing registers (like Clr_irq_enable1 register that not present in OMAP4460) and i am still cannot comprehend the scm_offset table. Because when i crossreferencing the source with the OMAP3 TRM the i cannot understand the value. My question is. Is it be able to use only some of the defined register to do simple IO task, and enable or disable register ? Below, i paste the link source : http://pastebin.com/fPSmZQBu Thank you for any suggestion and answer 2014-12-05 18:00 GMT+07:00 <l4-hackers-request(a)os.inf.tu-dresden.de>: > > Send l4-hackers mailing list submissions to > l4-hackers(a)os.inf.tu-dresden.de > > To subscribe or unsubscribe via the World Wide Web, visit > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > or, via email, send a message with subject or body 'help' to > l4-hackers-request(a)os.inf.tu-dresden.de > > You can reach the person managing the list at > l4-hackers-owner(a)os.inf.tu-dresden.de > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of l4-hackers digest..." > > > Today's Topics: > > 1. Re: L4Re GPIO (Adam Lackorzynski) > 2. Re: JDB percent CPU usage (Adam Lackorzynski) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Thu, 4 Dec 2014 23:53:01 +0100 > From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: Re: L4Re GPIO > Message-ID: <20141204225301.GA4644(a)os.inf.tu-dresden.de> > Content-Type: text/plain; charset=iso-8859-1 > > Hi, > > On Thu Dec 04, 2014 at 14:57:14 +0700, Erry Pradana Darajati wrote: > > I have some follow up question from my last email. > > > > 1. About GPIO. So IOs defined on LUA script. So in OMAP4460, is gonna be > > like this, isn't it ? > > Principally yes. > > > I have a question in line of this code. > > > > GPIO = Hw.Device(function() > > GPIO1 = Hw.Gpio_omap46x_chip(function( > > ) > > hid = "gpio-omap46x-GPIO1"; > > compatible = {"ti,omap4-gpio"}; > > regs = Res.mmio(0x4A310000, 0x4A310194); // This one is range of > > Address GPIO1 used > > Yes. > > > irq = Res.irq(29); //This one is IRQ of GPIO1 ? What is the meaning > > of irq(29) ? > > This is the IRQ number for the GPIO chip. The driver in IO will then > generate IRQs for the specific pins by reading hardware registers of the > GPIO chip. > > > scm_table = 0; // I still don't understand about this line > > This selects the specific GPIO block. It is a driver-internal selection. > > > end); > > end); > > > > And where can i read the reference about another parameters of this ? > (Like > > there pins parameter in raspi b. And there are mems instead of regs) > > The specific ones are driver specific so you should check the driver in > io (pkg/io/server/src/drivers/gpio/*). > > I guess a driver for the 4460 won't be so different from the omap3 one > so maybe it can be modified. > > > 2. I try the L4Re with x86 build run in QEMU. And want it to accept my > > keyboard input. So i need to include x86-legacy.devs module in > modules.list > > and define REQUIRES_LIBS=libc_be_file_stdin isn't it ? > > But after i've done it, it still doesn't accept keyboard input. what did > i > > miss ? > > For what purpose do you want it to accept input? Maybe just a missing > -serial_esc option on Fiasco's command line? > > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > > > ------------------------------ > > Message: 2 > Date: Thu, 4 Dec 2014 23:57:32 +0100 > From: Adam Lackorzynski <adam(a)os.inf.tu-dresden.de> > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: Re: JDB percent CPU usage > Message-ID: <20141204225732.GB4644(a)os.inf.tu-dresden.de> > Content-Type: text/plain; charset=iso-8859-1 > > Hi jason, > > On Wed Dec 03, 2014 at 20:11:03 -0500, teclis High Elf wrote: > > Is there a way to get percent CPU usage (or any other resource usage ) > from > > JDB? So if I suspect that one task has run amok and is monopolizing the > CPU > > I can search for it using JDB. > > CPU usage is not directly possible with jdb as jdb only has a current > view with the system being stopped. What usually works quite ok is to > check for 'ready' threads (with 'lp' jdb command) a couple > of times and see if one or some are ready besides the kernel idle > threads all the time. > > > > Adam > -- > Adam adam(a)os.inf.tu-dresden.de > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > > > ------------------------------ > > Subject: Digest Footer > > _______________________________________________ > l4-hackers mailing list > l4-hackers(a)os.inf.tu-dresden.de > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > > > ------------------------------ > > End of l4-hackers Digest, Vol 140, Issue 5 > ****************************************** > -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

3 2

JDB and sigma0
by teclis High Elf 21 Dec '14

21 Dec '14

Is there a way to use JDB to query sigma0 to see which task owns an address? Say for example I have a virtualization system built using Fiasco L4Re and all I have is the instruction pointer for where a potential problem, possibly a memory leak. Is there a way to use JDB to find out which task the L4Re system thinks owns that address?

2 1

iostream and string in L4Re
by Erry Pradana Darajati 21 Dec '14

21 Dec '14

Hello, L4-hackers. i have a short question. Is iostream and string functions present in L4Re. Since i cannot use it. I have already included the line below in my makefile : *REQUIRES_LIBS += libc_be_file_stdin libstdc++ cxx_libc_io cxx_io* And also, how to make hello-cfg be able to accept keyboard input. I have already include libc_be_file_stdin and include line below in my hello.cfg but it still not working : *L4.default_loader:start({ caps = { log = L4.Env.log,},l4re_dbg = L4.Dbg.Warn,log = { "l4linux", "yellow" },}, "rom/hello");* Thank you for the answers -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

2 1

Problem with running hello world application in l4re
by Gayathri Nagarajan 21 Dec '14

21 Dec '14

I am running ubunthu in 32-bit Oracle VM, but using 64-bit host windows 8. When I use *1. l4re-build$ make grub2iso E=hello MODULE_SEARCH_PATH=/src/kernel/fiasco/mybuild * I get.... make[1]: Entering directory `/home/ubunthu/src/l4' Processing entry 'hello' Could not find 'fiasco' with path ':/home/ubunthu/src/l4/path/to/builddir/bin/x86_586:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586/l4f:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586/l4f' make[1]: *** [grub2iso] Error 1 make[1]: Leaving directory `/home/ubunthu/src/l4' make: *** [grub2iso] Error 2 *2. l4re-build$ make qemu E=hello MODULE_SEARCH_PATH=/src/kernel/fiasco/mybuild* I get.... make[1]: Entering directory `/home/ubunthu/src/l4' Could not find 'fiasco' with path '/path/to/fiasco-build:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586:/home/ubunthu/src/l4/path/to/builddir/bin/x86_586/l4f:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586:/home/ubunthu/src/l4/path/to/builddir/lib/x86_586/l4f' make[1]: *** [qemu] Error 1 make[1]: Leaving directory `/home/ubunthu/src/l4' make: *** [qemu] Error 2 Gayathri

2 1

DARPA funds building stuff on seL4
by Gernot Heiser 18 Dec '14

18 Dec '14

DARPA has just issued a SBIR call titled "Secure Software Components Leveraging the seL4 Microkernel”, see https://www.dodsbir.net/sitis/display_topic.asp?Bookmark=45918 The SBIR program funds “small” enterprises (that’s <500 employees in US speak) that are majority US-owned. The program clearly aims at developing an ecosystem around seL4. In the past US company that won SBIR projects sub-contracted some of the work to NICTA, so there seems to be no problem in involving foreign entities as subcontractors. Gernot

1 0

Re: Need help profiling with Valgrind
by Björn Döbel 12 Dec '14

12 Dec '14

Dear Reinier, Am 05.11.2014 um 23:22 schrieb Reinier Millo Sánchez: > Hello Aaron > I'm working in a project to develop an embedded operating system for > real time purposes using Fiasco.OC as microkernel. I have reviewed you > article "Capability Wrangling Made Easy: Debugging on a Microkernel with > Valgrind". I'm interested to do son profiling tests with Fiasco.OC and > Linux Kernel, using Valgrind. Do you have ported Valgrind to the > Fiasco.OC microkernel interface? Is the port available? please let us use the l4-hackers mailing list for further discussion. Indeed we ported Valgrind to Fiasco.OC and L4Re. Its source code is available in the L4Re SVN in l4/pkg/valgrind. As you might have noticed, our paper was in 2010 and if I remember correctly, the Valgrind version in the repository was last updated around 2011. It might still work, but you may also encounter problems. Feel free to try this out and let us know about any questions you have. Apart from that there may be other ways of achieving your profiling needs on top of Fiasco.OC. What exactly would you want to do? Kind regards, Bjoern

4 30

JDB percent CPU usage
by teclis High Elf 04 Dec '14

04 Dec '14

Is there a way to get percent CPU usage (or any other resource usage ) from JDB? So if I suspect that one task has run amok and is monopolizing the CPU I can search for it using JDB. danke sehr

2 1

L4Re GPIO
by Erry Pradana Darajati 04 Dec '14

04 Dec '14

Hi, L4 Hackers Thanks for the answer on my last email. I have some follow up question from my last email. 1. About GPIO. So IOs defined on LUA script. So in OMAP4460, is gonna be like this, isn't it ? I have a question in line of this code. GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap46x_chip(function( ) hid = "gpio-omap46x-GPIO1"; compatible = {"ti,omap4-gpio"}; regs = Res.mmio(0x4A310000, 0x4A310194); // This one is range of Address GPIO1 used irq = Res.irq(29); //This one is IRQ of GPIO1 ? What is the meaning of irq(29) ? scm_table = 0; // I still don't understand about this line end); end); And where can i read the reference about another parameters of this ? (Like there pins parameter in raspi b. And there are mems instead of regs) 2. I try the L4Re with x86 build run in QEMU. And want it to accept my keyboard input. So i need to include x86-legacy.devs module in modules.list and define REQUIRES_LIBS=libc_be_file_stdin isn't it ? But after i've done it, it still doesn't accept keyboard input. what did i miss ? I appreciate any answer and reference. And thanks for the answer -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

2 1

Fail to run compiled ARM on Odroid Q2
by Zachary 03 Dec '14

03 Dec '14

Hi, I want to use fastboot to run the Hello demo of Fiasco on Odroid-Q2 board[1]. However, I failed. Firstly, I use make fastboot_rawimage E=hello MODULE_SEARCH_PATH=... The UART output is: Starting download of 935936 bytes downloading of 935936 bytes finished Kernel size: 000e4000 Ramdisk size: 00000000 Booting raw image.. Boot with zImage Wrong Ramdisk Image Format [err] boot_get_ramdisk Starting kernel ... Hello from Startup::stage2 Per_cpu_data_alloc: (orig: 0xf0060ad0-0xf0061550) Number of IRQs available at this GIC: 160 FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl KERNEL: Warning: No page-fault handler for 0xee202108, error 0x94000848, pc f004 It is said the format is wrong, so I change to make fastboot_uimage E=hello MODULE_SEARCH_PATH=... The UART output: downloading of 937984 bytes finished Kernel size: 000e4040 Ramdisk size: 00000000 Booting kernel.. ## Booting kernel from Legacy Image at 40008000 ... Image Name: L4 Image #4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 933888 Bytes = 912 KiB Load Address: 41000000 Entry Point: 41000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK And nothing happen. So what`s the problem? Thanks, Best Regards, Zachary [1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G135278861948&…

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Re: [ASK] Basic L4Re
by Matthias Lange 01 Dec '14

01 Dec '14

Hi, I'm posting this on l4-hackers also, as it might be of interest for other people as well. On 11/27/2014 04:27 PM, Erry Pradana Darajati wrote: > Greeting Mr. Matthias, > Thank you for the help in my last email. I have already solve some of my > problem thanks to your help. > But i still have some problem and question : > > 1. About the IO server you mentioned before. I still cannot fully > comprehend about the OMAP3 driver you said earlier. As i study in > OMAP4460 TRM, i have know the memory that directly accessed to make GPIO > of OMAP4460 (Pandaboard) works. And i already make it works with a > hardcoding (code without L4Re API) by assign directly the memory address > of GPIO. Can you help me to short explain or gave me a reference about > IO server and how to use it to access the memory address of GPIO ? I am not exactly sure what you mean. Instances of the GPIO driver are created through Lua configuration files. You can see an example in io/config/plat-rpi_b/hw_devices.io. There you can also specify the memory base address of the GPIO chip. An example for Omap3 looks like this: GPIO = Hw.Device(function() GPIO1 = Hw.Gpio_omap35x_chip(function() hid = "gpio-omap35x-GPIO1"; compatible = {"ti,omap3-gpio"}; regs = Res.mmio(0x48310000, 0x48310fff); irq = Res.irq(29); scm_table = 0; end); end); > 2. I still studied the basic of L4Re, and try to run an hello-cfg entry > in modules.list. But when i run using make qemu, it gave an error like > this. > "make[1]: Entering directory `/media/chiqiVstorage/l4resnap/src/l4' > Could not find 'hello.cfg' with path > '/home/erry/l4resnap/src/kernel/fiasco/build86/:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/bin/x86_core2/l4f:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2:/media/chiqiVstorage/l4resnap/src/l4/build86/lib/x86_core2/l4f' > make[1]: *** [qemu] Error 1 > make[1]: Leaving directory `/media/chiqiVstorage/l4resnap/src/l4' > make: *** [qemu] Error 2" > > where did i go wrong ? You need to add /media/chiqiVstorage/l4resnap/src/l4/conf/examples to your MODULE_SEARCH_PATH. Best, Matthias. > Sorry for the basic question. Any answer and response is really helping > me understand this research and project better, and i really appreciate > that. > > 2014-10-13 15:23 GMT+07:00 Matthias Lange > <matthias.lange(a)kernkonzept.com <mailto:matthias.lange@kernkonzept.com>>: > > Hi, > > On Sat, Oct 11, 2014 at 01:21:11AM +0700, Erry Pradana Darajati wrote: > > Hello L4 Hackers > > > > I am working on a project with L4Re in Pandaboard for my College Final > > Project. And right now i am in a stuck. > > > > So far, i have already know how to boot, print and read from the serial > > port (UART3) of pandaboard. But i can't understand the fundamental / basic > > of L4Re itself. > > A good starting point is the L4Re documentation [0]. This should get you > started. > > > Like how to make a new program outside the main program of "hello" (i am > > using hello code all of this time to experimenting). And also how to access > > the memory of the host computer using L4Re code. > > Just create a new directory within you pkg directory. From there you > can call > '../../mk/tmpl/inst' which installs the default directory hierarchy and > Makefiles. > > > Because the main goal of the project i am working on is be able to access > > the GPIO of Pandaboard. > > The io server already provides infrastructure and the API for GPIO > drivers. > Please have a look at the existing BCM2835 and OMAP3 drivers. > > > And also, is there is any way to recompile L4Re without recompiling all of > > the module it use. Because in my computer it took a time to recompile even > > the change is only a line of code > > You have multiple possibilities. Change into your pkg's directory > and call > 'make -jX O=/path/to/obj/dir' or from your build directory you can > call 'make > -jX S=YOUR_PKG_NAME'. Note that the latter will not check and > rebuild the pkg's > dependencies. > > Matthias. > > [0] http://os.inf.tu-dresden.de/L4Re/doc/ > > > -- > Matthias Lange, matthias.lange(a)kernkonzept.com > <mailto:matthias.lange@kernkonzept.com>, +49 - 351 - 41 88 86 14 > > Kernkonzept GmbH. Sitz: Dresden. Amtsgericht Dresden, HRB 31129. > Geschäftsführer: Dr.-Ing. Michael Hohmuth > > > > > -- > /Regards,/ > /Erry Pradana Darajati | *Student of Computer Engineering*/ > /*Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*/

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Server loop does not call dispatch only when running in pthread
by Tobias Sturm 24 Nov '14

24 Nov '14

Hi, I want to have the loop() method of a Registry_server instance inside a pthread. When the client sends messages, I get the IPC error 35 (could not figure out what that error code means). As soon as the loop() is invoked in my main thread, messages come through. Here is some pseudo code: start_thread() { //pack args int err = pthread_create(&my_thread, NULL, &thread_fn, &args); printf("pthread_create says %d", err); } thread_fn(args) { L4Re::Util::Registry_server<>* svr = args.server; server_obj* my_server = args.server_obj_instance; svr->registry()->register_obj(my_server, "foo"); svr->loop(); } class server_obj : public L4::Server_object { public: int dispatch( ... ); } server_obj::dispatch(...) { //never called } Thanks, Tobi

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Run and debug Fiasco.OC kernel and L4Re using a DSTREAM JTAG device and the ARM DS-5 IDE
by Mahdi Aichouch 21 Nov '14

21 Nov '14

Hello to everyone, I have a Freescale i.MX 6 ARM Cortex A9 Sabre SD board. I would like to test the Hello World example using the generated bootstrap.elf binary. I compiled the fiasco kernel and the l4re framework for the i.MX 6 ARM Cortex-A9 using the menu configuration in both cases. Instead of using an SD card to run the binary on the board, I would like to flash the RAM with the binary using the DSTREAM JTAG device and the ARM DS-5 IDE. I connected the board to my host using the mini-usb to serial cable, and I used minicom tool as a serial terminal. I tried to run the binary using the DS-5 debugger while the board is connected through JTAG, but I didn't see any debug message on the serial terminal. The source code I am using is from the "l4re-snapshot-2014092821". My questions: 1) Does anyone tried to run and debug fiasco kernel + l4re on a board using a JTAG device? What are the steps that I am missing? 2) The debug tool print a message saying that "WARNING(IMG53): bootstrap.elf has no source level debug information", what are the options required to include these information compiling the fiasco kernel + l4re? Thank you very much in advance. Best regards, Mehdi PS: screenshot of the IDE debugger view

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SMP
by teclis High Elf 11 Nov '14

11 Nov '14

How does the fiasco L4Re do SMP? Are there commands for CPU affinity? How can I assign a specific process to a CPU? thanks,

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Second UART and console
by teclis High Elf 10 Nov '14

10 Nov '14

Hi, I have a board with two UARTs on it and I need a second independent console connected to the other UART ( I have multiple virtual machines and I want to give each their own console). What would be the best approach for this? I see the UART drivers are linked into bootstrap. Does the same driver from bootstrap remain resident in memory and become part of the address space of con once its starts? Would I need to spawn a separate instance of con or could it be modified to support multiple consoles? thanks

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memory layout
by Tobias Woelfel 08 Nov '14

08 Nov '14

Hello everybody, I am still working on the port for openrisc and have now some questions concerning the memory layout. (kern/xxx/mem_layout-xxx.cpp) What parts are necessary, and what do they mean? For example in the arm architecture there is Map_x, Caps_x, Kernel_x, Pmem_x... Are there any restrictions on how big/small one area has to be? What is the phys_to_pmem function supposed to do? (what does pmem stand for?) Thanks Tobias

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How to monitor thread scheduling and the criticality of tasks?
by Karl Steger 05 Nov '14

05 Nov '14

Hi L4 hackers, How can you monitor how threads are scheduled for execution in L4Re? The trace buffer does not seem to offer information about the criticality of tasks. The l4re-snapshot-2014092821, however, refers to a monitoring framework named "ferret" in /obj/l4linux/ux/source/arch/l4/Kconfig but does not provide its source code. Is ferret publicly available? Do you know of any alternatives? Thanks and regards, Karl

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Re: Question about schedule policy
by Björn Döbel 05 Nov '14

05 Nov '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, On 05.11.2014 04:18, Kevin wrote: > Thanks for your answer, please always reply to the mailing list. The answers may also be interesting to other people. > Maybe my question is confused. I know the concept of class > "Thread",It'sa runnable, schedulable activity, and a Task has many > Threads, and Task is just some address spaces. > > So, my question is: If there are many Tasks, for example, Task A > and Task B, and I want each Thread of Task A has a higher priority > than B's, what should I do? Fiasco schedules threads in a priority-based, round-robin fashion. That means it always selects the thread with the highest priority (per CPU). If multiple threads with the same prio exist, they get equal shares of the CPU. You can set a thread's priority upon creation using the l4_scheduler_*() system calls. There are examples of that in l4/pkg/examples - grepping for 'scheduler_' should do the trick. Furthermore, you can also set the prio of threads within the Lua init scripts. For that purpose you do something like: loader:startv({ caps = ..., log = ..., scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x90, 0x80) }, ...); This sets up a scheduler environment for your new program. The numeric parameters are max_prio and base_prio. When you later specify priorities using the scheduler interface in your program, the actual prio of your threads will be calculated: prio := base_prio + selected_prio; if (prio > max_prio) prio := max_prio; > anyway, can we schedule these Threads by group? not just set the > scheduling parameters of Thread one by one. You need to set the scheduling parameters for every newly created thread separately. If you use the pthread interface, this will be done by the library and all threads will have the same prio. In combination with the Lua scheduler settings this might be what you want. Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlRZ61EACgkQP5ijxgQLUNn58ACfXN2gmSGxUMD602bB2h26mIbq VssAniec6EQs4q1VTo/0zVBj1mgQgm0Q =oY4R -----END PGP SIGNATURE-----

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Question about schedule policy
by Kevin 04 Nov '14

04 Nov '14

Hello, I know the class "Task" in fiasco is equaled with the word "Domain" in VMM, but I can't find some schedule policy about Task in fiasco, all I find is scheduling about Thread in class Context and sched_context. So, is there any schedule policy about Task? thanks, kevin

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is there a way to run the compiled arm on Nexus S ?
by cem akpolat 04 Nov '14

04 Nov '14

Dear all, I have compiled couple of days ago l4android for arm architecture, and now I want to boot it on Nexus S, however, I couldn't find a way to tun bootstrapLinuxAndroid.elf file on arm based architecture. I have already seen in some research papers (one of them is as follows). http://www.isti.tu-berlin.de/fileadmin/fg214/liebergeld/spsm03-lange.pdf How could be l4android booted on the Nexus S? Thanks, Best Regards, Cem Akpolat

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FOSDEM 2015 - CfP: Microkernels DevRoom
by Vasily A. Sartakov 01 Nov '14

01 Nov '14

Greetings. ---- FOSDEM 2015 - CfP: Microkernels DevRoom I would love to announce the Call for Participation in the FOSDEM'15 Microkernel DevRoom. FOSDEM’15 will be held at the ULB Campus Solbosch on Saturday 31 January and Sunday 1 February 2015 and Microkernel devroom is scheduled on Sunday (01 February). Topics accepted include, but are not limited to: * Kernels, environments and frameworks * Hardware support: architectures, drivers * Languages and tools * Use cases, experiences, lessons learned and demos * Technical challenges and issues * Testing and support * Community building. Please use Pentabarf [1] system to submit your proposals. You do not need to create new account if you already have one. If the password is lost you can recovery it. Moreover, we have the devroom mailing list [2] Within submission please provide: * Title of your talk * Abstract, one or two paragraphs * Information about speaker: Name, bio, photo * Length of the talk. Each talk is limited to 45 minutes but can be less. Important dates: * Nov 28: Deadline for submissions * Dec 01: Speakers notified of acceptance * Dec 08: Schedule published Please do not hesitate to forward this CfP to anyone interested in participating. 1. https://penta.fosdem.org/submission/FOSDEM15 2. https://lists.fosdem.org/listinfo/microkernel-devroom ---- -- Vasily A. Sartakov sartakov(a)ksyslabs.org

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Dummy irq
by teclis High Elf 01 Nov '14

01 Nov '14

If I wanted to create a dummy irq that didn't actually exist in hardware but I could use for asynchronous notification between processes or between a hypervisor and a VM how would I do that in L4Re? What would the dummy entry look like in the .devs file? thanks

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Microkernel Stammtisch Dresden: Nov 6, Shamrock
by Julian Stecklina 29 Oct '14

29 Oct '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello fellow microkernel hackers, for everyone outside the Dresden, Germany area this mail is unfortunately off-topic. For everyone else there is going to be another Microkernel Stammtisch on Thursday, November 6th in the Shamrock Irish Pub[1]. If you intend to join, please leave a note using the link below, so I can reserve a table: https://dudle.inf.tu-dresden.de/ukvly-beer/ See you there, Julian [1] Kleine Brüdergasse 1, Dresden -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEARECAAYFAlRQL34ACgkQ2EtjUdW3H9l5qwCdHVLdLwthN4i5n8p7pQrqmr46 JzgAn18ML6+KoyLQZGEwg3jQW9CzOmUv =wapd -----END PGP SIGNATURE-----

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memcpy(): alignment error
by ba_f 25 Oct '14

25 Oct '14

Hello L4-Hackers, i get an "alignment error" when trying to memcpy(). The error occurs in a raw L4-Task (how do u "officially" name that?), no L4Linux. However, the error comes with the following line: memcpy(0x80006e80, 0x80006e84, 4); And this is the message: KERNEL0: alignment error at 80006ece (PC: 00079be8, SP: 80006b08, FSR: 410801, PSR: 60000010) No signal handler found Any idea? Thanks, again. PS: I don't know if the Fiasco Debugger would help for this problem, but i didn't have time to learn working with it, yet. Sorry for that.

2 4

exec()
by teclis High Elf 23 Oct '14

23 Oct '14

Could some one please point me to or give me example code to do the L4Re equivalent of UNIX exec(), spawn a new process? thanks

3 2

dynamic loading
by teclis High Elf 21 Oct '14

21 Oct '14

Does L4Re support dynamic loading? Is there an elf loader or shell? If so how do I do it? I want to run directly with L4Re. No l4linux. thanks

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SMP for L4Linux on i.MX6
by Uwe Geuder 19 Oct '14

19 Oct '14

Hi! We have an i.MX6 quadcore SoC and obviously we would like to use more than 1 core in L4Linux. So far I have not succeeded to do that. jdb shows 4 CPUs and some tasks on different ones, so I assume our Fiasco configuration supports SMP. Still all L4Linux tasks are on the same one and CPU stress testing shows clearly that only 1 CPU is in use. >From an earlier posting on this list I found the L4.Proto.Scheduler configuration for ned. I tried various options but there was no effect, L4Linux user space runs on 1 core only. -- CPUs 1 + 2 -- scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x18, 0x8, 6), -- maybe no mask means all CPUs? scheduler = L4.Env.user_factory:create(L4.Proto.Scheduler, 0x18, 0x8), Next I looked at our L4Linux configuration and indeed CONFIG_SMP was not set. However after enabling it the kernel does no longer build: arch/arm/mach-imx/built-in.o: In function `imx_smp_prepare': /home/geuder/projects/c4c/l4-bundle/l4linux/arch/arm/mach-imx/platsmp.c:79: undefined reference to `scu_enable' /home/geuder/projects/c4c/l4-bundle/l4linux/arch/arm/mach-imx/platsmp.c:79: undefined reference to `scu_enable' arch/arm/mach-imx/built-in.o: In function `imx_smp_init_cpus': /home/geuder/projects/c4c/l4-bundle/l4linux/arch/arm/mach-imx/platsmp.c:71: undefined reference to `scu_get_core_count' arch/arm/mach-imx/built-in.o: In function `v7_secondary_startup': /home/geuder/projects/c4c/l4-bundle/l4linux/arch/arm/mach-imx/headsmp.S:33: undefined reference to `v7_invalidate_l1' /home/geuder/projects/c4c/l4-bundle/l4linux/arch/arm/mach-imx/headsmp.S:35: undefined reference to `secondary_startup' The SCU http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0407e/CDDEHD… has to do with cache coherency, obviously important on SMP. The SCU code is in native ARM, but not in L4 ARM. I somehow have the feeling just copying it is not enough. Does the virtual CPU seen by L4Linux need to control/use the SCU or is that something made completely transparent by the virtual cpu offered by L4? v7_secondary_startup code is behind !defined(CONFIG_L4). The code does a lot of MMU initializion stuff, so my guess is this cannot worked unchanged under L4. So the question is: Is SMP for i.MX6 unimplemented or at least untested or am I doing something completely wrong here? Somebody here mentioned VCPU. I have not studied that concept yet. We have CONFIG_L4_VCPU=y Regards, Uwe Geuder Nomovok Ltd. Tampere, Finland uwe.gxuder(a)nomovok.com (bot test: humans correct 1 obvious spelling error)

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Teaching OS Course notes
by teclis High Elf 17 Oct '14

17 Oct '14

Hi, I understand that Fiasco/L4Re is used as the teaching operating system at TU Dresden. Are there any course notes or lab notes available for courses at TU Dresden that used and/or covered Fiasco/L4Re? All the lab tutorials and course notes pertaining to the teaching operating systems used at MIT and Stanford are available online but I couldn't find anything similar for Fiasco. thanks

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raw L4Task: Flash Access & Variable
by ba_f 16 Oct '14

16 Oct '14

Hello and thank u so far, >> Adam wrote: > It is possible. But of course there needs to be a driver for your flash > and a filesystem (if needed). And there's none. > There's a tmpfs, i.e. a filesystem that can store files, however, not > across reboots. Maybe that helps you already? Yes, volatile storage would do the trick. Unfortunately, i need some help here, too. :( I've found a post from Adam, concerning tmpfs: http://os.inf.tu-dresden.de/pipermail/l4-hackers/2014/006244.html I did all it says, and of course edited anything to my concerns. But my App fails to write at /tmp. fopen("/tmp/file", "wb") == NULL Maybe i do not place the fstab-file correct. Right now, fstab is located in the MODULE_SEARCH_PATH. But building the image does also work if there is no such file. Running the image, there are no complaints about a missing fstab. Is this correct behaviour? I also added fstab to my modules.list, without success. So... Is there another way to check if fstab is loaded correctly, besides using fopen(). -------- Here my files (shorted): # fstab / /tmp tmpfs defaults # modules.list entry app-cfg kernel fiasco -serial_esc roottask moe rom/app.cfg module l4re module ned module app.cfg module fstab [...] module libmount.so module libl4revfs-fs-tmpfs.so # app.cfg ld:start( "rom/app", { FSTAB_FILE = "rom/fstab" }); # Makefile REQUIRES_LIBS = libmount libl4revfs-fs-tmpfs

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[ASK] Basic L4Re
by Erry Pradana Darajati 13 Oct '14

13 Oct '14

Hello L4 Hackers I am working on a project with L4Re in Pandaboard for my College Final Project. And right now i am in a stuck. So far, i have already know how to boot, print and read from the serial port (UART3) of pandaboard. But i can't understand the fundamental / basic of L4Re itself. Like how to make a new program outside the main program of "hello" (i am using hello code all of this time to experimenting). And also how to access the memory of the host computer using L4Re code. Because the main goal of the project i am working on is be able to access the GPIO of Pandaboard. And also, is there is any way to recompile L4Re without recompiling all of the module it use. Because in my computer it took a time to recompile even the change is only a line of code Can anyone teach or show me how to make it ? Actually i already have read the documentation of L4Re, but i am still having a hard time understanding it. Thank you for any answer and feedback. -- *Regards,* *Erry Pradana Darajati | Student of Computer Engineering* *Politeknik Elektronika Negeri Surabaya / EEPIS, Indonesia*

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L4 Bootsrap Fiasco Addr
by Wölfel, Tobias 11 Oct '14

11 Oct '14

Hello All, I am working on porting Fiasco.OC to openrisc (or1k), but are stucked at booting the kernel. The problem is that the addr in boot_info.kernel_start is pointing to the beginning of the bootsrap, and therefore it will not start the kernel. In startup.cc there is the mbi, mb_info and mb_mod, which I suppose is the place where the addr is coming from. But where is it set exactly? For or1k IMAGE_MODE is used. The output of the bootstrapping is at the end. Thanks a lot for the help, Tobias " Loading fiasco [0x1103000-0x1104000] [0x1104000-0x11040ac] [0x11040ac-0x112c340] [0x112c340-0x1134468] [0x1135000-0x1135a84] [0x1135a84-0x1136000] boot_info.kernel_start 100 Loading sigma0 [0x100000-0x107ff4] [0x108000-0x10c17c] Loading foo find kernel info page... found kernel info page at 0x1103000 Regions of list 'regions' [ 100, 1d403] { 1d304} Boot bootstrap [ 128ac, 1291e] { 73} Boot mbi [ 17000, 171ab] { 1ac} Root Multiboot info [ 1d058, 1d0af] { 58} Boot mbi [ 100000, 10c17b] { c17c} Sigma0 sigma0 [ 1100000, 11001d3] { 1d4} Root Module [ 1103000, 1135fff] { 33000} Kern fiasco API Version: (87) experimental Sigma0 config ip:00100344 sp:0001b040 Roottask config ip:00000000 sp:00000000 Starting kernel fiasco at 00000100 "

2 3

Thread synchronization with in the same address space
by teclis High Elf 10 Oct '14

10 Oct '14

I have two threads running in the same server. On thread handles incoming ipc messages from the clients in different address spaces and the other thread does the work. The thread handling the incoming ipc needs to pass an integer value to the worker thread. Could I synchronize them using int l4util_cmpxchg32 <https://os.inf.tu-dresden.de/L4Re/doc/group__l4util__atomic.html#gacb4a5e47…> (volatile l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> *dest, l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> cmp_val, l4_uint32_t <https://os.inf.tu-dresden.de/L4Re/doc/group__l4__basic__types.html#gac1d09f…> new_val) the worker thread could then check the value of dest to get the integer. Would the worker thread need to use an atomic read function when it reads the value of dest and if so which function would the worker thread use for the atomic read? thanks,

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examples/libs/l4re/c++/shared_ds/ds_clnt.cc
by teclis High Elf 10 Oct '14

10 Oct '14

>From examples/libs/l4re/c++/shared_ds/ds_clnt.cc line 49 : L4::Cap<L4::Irq> irq = L4Re::Util::cap_alloc.alloc<L4::Irq>(); It seems this template name L4::Cap and the function name L4Re::Util::cap_alloc are a bit misleading or only designate a sub-set of the objects functionality. In this line you are not just requesting permissions but getting a Unix style file handle that you then use to issue commands to the server on line 92: irq->trigger(); Is my understanding correct? At line 49 you are opening L4 equivalent of a Unix style file handle for sending commands to a server and not requesting permissions or am I over simplifying. thanks

2 1

contiguous memory blocks and zero copy
by teclis High Elf 09 Oct '14

09 Oct '14

How does L4Re handle contiguous memory blocks? What are the system calls used to allocate and manage contiguous memory? Is it possible to do zero copy data transfer between drivers and if so how is it done in Fiasco (so in linux world you would say no copy_to_user() and copy_from_user() ) thanks,

3 2

l4linux shutdown cleanup
by Masti Ramya Jayaram 09 Oct '14

09 Oct '14

Dear all, I would like to perform some cleanup operations after l4linux shuts down..such as zero out all the memory it used and re-encrypt the original vmlinux image. I would like to know how I could do this from sigma0 preferably or even in the fiasco kernel. Could anyone point me to where the clean up procedure (release of resources) occurs once l4linux shuts down? Thanks, Ramya

2 1

JDB and thread ids
by teclis High Elf 09 Oct '14

09 Oct '14

What command in JDB gives me a list of thread IDs I can use with the other thread commands. I tried the list tasks and didn't see anything that looked like a thread id.

2 1

Re: Graphical desktop, l4con, mag
by 000SKY 09 Oct '14

09 Oct '14

>>>> > > > fbdrv | To force a specific setting use a '-m <mode>' option. >>>> > > > fbdrv | L4Re[rm]: mapping for page fault failed with -34 @1a0000 >>>> > > > pc=1006452 >>>> > > > fbdrv | L4Re: unhandled exception: pc=0x1006452 There is a way to fix it. You can modify x86-legacy.devs,as follows: VGA = Hw.Device { hid = "PNP0900"; Res.io(0x3b0, 0x3bf); -- MDA Res.io(0x3c0, 0x3df); -- EGA/VGA Res.io(0x1ce, 0x1d0); -- Vbox Res.io(0x402, 0x402); -- QEMU Debug Port Res.mmio(0xa0000, 0xbffff); --Here lost a parameters. Changed to Res.mmio(0xa0000, 0xbffff,0xc000); },

1 0

Ned,moe, l4linux interaction
by Masti Ramya Jayaram 01 Oct '14

01 Oct '14

Dear all, I see that in the default l4linux configuration, it uses ned, moe to start up. However, I am not sure about the run-time interaction between them. More specifically, a. Does l4linux need them during its run-time? For example, does l4linux go directly to sigma0 for memory or does it go through ned? b. Do ned and moe get killed once they start l4linux or not? Thanks, ramya

3 3

Difference between capability and memory mapping
by Yuxin Ren 01 Oct '14

01 Oct '14

Hi All, I found in the kernel, the capability mapping and memory mapping have very similar code path. But I found their performance difference is around 1000 cycles. Is this true? If it is true, why do they have such large difference? If this gap does not make sense, it should be a bug in my test. Thank you very much. Best, Yuxin

2 3

Repository Update
by Adam Lackorzynski 29 Sep '14

29 Sep '14

Hi, the repository and snapshots have been updated and I'm happy to announce a couple of new features: - L4Re supports ARM virtualization (HYP mode) now. There's a 'vmm' package that allows to run unmodified Linux, however, it might still have some rough edges. - With that ARM exception error codes have been changed to use HYP's HSR style, also for non-HYP kernels! - gcc-4.9 support, including libstdc++, and preparations for gcc-5 - EFI is available as a boot method now, both in 32 and 64 bit modes - x86 power management has been improved - Stackprotector support is available in L4Re now - The console server 'cons' has been added - Fiasco runs on more ARM targets, including Xilinx Zynq (Zedboard, Parallela), OMAP5, Allwinner (Cubieboard, Cubietruck) - More examples have been added - 3rd-party packages have been updated - L4Linux has been upgraded to version 3.16. Adam -- Adam adam(a)os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/

2 1

Question about the doc of L4Re
by lwf408498027 28 Sep '14

28 Sep '14

Hi hackers, I am learning the fiasco's source code recently, and I saw the doc in http://l4re.org/doc/ does not match with the code in l4re-snapshot-2014053111 such as: in class scheduler, there has some function: L4_msg_tag sys_run(L4_fpage::Rights, Syscall_frame *f, Utcb const *utcb); L4_msg_tag sys_idle_time(L4_fpage::Rights, Syscall_frame *f, Utcb *utcb); L4_msg_tag sys_info(L4_fpage::Rights, Syscall_frame *f, Utcb const *iutcb, Utcb *outcb); but in the document, the function are not the same: l4_msgtag_t info (l4_umword_t *cpu_max, l4_sched_cpu_set_t *cpus, l4_utcb_t *utcb=l4_utcb()) const throw () l4_msgtag_t run_thread (Cap< Thread > const &thread, l4_sched_param_t const &sp, l4_utcb_t *utcb=l4_utcb()) const throw () l4_msgtag_t idle_time (l4_sched_cpu_set_t const &cpus, l4_utcb_t *utcb=l4_utcb()) const throw () So, Is this doc out of date? and if the answer is yes, where can i find some fresh doc? if no, How to use the doc correctly? Thanks, Kevin

2 1

L4_SYSCALL_INVOKE is a negative PC value？
by Zachary 28 Sep '14

28 Sep '14

hello everyone, In cache.h file(..\l4\pkg\l4sys\include\ARCH-arm\cache.h), a piece of code is as follows： l4_cache_op_arm_call(unsigned long op, unsigned long start, unsigned long end) { ... __asm__ __volatile__ ("@ l4_cache_op_arm_call(start) \n\t" "mov lr, pc \n\t" "mov pc, %[sc] \n\t" "@ l4_cache_op_arm_call(end) \n\t" : "=r" (_op), "=r" (_start), "=r" (_end) : [sc] "i" (L4_SYSCALL_MEM_OP), "0" (_op), "1" (_start), "2" (_end) : "cc", "memory", "lr" ); } My question is whether the code means that PC jumps to the address of L4_SYSCALL_MEM_OP(actual value is -0x00000010)? If it is true, then it means the address is 0xFFFFFFF0 ? My second question is whether the address 0xFFFFFFF0 corresponds to the sys_arm_mem_op in the following definition? (..\kernel\fiasco\src\kern\arm\asm_entry.h) /*********************************************************************/ /* The syscall table stuff */ /*********************************************************************/ .macro GEN_SYSCALL_TABLE .align 4 .global sys_call_table sys_call_table: .word sys_kdb_ke .word sys_kdb_ke .word sys_ipc_wrapper .word sys_arm_mem_op .word sys_invoke_debug_wrapper .word sys_kdb_ke .word sys_kdb_ke .word sys_kdb_ke .word sys_kdb_ke .word sys_kdb_ke .word sys_kdb_ke .endm Thank you so much. Best, Zachary

2 3

What does idle thread do
by Yuxin Ren 27 Sep '14

27 Sep '14

Hi All, I want to know what kernel idle thread does. Does it just execute "halt" instruction or anything else? Where is code for the idle thread? Thank you so much. Best, Yuxin

2 3

cannot find -lld-l4
by ba_f 25 Sep '14

25 Sep '14

Hello l4-hackers, I get an error when trying to compile, respectively linking my program. /opt/gcc-linaro-arm-linux-gnueabihf-4.8-2014.03_linux/bin/arm-linux-gnueabihf-ld: cannot find -lld-l4 make[3]: *** [myProg] Fehler 1 My Program does not include this lib. It comes from the L4-make process (prog.mk). I have already compiled smaller programs, without problems. BTW before that missing lib error, i get a lot of "multiple definition of...". Any ideas? I use Debian 7 32bit. Thanks

3 4

Does unmap() flush tlb on other cores
by Yuxin Ren 23 Sep '14

23 Sep '14

Hi All, I have question about tlb flush. When a memory page is unmaped, do we always flush tlb of all other cores? Or do we have some way to track which core to flush? If so, how do we track that information? And it would be better if some one can show the code in the kernel to do that. Thanks a lot. Yuxin

2 2

Re: std::cin in Fiasco/L4Re (with 'make qemu')
by Stark, Josef 23 Sep '14

23 Sep '14

Hi, >I'm not sure where you enter this. >For me, the following works quite fine: > >#include <stdio.h> > >int main(void) >{ > printf("Press some key: "); > char c = getchar(); > printf("\nYour input: %c (%d)\n", c, c); > > printf("Enter a number: "); > int number; > scanf("%x", &number); > printf("Your number: %d\n", number); > > return 0; >} If I copy this code into the hello example, and change the Makefile accordingly: PKGDIR ?= ../.. L4DIR ?= $(PKGDIR)/../.. TARGET = hello SRC_C = main.c REQUIRES_LIBS = libc_be_file_stdin include $(L4DIR)/mk/prog.mk I can successfully run it IF moe runs hello directly (without Ned and a config, as a "make qemu E=hello" does). If, however, hello is run through a config file and therefore Ned, as in hello-cfg, it doesn't work. Execution does not halt and outputs invalid values: MOE: Starting: rom/ned rom/hello.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/hello.cfg' hello | Press some key: hello | Your input: � (-1) hello | Enter a number: Your number: -2147450972 How to make it work? Pass a certain capability to hello? Josef

2 1

l4/sys/syscalls.h: No such file or directory
by Valentin Hauner 18 Sep '14

18 Sep '14

Hi, I'm using the following example provided by Michael Hohmuth in 2000 to create new tasks and threads: http://os.inf.tu-dresden.de/pipermail/l4-hackers/2000/000384.html I've placed the code in a copy of the hello example, but added > REQUIRES_LIBS = l4sys to the Makefile. The directory structure is located at './l4/pkg/taskcreat'. Nevertheless, compilation is terminated due to a fatal error: > ./l4/pkg/taskcreat/server/src/main.c:5:29: fatal error: l4/sys/syscalls.h: No such file or directory Why is syscalls.h missing here? Best regards, Valentin

4 52

How to debug Fiasco Kernel
by cem akpolat 18 Sep '14

18 Sep '14

Dear all, I was searching how to debug the fiasco kernel through JDB. The following link gives a good approach how to it through minicom. http://os.inf.tu-dresden.de/l4env/doc/html/dev-overview/ However, even if I see the messages on the screen, is it possible to interact with JDB without having an exception? I looked at also the "Fiasco Kernel Debugger Manual", however, I couldn't figure out how to exactly interact with JDB. Until now I could only interact with JDB in case of any exception occurrence. Thanks in advance. Sincerely, Cem Akpolat

3 3

Trimming uclibc in l4
by Masti Ramya Jayaram 18 Sep '14

18 Sep '14

Dear all, I would like to extract the minimal subset of uclibc required by bootstrap, sigma and their dependencies only. My idea is to have these modules use the smaller libc while retain the usual uclibc build for the other packages. I intend to go about this by copying uclibc (say into uclibc_min) and then modifying the contrib_files_all.lst and contrib_files_x86.lst. Is this the correct way to do this? Also, I extracted all the package dependencies of bootstrap and sigma from the control files (below) bootstrap: drivers_uart drivers_of libc l4util cxx_io drivers-frst:libc l4util: crtn libc crtn: l4sys l4sys: ldscripts l4util: crtn libc cxx: l4sys l4util ulibc: l4sys sigma0: crtn l4sys l4util libsigma0 cxx_io libsigma0: l4sys Is this the correct way to do this as well? Thanks, Ramya

3 6

Physical memory allocation to L4linux
by Masti Ramya Jayaram 16 Sep '14

16 Sep '14

Hi all, I start l4linux by specifying 64M on memory in its configuration file. I would like this memory to be a fixed range of physical memory and I was wondering if there is a way to do it. I understand from my earlier posts that the image of l4linux is in the same location everytime because the boot loader puts it there. I am not referring to this memory. I am concerned with the 64M that will potentially get allocated to l4linux. Thanks in advance, ramya

3 13

Question about dec_lock_cnt method in Context class
by Yuxin Ren 16 Sep '14

16 Sep '14

Hi All, I have a question about the dec_lock_cnt method in Context class under multiple processor. In its implementation, it checks if thread's home cpu is equal to current cpu. If not, it does not unset "_running_under_lock" variable, even if the _lock_cnt is 0. Why does it check if home cpu is equal to current cpu? Consider the following case: Thread A is running on core 1 holding a helping lock, but is preempted by another high priority thread. Thread B is running on core 2, and tries to take the same helping lock. It finds the lock is held by A, so it helps A to run by migrating A to core 2. When A releases its lock, finding the current cpu is not its home cpu, so it does not set "_running_under_lock" to false. Then A continues to run on core 1 and tries to take that lock again. But now it can never take the lock, as the implementation of helping lock. PRIVATE inline bool NO_INSTRUMENT Switch_lock::set_lock_owner(Context *o) { bool have_no_locks = o->_lock_cnt < 1; if (have_no_locks) { assert_kdb (current_cpu() == o->home_cpu()); for (;;) { if (EXPECT_FALSE(access_once(&o->_running_under_lock))) continue; if (EXPECT_TRUE(mp_cas(&o->_running_under_lock, Mword(false), Mword(true)))) break; } } ... } Do I misunderstand anything here? Thank you very much. Best, Yuxin

2 8

Re: Using IO-Server
by Martin Schröder 12 Sep '14

12 Sep '14

Hi Korbinian, Am 12.09.2014 um 13:44 schrieb Korbinian Ederer: > Hi, > Thanks for the resources. > The given Documents are describing the use of th *.io and *.cfg files, this is also documented in L4 Doc. > My question now is how to access the configured Device in Server Code. then continue with this example: /src/l4linux/arch/l4/kernel/arch-arm/mach_setup.c In copy_platform_device you can see how the IO resources (IRQ, MEM, IO) are enumerated. Also search for the functions l4io_lookup_resource and l4io_request_iomem to see how this is mapped in your address. The rest is up to your driver. Best regards, Martin. > Am 10.09.2014 um 15:33 schrieb Martin Schröder: >> Hi Korbinian, >> >> Am 10.09.2014 um 14:24 schrieb Korbinian Ederer: >>> Hello Community, >>> I'm relative new to l4RE. My Goal is to get access to an Hardware Device which is Build in the Processor. >>> After some research i came to the conclusion that the IO-Server is the thing I need, but i have no clue how to invoke it. >>> It would be great if someone could supply a short example >> >> Try this: >> https://os.inf.tu-dresden.de/L4Re/doc/io.html >> /src/l4/conf/examples/*.io, *.cfg >> https://fooprotected.wordpress.com/2012/04/12/l4linux-patch-for-mv643xx-eth… >> >> >> Best regards, >> Martin.

1 0

Does Fiasco have yield system call or something similar
by Yuxin Ren 10 Sep '14

10 Sep '14

Hi All, Does Fiasco support yield system call? Or other mechanism one thread can switch to another one without IPC? Thank you very much. Yuxin

2 1

Using IO-Server
by Korbinian Ederer 10 Sep '14

10 Sep '14

Hello Community, I'm relative new to l4RE. My Goal is to get access to an Hardware Device which is Build in the Processor. After some research i came to the conclusion that the IO-Server is the thing I need, but i have no clue how to invoke it. It would be great if someone could supply a short example Thanks Korbinian

2 1

Aborted L4linux due to CLI/STI
by Masti Ramya Jayaram 10 Sep '14

10 Sep '14

Dear all, I get an error during L4linux boot when I enter the debugger (using ESC) and resume: Aborted L4linux due to CLI/STI at 0x534911. When I disassemble this using gdb: (gdb) disassemble 0x534911 Dump of assembler code for function cmpxchg8b_emu: 0x00534910 <+0>: pushf 0x00534911 <+1>: cli 0x00534912 <+2>: cmp (%esi),%eax 0x00534914 <+4>: jne 0x534922 <cmpxchg8b_emu+18> 0x00534916 <+6>: cmp 0x4(%esi),%edx 0x00534919 <+9>: jne 0x534924 <half_same> 0x0053491b <+11>: mov %ebx,(%esi) 0x0053491d <+13>: mov %ecx,0x4(%esi) 0x00534920 <+16>: popf 0x00534921 <+17>: ret 0x00534922 <+18>: mov (%esi),%eax 0x00534924 <+0>: mov 0x4(%esi),%edx 0x00534927 <+3>: popf 0x00534928 <+4>: ret When I built l4linux, I had to disable CONFIG_X86_CMPXCHG, CONFIG_CMPXCHG_LOCAL and CONFIG_X86_CMPXCHG64 despite building for the Pentium because my processor does not support PAE (which is the option that enables this). I am guessing This is the reason it tries to emulate the CMPXCHG instructions. What is the correct l4linux configuration to use for a machine that does not support any of the atomic instructions like CMPXCHG8, ATOMIC, etc.? Thanks, ramya

2 5

GCC 4.9
by Stefan Wallentowitz 09 Sep '14

09 Sep '14

Dear L4 hackers, we recently started porting FIASCO to OpenRISC and our cross-compiler is GCC 4.9. I added the required libraries to our project mirror at github: https://github.com/TUM-LIS/optimsoc-fiasco/tree/for-upstream-gcc4.9 Are you interested in this? Do you want me to submit a patch for the latest public svn tree? Regards, Stefan

2 1

Preventing access to a part of the address space from Sigma0
by Masti Ramya Jayaram 09 Sep '14

09 Sep '14

Dear all, I would like to prevent access to a part of the address space from sigma0 for security reasons on my board. For example, I would like to prevent even sigma from accessing say 0xc0000000 - 0xffffffff of memory. What is the best way to accomplish this and test it? Thanks, ramya

2 1

Checking executables before running them in L4re/fiasco
by Masti Ramya Jayaram 09 Sep '14

09 Sep '14

Dear all, I am using fiasco/l4re to run applications (say hello world) and L4linux. The module list in the two cases looks like this: entry hello-cfg kernel fiasco -serial_esc -freq=533000 roottask moe rom/hello.cfg module l4re module ned module hello.cfg module hello entry l4linux kernel fiasco -serial_esc -freq=533000 roottask moe rom/l4linux.cfg module l4re module ned module l4linux.cfg module io module vmlinuz module ramdisk-x86.rd I would like to add some functionality that performs a few checks on hello and vmlinuz before they are executed. In this context, I have the following questions: a. Where is it best to implement such functionality - moe or ned? Or should I implement a separate server and do this? b. I need access to an special range of IO memory when I perform the checks. i guess I could always use the io module and do "l4io_request_iomem()" . Would that be the right way to do it from moe/ned? c. Is there a way to allocate/reserve a dedicated range of physical memory to these applications (hello/vmlinuz) so that they get allocated the same chunk everytime (of physical memory)? Thanks in advance, ramya

2 12

Adding a custom library to l4/pkg/bootstrap
by Masti Ramya Jayaram 05 Sep '14

05 Sep '14

Hi all, I have managed to compile a custom C library (libscc-sec) as part of the l4 packages. Now I would like to use it in the bootstrap package (make a call to a function in the library). I did the following: a. Added the library as a requirement in pkg/bootstrap/Control requires: drivers_uart drivers_of libc l4util cxx_io libscc-sec b. Modified the pkg/bootstrap/server/src/Make.rules so that it also looks for libscc-sec by: L4_LIBS = -static -nostdlib $(DRV_LIBS) -lcxx_base -lcxx_io -llibscc-sec But on compiling, I get an error that says that -llibscc-sec not found The package is getting compiled and I can see the library libscc-sec.a in the build folder. What am I missing? Thanks, ramya

3 6

Compiling the Fiasco.OC +L4Re for Raspberry PI
by Waldo Paz Rodriguez 03 Sep '14

03 Sep '14

hello hanzel, I have seen in l4hacker list that you have compiled fiasco.oc + l4re for Raspberry PI whithout problems. Iá¸¿ trying to compile it for rpi. I follow the next steps> 1- Compile Fiasco.OC for Broadcom2835 2- Compile L4Re for RaspberryPI model B with MODULE_SEARCH_PATH pointing to FOC builddir 3- Generate the hello example ELF image I have transformed it into a binary using: /usr/local/genode-gcc/bin/genode-arm-objcopy -Obinary bootstrap.elf l4.img I have used the three elf image and have used to the linaro and genode toolchain (both). When I have put the binary on the PI only can see the colored screen. I am using the Fiasco.OC +L4Re from 2014022815 snapshot. I am doing something wrong? Can you help me?

2 1

Passing data to a thread
by Valentin Hauner 03 Sep '14

03 Sep '14

Hi, I'm trying to pass some data to a newly created thread. Since l4_thread_ex_regs only accepts an instruction pointer, but no data pointer, it seems impossible to me to use a parameterized function such as: > thread1_func(void *data) { /* Read the data ... */ } So far, my efforts are: 1. I've tried filling the stack allocated to each newly created thread with > thread_stack = malloc(8 << 10); > thread_stack[0] = my_data; but then I'm not able to pop the data from the stack in thread1_func. 2. I've tried using IPC: The main thread which is creating the new threads sends the data to the destination thread. I'm using l4_ipc_send in the main thread and l4_ipc_receive in thread1_func just like in your utcb-ipc example. It works great, but unfortunately the call of l4_ipc_send leads to an _immediate_ execution of thread1_func (timeouts: L4_IPC_NEVER), so my scheduling policy is not respected. So how can I pass data to a thread in a way that is equivalent to passing arguments to functions? Best regards, Valentin

2 2

Fault in function writev (ulibc)
by Masti Ramya Jayaram 02 Sep '14

02 Sep '14

Dear all, I am running a custom application package on fiasco using a serial line (no keyboard/screen) and I intermittently get faults caused by printf. I notice that on disassembling the code around the error that the function is called writev in ulibc. Has anyone experienced something similar before? Thanks, ramya

2 2

New package linking fails
by Masti Ramya Jayaram 01 Sep '14

01 Sep '14

Dear all, I am trying to create a new package under l4/pkg. The linking of the package fails and it has to do with the linker path but I am not sure how to fix it. Here are the details. Package structure: (relevant parts) l4/pkg/test/server/src/main.cc l4/pkg/test/server/src/folder1/test1.c l4/pkg/test/include/test1.h l4/pkg/test/server/src/Makefile PKGDIR ?= ../.. L4DIR ?= $(PKGDIR)/../.. TARGET = $(PKGNAME) # list requirements of your program here REQUIRES_LIBS = libsigma0 libirq l4util l4re_c-util # list your .c or .cc files here SRC_C = folder1/test1.c SRC_CC = main.cc include $(L4DIR)/mk/prog.mk The compilation of the package fails with an undefined reference in main.cc to a function in test1.c (defined through test1.h). All the object files are generated and I checked under build. What do you think is the issue? Thanks, ramya

2 3

lwip and C++ compilation/linking issue
by Stark, Josef 01 Sep '14

01 Sep '14

Hello, I want to use TCP/IP (and therefore ankh and lwip) inside a C++ application. The unmodified lwip example (src/l4/pkg/ankh/examples/lwip) compiles fine (and also works without DHCP and with a little tweaking), but it is written and configured as C and not C++. So if I change the filename of main.c to main.cc and the Makefile accordingly, unfortunately it doesn't compile. Following error: ---------------- ... Compiling main.o In file included from /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/contrib/lwip/contrib/src/include/lwip/arch.h:46:0, from /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/contrib/lwip/contrib/src/include/lwip/debug.h:35, from /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/contrib/lwip/contrib/src/include/lwip/opt.h:46, from /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/contrib/lwip/contrib/src/include/lwip/tcpip.h:35, from /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/l4/ankh/lwip-ankh.h:3, from /home/josef/Desktop/test/main.cc:10: /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/contrib/lwip/arch/cc.h:48:13: error: previous declaration of ‘int* __h_errno_location()’ with ‘C++’ linkage extern int *__h_errno_location (void) __THROW __attribute__ ((__const__)); ^ In file included from /home/josef/Desktop/test/main.cc:19:0: /home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/include/uclibc/netdb.h:61:73: error: conflicts with new declaration with ‘C’ linkage extern int *__h_errno_location (void) __THROW __attribute__ ((__const__)); ^ make[1]: *** [main.o] Error 1 make: *** [/home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/ext-pkg/home/josef/Desktop/test/OBJ-x86_586-l4f] Error 2 ----------------- Alright, so I tried surrounding the offending include with 'extern "C" ' (as well as moving it above #include <l4/ankh/lwip-ankh.h> since this file also includes it): extern "C" { #include "arch/cc.h" } I think that it solved the problem, because the error went away, but another error appeared (see below), so I also tried doing the same only to the offending line inside arch/cc.h instead: extern "C" { extern int *__h_errno_location (void) __THROW __attribute__ ((__const__)); } Both approaches led to the same linker error: ------------------ main.o: In function `main': main.cc:(.text.startup+0x11c): undefined reference to `ankhif_init(netif*)' make[1]: *** [test] Error 1 make: *** [/home/josef/Desktop/l4re-snapshot-2014053111/obj/l4/x86/ext-pkg/home/josef/Desktop/test/OBJ-x86_586-l4f] Error 2 ------------------ This is the Makefile (only the line SRC_CC is different to the original example Makefile) ------------------ PKGDIR ?= . L4DIR ?= $(PKGDIR)/../l4re-snapshot-2014053111/src/l4 TARGET = test SRC_CC = main.cc SYSTEMS = x86-l4f arm-l4f REQUIRES_LIBS = lwip libc_be_socket_lwip liblwip_netif_ankh libc_support_misc include $(L4DIR)/mk/prog.mk ------------------ Which library is missing here, or what else could be going wrong? Cheers, Josef

1 1

Minimal requirements to run L4linux using only a serial console
by Masti Ramya Jayaram 30 Aug '14

30 Aug '14

Dear all, I am trying to run L4linux on fiasco/l4re but with the keyboard and VGA disabled. I can get all the way to the command prompt (of the shell) in the initramfs but then, on pressing a key, I get a page fault and I cannot debug the system anymore using the serial_esc. I suspect it is my configuration which I have provided below. I was wondering what the minimal packages are to achieve this. modules.list: entry l4linux kernel fiasco -serial_esc -freq=533000 roottask moe rom/l4linux.cfg module l4re module ned module l4linux.cfg module io module vmlinuz module drops-rd.rd I have disabled the framebuffer and input server in the L4linux stub drivers configuration and enabled the serial console. l4linux.cfg: --vim:set ft=lua: L4.default_loader:start({ caps = { log = L4.Env.log:m("rws"), }, l4re_dbg = L4.Dbg.Warn, log = { "l4linux", "yellow" }, }, "rom/io -vvvv rom/vmlinuz mem=64M console=ttyLv0 l4x_rd=rom/drops-rd.rd root=1:0 ramdisk$ I also specify a custom frequency for my board to fiasco.oc, do I have to make similar modifications to l4linux (e.g., Timer frequency)? Thanks, Ramya

3 14

RE: Minimal requirements to run L4linux using only a serial console
by Masti Ramya Jayaram 29 Aug '14

29 Aug '14

Hi Martin, That was a very useful tip. I simply changed the default value in kernel/fiasco/src/kern/config.cpp from SERIAL_ESC_IRQ to SERIAL_ESC_NOIRQ which leads to polling (I am guessing) and voila! It works! I even tried on the actual SCC and it works! I can break into the debugger as well as input to l4linux. Thanks a lot for your help for your help. Best, Ramya ________________________________________ From: Masti Ramya Jayaram Sent: 29 August 2014 17:48 To: Martin Schröder; l4-hackers(a)os.inf.tu-dresden.de Subject: RE: Minimal requirements to run L4linux using only a serial console Also with acpi on, it does enter the debugger in qemu. Best, Ramya ________________________________________ From: Masti Ramya Jayaram Sent: 29 August 2014 17:45 To: Martin Schröder; l4-hackers(a)os.inf.tu-dresden.de Subject: RE: Minimal requirements to run L4linux using only a serial console Hey Martin, No I just realized that ESC does not break into the debugger. But I can clearly see that the process instead of printing "Hello world" prints "ello World" :) What could the reason be? Thanks, Ramya ________________________________________ From: l4-hackers [l4-hackers-bounces(a)os.inf.tu-dresden.de] on behalf of Martin Schröder [martin.schroeder(a)openlimit.com] Sent: 29 August 2014 17:35 To: l4-hackers(a)os.inf.tu-dresden.de Subject: Re: Minimal requirements to run L4linux using only a serial console Hi Ramya, a: No, its not a must. The UART could also be polled (by a timer) to see if something arrived. b: At least regarding l4linux there is nothing more to it - afaik. But let's go back to the hello word example on the SCC. What happens if you press the <ESC> key? Does it break into the JDB debugger? Best regards, Martin Am 29.08.2014 um 16:56 schrieb Masti Ramya Jayaram: > Hey Martin, > > I am trying to run l4linux/fiasco on the Intel SCC which does have a pic-8259. The Intel SCC does not have a BIOS and does not have any ACPI tables which I think qemu generates on the fly. It also does not use a Screen or keyboard. > > I obtained a patch from Markus Partheymueller which they used to boot fiasco on the SCC. With it I am able to run hello world both in qemu with no-acpi as well as on the SCC successfully. > > The patch to the best of my knowledge does the following: > > a. Makes the cmdline also parse an argument so that the frequency is an input (533Mhz) > b. Uses the apic timer for scheduling. > c. Disables the pic-8259 because it does not exist. Instead the core in the SCC has two interrupt lines and this patch initializes these lines as interrupts to the core. > d. Disables keyboard and screen and enables a serial line for communication instead > e. Disables super pages because the SCC does not support it. > > So, when I try the patched fiasco/L4linux on qemu, it works when I do not disable acpi. But since the SCC does not have any ACPI/IO-APIC, when I try to run the same thing on qemu with ACPI off, l4linux boots but is not responsive to input. > > In short: > > when I run with I (below) , my l4linux responds to input and with II (below) not. > > qemu-system-i386 -m 256 -serial stdio -kernel bootstrap_l4linux.elf -append "-arg=fiasco,,-serial_esc -freq=533000" > > qemu-system-i386 -no-acpi -m 256 -serial stdio -kernel bootstrap_l4linux.elf -append "-arg=fiasco,,-serial_esc -freq=533000" > > Now the question is: > > a. Is the IO-APIC a must for the serial line? > b. Are ACPI tables just a matter of writing data at the right memory locations (e..g, qemu lets you give the acpi-table as input I noticed)? Or is there more to it? > > Thanks for your patience, > ramya > > > ________________________________________ > From: l4-hackers [l4-hackers-bounces(a)os.inf.tu-dresden.de] on behalf of Martin Schröder [martin.schroeder(a)openlimit.com] > Sent: 29 August 2014 16:29 > To: l4-hackers(a)os.inf.tu-dresden.de > Subject: Re: Minimal requirements to run L4linux using only a serial console > > Hi Ramya, > > Why did you disable the PIC? > What is your aim with ACPI and why should this lead to a change in the UART driver? > And what has the serial console to do with ACPI tables? > > For me the topics have at the moment very little in common or I am missing something. > > Best regards, > Martin > > > Am 29.08.2014 um 15:58 schrieb Masti Ramya Jayaram: >> Also, given that the thing works with ACPI on, wouldn't it be better to include ACPI information in the boot instead of changing the driver? Or is this impossible? >> >> Best, >> Ramya >> >> >> ________________________________________ >> From: Masti Ramya Jayaram >> Sent: 29 August 2014 15:55 >> To: Martin Schröder; l4-hackers(a)os.inf.tu-dresden.de >> Subject: RE: Minimal requirements to run L4linux using only a serial console >> >> Hey Martin, >> >> Back on the list ;-) >> >> Ok, I can confirm that when I busy loop during fiasco init, I can actually see the character that I typed. So would I have to change the l4ser driver in Linux or the main driver in under pkg/l4/bootstrap or under fiasco in vkey.cpp? :) >> >> Thanks, >> ramya >> ________________________________________ >> From: Masti Ramya Jayaram >> Sent: 29 August 2014 12:15 >> To: Martin Schröder; l4-hackers(a)os.inf.tu-dresden.de >> Subject: RE: Minimal requirements to run L4linux using only a serial console >> >> Hey Martin, >> >> I cleaned up my build and it worked - the mistake was mine. I had a question regarding ACPI. The target machine I am using has no BIOS/ACPi support. So, when I boot linux on it my console input does not work.This is similar to booting in qemu with the -no-acpi option. Serial console output works (I can see the prompt of L4Linux) but input does not. >> >> Is there something special to do when booting with a serial console but no ACPI tables? >> >> Thanks, >> ramya >> ________________________________________ >> From: Martin Schröder [martin.schroeder(a)openlimit.com] >> Sent: 27 August 2014 18:32 >> To: Masti Ramya Jayaram; l4-hackers(a)os.inf.tu-dresden.de >> Subject: Re: Minimal requirements to run L4linux using only a serial console >> >> Hi Masti, >> >> you have all of them already! I did not alter any other file beside the files you already sent. I inserted them into a fresh >> snapshot (http://l4re.org/download/snapshots-oc/l4re-snapshot-2014053111.tar.xz) and started building. Since "drops-rd.rd" was not >> found in the snapshot, I just renamed "ramdisk-x86.rd" to "drops-rd.rd". Nothing more. >> >> Martin >> >> >> >> Am 27.08.2014 um 18:02 schrieb Masti Ramya Jayaram: >>> Hey Martin, >>> >>> thanks for the quick response. Could you send me your configs (l4linux, fiasco, l4re) so that I can try it with that? >>> >>> Thanks, >>> Ramya >>> ________________________________________ >>> From: l4-hackers [l4-hackers-bounces(a)os.inf.tu-dresden.de] on behalf of Martin Schröder [martin.schroeder(a)openlimit.com] >>> Sent: 27 August 2014 16:28 >>> To: l4-hackers(a)os.inf.tu-dresden.de >>> Subject: Re: Minimal requirements to run L4linux using only a serial console >>> >>> Hi Masti, >>> >>> I just applied your config, replaced "drops-rd.rd" by "ramdisk-x86.rd" and everything (command prompt, debugger) runs fine as >>> expected in Qemu. Maybe you ran into a similar problem as described in this thread: >>> >>> http://os.inf.tu-dresden.de/pipermail/l4-hackers/2012/thread.html#5165 >>> >>> >>> Best regards, >>> Martin >>> >>> >>> Am 27.08.2014 um 15:18 schrieb Masti Ramya Jayaram: >>>> Sorry, a couple of typos in the l4linux.cfg >>>> --vim:set ft=lua: >>>> >>>> >>>> L4.default_loader:start({ caps = { >>>> log = L4.Env.log:m("rws"), >>>> }, >>>> l4re_dbg = L4.Dbg.Warn, >>>> log = { "l4linux", "yellow" }, >>>> }, "rom/vmlinuz mem=64M console=ttyLv0 l4x_rd=rom/drops-rd.rd root=1:0 ramdisk_size=4000 l4ser.vkey_enable=1"); >>>> >>>> Thanks in advance, >>>> ramya >>>> >>>> ________________________________________ >>>> From: l4-hackers [l4-hackers-bounces(a)os.inf.tu-dresden.de] on behalf of Masti Ramya Jayaram [rmasti(a)inf.ethz.ch] >>>> Sent: 27 August 2014 14:07 >>>> To: l4-hackers(a)os.inf.tu-dresden.de >>>> Subject: Minimal requirements to run L4linux using only a serial console >>>> >>>> Dear all, >>>> >>>> I am trying to run L4linux on fiasco/l4re but with the keyboard and VGA disabled. I can get all the way to the command prompt (of the shell) in the initramfs but then, on pressing a key, I get a page fault and I cannot debug the system anymore using the serial_esc. I suspect it is my configuration which I have provided below. I was wondering what the minimal packages are to achieve this. >>>> >>>> modules.list: >>>> entry l4linux >>>> kernel fiasco -serial_esc -freq=533000 >>>> roottask moe rom/l4linux.cfg >>>> module l4re >>>> module ned >>>> module l4linux.cfg >>>> module io >>>> module vmlinuz >>>> module drops-rd.rd >>>> >>>> I have disabled the framebuffer and input server in the L4linux stub drivers configuration and enabled the serial console. >>>> >>>> l4linux.cfg: >>>> >>>> --vim:set ft=lua: >>>> >>>> L4.default_loader:start({ caps = { >>>> log = L4.Env.log:m("rws"), >>>> }, >>>> l4re_dbg = L4.Dbg.Warn, >>>> log = { "l4linux", "yellow" }, >>>> }, "rom/io -vvvv rom/vmlinuz mem=64M console=ttyLv0 l4x_rd=rom/drops-rd.rd root=1:0 ramdisk$ >>>> >>>> >>>> I also specify a custom frequency for my board to fiasco.oc, do I have to make similar modifications to l4linux (e.g., Timer frequency)? >>>> >>>> Thanks, >>>> Ramya _______________________________________________ l4-hackers mailing list l4-hackers(a)os.inf.tu-dresden.de http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers

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Re: Minimal requirements to run L4linux using only a serial console
by Martin Schröder 29 Aug '14

29 Aug '14

Hi Ramya, Am 29.08.2014 um 14:29 schrieb Masti Ramya Jayaram: > Hi Martin, > > Thanks for checking that. I also see that my build works provided I don't apply a special patch meant for my board (Intel SCC). The patch essentially only alters the frequency and disables the PIC. If you disable the PIC you won't get any character into your system since UART reception is normally interrupt based. If you want to change this you have to poll the UART FIFO in the driver every second or so if there is any character available. Best regards, Martin.

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Re: advice on using ddelinux
by Björn Döbel 28 Aug '14

28 Aug '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 28.08.2014 12:14, Korbinian Ederer wrote: > Yes the symlinks are build properly, but you're right with the > CFlags. The include dir is not listed. How do I tell the make > process to do so? My bad, the variable is called PRIVATE_INCDIR as you can see in all the example Makefiles around the l4/pkg/dde subdirectory. Cheers, Bjoern - -- Dipl.-Inf. Bjoern Doebel Mail: doebel(a)tudos.org TU Dresden, OS Chair Phone: +49 351 463 38 799 Noethnitzer Str. 46 Fax: +49 351 463 38 284 01187 Dresden, Germany WWW: http://www.tudos.org/~doebel - -- "When the seagulls follow the trawler, it's because they think sardines will be thrown into the sea." (Eric Cantona) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlP/E0sACgkQP5ijxgQLUNmhTgCfbaw/Y+IIysCiwasxjvuVSxEP BdkAoJWEcSHWRfTedvXj0VotJv+1zVvn =o8Pq -----END PGP SIGNATURE-----

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Re: Mapping memory into process address space
by Noah Zentzis 28 Aug '14

28 Aug '14

On 08/17/2014 12:55 AM, Adam Lackorzynski wrote: > So now I'm not sure how you want to proceed. Are your programs special > ones, i.e. that they are quite different from L4 programs or are they L4 > programs? I wondering where to do the paging, however, in any case it > sounds to me like doing it in a different task would be good. > > To address your question: > You map the pager to the task with the dst_task->map() call as shown > above. The pager is probably a thread you implement, for doing your > work. The order does not really matter because the thread only starts > running until the run_thread call, i.e. it does not matter whether the > pager cap (any cap) is mapped before or after it has been registered > with the thread. How would I configure the new task to use the same pager that the current task is? Looking at libloader, I'd think it would be something like: task-map(L4Re::This_task, env->rm().fpage(), env->rm().snd_base()); but I'm not sure if I need to create a new region map or something like that. I think I've got memory mapping working, but the process dies with an unhandled read page fault. - Noah Zentzis

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GPIO Interrupt on L4Linux
by Yunchuan Geng 28 Aug '14

28 Aug '14

Hi, L4 hackers I am implementing a driver using GPIO input as interrupt. When setup handler for gpio, either from "irq_set_chained_handler()" or "requst_irq()" in kernel driver, it finally calls "l4lx_irq_io_startup()" function and return "/l4x-irq: Failed to set type for IRQ x".// / What this error means? Right before this error, it called l4_icu_set_mode() which goes to l4 side, I tried to print out debug information in l4 side, but not very successful. I tried read document about ICU and IRQ handling library about L4Re, but did not find the answer, maybe I overlook it. So I ask help here. Is there an guidance about this interrupt things or could some one please give me some advice. Best Regards, -Yunchuan

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Fiasco, L4Re, L4linux for Pentium 5
by Masti Ramya Jayaram 28 Aug '14

28 Aug '14

Dear all, I am trying to run L4linux on top of fiasco/L4re using an older version from the svn (for those interested, I am trying to run this on Intel SCC and therefore need an old build). I am first trying to run this on qemu and can get the entire linux to boot and display a shell prompt. However, I get a pagefault on trying to enter a character on the shell prompt as below: ........... Switching to clocksource tsc VFS: Mounted root (ext2 filesystem) on device 1:0. Doing post... Freeing unused kernel memory: 164k freed # l4linux | cpu0: utcb=0xb3000600 416 l4linux | l4lx_thread_create: Created thread 423 (idler0) (u:b3000c00, sp:006a1ff8) l4linux | Page fault: addr = 000003f2 pc = 004f34dc (rw) l4linux | Page fault (non-resolved): pfa=3f2 pc=4f34dc ........... I can verify that the first character typed at the prompt reaches the fiasco kernel (because I can echo it). I am not sure how exactly this (tries to) reach L4linux from there on. Note that I have VGA and keyboards disabled and I am trying to use only the serial line for input and output. Has anyone had similar problems before? Any help on how to proceed would be great! best, ramya

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Device Tree Blob support in l4linux
by Martin Schröder 28 Aug '14

28 Aug '14

On my board I want to add support for GPIO. The relevant drivers rely on the pinctrl configuration stored in a Device Tree Blob. So I exposed the memory regions and IRQs to the l4linux task, enabled CONFIG_ARM_APPEND_DTB=y, CONFIG_ARM_DTB_COMPAT=y, CONFIG_USE_OF=y, compiled the dts (from a native linux build) and added it to moe but without any success. Unfortunately I did not find any references nor any examples how someone can provide a Device Tree Blob to l4linux. Has anybody ever managed to get l4linux running with DTB support? Best regards Martin Schröder.

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Re: advice on using ddelinux
by Björn Döbel 28 Aug '14

28 Aug '14

Am 27.08.2014 um 17:02 schrieb Korbinian Ederer: > Hello, > > thanks for the fast response. > > now I've created the include dir in the pkg/d_can folder. Then I added > the PRIVATE_INC_DIR variable in the Makefile of the driver, but I > still get the file not found error... What I'm doing wrong? From your description ... I don't know! * Are the include files installed into your build directory? (Do a find within <builddir>/include). * Does your compile run use the proper -I flags to get to these include dirs? (Do a make run with the V=1 option) Bjoern > > the directory structur now looks like this: > > l4/pkg/dcan/: > -dcan/: > -driver C Files > -Makefile with the PRIVATE_INC_DIR variable > -include/: > -linux/: > -can/: > - the additional header files > > thanks > > Korbinian > > Am 26.08.2014 um 14:09 schrieb Björn Döbel: >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA1 >> >> On 26.08.2014 13:54, Korbinian Ederer wrote: >>> Hello together, I just started to play with ddelinux... My Goal is >>> to build an d_can driver for l4re. >> Do you want to implement your own driver from scratch? In that case, >> I'd recommend not using any Linux functionality and instead build the >> driver on top of the respective L4Re services or using libddekit, >> which provides convenience wrappers for this functionality. >> >> If you are reusing a Linux driver, DDE might be the right way to go. >> Note, that pkg/dde/linux26 is still at Linux version 2.6.29 and you >> will have to use the respective driver from this version to fit with >> DDE. Otherwise you'll likely run into interface mismatches. >> >>> I tried to collect the important parts from the Makefiles of >>> pkg/anghk and the ddelinux examples to write my own for d_can. >>> >>> when i Try to build my "puzzle" ;) i get following error: >>> fiasco/src/l4/pkg/d_can/d_can/d_can.c:42:27: fatal error: >>> linux/can/dev.h: No such file or directory this leads me to the >>> fear that there's no can/dev.h in ddelinux... >> If there's no linux/can/dev.h in ddelinux, you will probably have to >> add it either to l4/pkg/dde/linux26 or to your own pkg directory. >> >> In any case, you put the missing header files into some place and then >> use L4Re's build system to install the headers properly and to find >> them while compiling your applications. >> >> * An example for installing headers can be found in >> pkg/dde/linux26/include/Makefile >> >> * All DDE drivers are supposed to include pkg/dde/linux26/Makeconf >> in their Makefile. This file sets up a Linux-specific compile >> environment. For the case of your additional headers you would >> include this file and then add your newly created private header >> dir to the PRIVATE_INC_DIR make variable. >> >>> PS: Sorry for the large appendix, but I think it's important for >>> the problem. >>> >>> >>> >>> my pkg folder structure looks like this: >>> >>> l4/pkg/d_can: -./Control -./Makefile -d_can/: -./d_can.c >>> -./d_dcan.h -./d_can_platform.c -./Kconfig -./Makefile >> What would you need the Kconfig file for? >> >> >>> The contents of the files: >>> >>> l4/pkg/d_can/Control: >>> >>> /provides: d_can// //requires: dde-linux26 dde-linux26_net/ / / >>> >>> >>> >>> >>> l4/pkg/d_can/Makefile:/ // //PKGDIR ?= .// //L4DIR ?= >>> $(PKGDIR)/../..// // //include $(L4DIR)/mk/Makeconf// //-include >>> $(PKGDIR_OBJ)/Makeconf// // //#ifeq ($(CONFIG_DDE26),y)// //TARGET >>> = d_can// //#endif// // //include $(L4DIR)/mk/subdir.mk/ >> I think there's no need for the CONFIG_DDE26 check? >> >> >> Bjoern >> >> - -- Dipl.-Inf. Bjoern Doebel Mail: doebel(a)tudos.org >> TU Dresden, OS Chair Phone: +49 351 463 38 799 >> Noethnitzer Str. 46 Fax: +49 351 463 38 284 >> 01187 Dresden, Germany WWW: http://www.tudos.org/~doebel >> - -- >> "When the seagulls follow the trawler, it's because they think >> sardines will be thrown into the sea." (Eric Cantona) >> -----BEGIN PGP SIGNATURE----- >> Version: GnuPG v1 >> >> iEYEARECAAYFAlP8ePMACgkQP5ijxgQLUNnsJwCglKDQZqjNNlQ+LBdGP1J66QaE >> Y0oAn1KoejkjDIr5jF17oKMwqvBW0bWA >> =joNi >> -----END PGP SIGNATURE----- >> >> _______________________________________________ >> l4-hackers mailing list >> l4-hackers(a)os.inf.tu-dresden.de >> http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers >

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advice on using ddelinux
by Korbinian Ederer 26 Aug '14

26 Aug '14

Hello together, I just started to play with ddelinux... My Goal is to build an d_can driver for l4re. I tried to collect the important parts from the Makefiles of pkg/anghk and the ddelinux examples to write my own for d_can. when i Try to build my "puzzle" ;) i get following error: fiasco/src/l4/pkg/d_can/d_can/d_can.c:42:27: fatal error: linux/can/dev.h: No such file or directory this leads me to the fear that there's no can/dev.h in ddelinux... My questions at this point are: -Am I working in the right direction or did I misunderstand the concept of ddelinux? -If not, what would be the right procedure? Thanks Korbinian Ederer PS: Sorry for the large appendix, but I think it's important for the problem. my pkg folder structure looks like this: l4/pkg/d_can: -./Control -./Makefile -d_can/: -./d_can.c -./d_dcan.h -./d_can_platform.c -./Kconfig -./Makefile The contents of the files: l4/pkg/d_can/Control: /provides: d_can// //requires: dde-linux26 dde-linux26_net/ / / l4/pkg/d_can/Makefile:/ // //PKGDIR ?= .// //L4DIR ?= $(PKGDIR)/../..// // //include $(L4DIR)/mk/Makeconf// //-include $(PKGDIR_OBJ)/Makeconf// // //#ifeq ($(CONFIG_DDE26),y)// //TARGET = d_can// //#endif// // //include $(L4DIR)/mk/subdir.mk/ l4/d_can/d_can/d_can.c: //* * CAN bus driver for Bosch D_CAN controller * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * Anil Kumar Ch <anilkumar(a)ti.com> * * Borrowed from C_CAN driver * Copyright (C) 2010 ST Microelectronics * - Bhupesh Sharma <bhupesh.sharma(a)st.com> * * Borrowed heavily from the C_CAN driver originally written by: * Copyright (C) 2007 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer(a)pengutronix.de> * - Simon Kallweit, intefo AG <simon.kallweit(a)intefo.ch> * * Bosch D_CAN controller is compliant to CAN protocol version 2.0 part A and B. * Bosch D_CAN user manual can be obtained from: * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/can/ * d_can_users_manual_111.pdf * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/netdevice.h> #include <linux/if_arp.h> #include <linux/if_ether.h> #include <linux/list.h> #include <linux/io.h> #include <linux/can.h> #include <linux/can/dev.h> #include <linux/can/error.h> #include "d_can.h" /* TI D_CAN module registers */ #define D_CAN_CTL 0x0 /* CAN control register */ #define D_CAN_ES 0x4 /* Error and status */ #define D_CAN_PARITYERR_EOI 0x4 /* Parity error EOI */ #define D_CAN_ERRC 0x8 /* Error counter */ #define D_CAN_BTR 0xC /* Bit timing */ #define D_CAN_INT 0x10 /* Interrupt register */ #define D_CAN_TEST 0x14 /* Test register */ #define D_CAN_PERR 0x1C /* Parity Error Code */ #define D_CAN_ABOTR 0x80 /* Auto-Bus-On Time */ #define D_CAN_TXRQ_X 0x84 /* Transmission Request X */ #define D_CAN_TXRQ(n) (0x88 + ((n) * 4)) /* Transmission request */ #define D_CAN_NWDAT_X 0x98 /* New data X register */ #define D_CAN_NWDAT(n) (0x9C + ((n) * 4)) /* New data */ #define D_CAN_INTPND_X 0xAC /* Interrupt Pending X */ #define D_CAN_INTPND(n) (0xB0 + ((n) * 4)) /* Interrupt Pending */ #define D_CAN_MSGVAL_X 0xC0 /* Message Valid X */ #define D_CAN_MSGVAL(n) (0xC4 + ((n) * 4)) /* Message Valid */ #define D_CAN_INTMUX(n) (0xD8 + ((n) * 4)) /* Interrupt Multiplexer */ #define D_CAN_IFCMD(n) (0x100 + ((n) * 0x20)) /* Command */ #define D_CAN_IFMSK(n) (0x104 + ((n) * 0x20)) /* Mask */ #define D_CAN_IFARB(n) (0x108 + ((n) * 0x20)) /* Arbitration */ #define D_CAN_IFMCTL(n) (0x10c + ((n) * 0x20)) /* Message ctl */ #define D_CAN_IFDATA(n) (0x110 + ((n) * 0x20)) /* DATA A */ #define D_CAN_IFDATB(n) (0x114 + ((n) * 0x20)) /* DATA B */ #define D_CAN_IF3OBS 0x140 /* IF3 Observation */ #define D_CAN_IF3UPD(n) (0x160 + ((n) * 4)) /* Update enable */ #define D_CAN_TIOC 0x1E0 /* CAN TX IO Control */ #define D_CAN_RIOC 0x1E4 /* CAN RX IO Control */ /* Control register Bit fields */ #define D_CAN_CTL_WUBA BIT(26) /* Automatic wake-up on bus activity */ #define D_CAN_CTL_PDR BIT(24) /* Request for local low power mode */ #define D_CAN_CTL_DE3 BIT(20) /* Enable DMA request line for IF3 */ #define D_CAN_CTL_DE2 BIT(19) /* Enable DMA request line for IF2 */ #define D_CAN_CTL_DE1 BIT(18) /* Enable DMA request line for IF1 */ #define D_CAN_CTL_IE1 BIT(17) /* Interrupt line 1 enable */ #define D_CAN_CTL_INITDBG BIT(16) /* Init state for debug access */ #define D_CAN_CTL_SWR BIT(15) /* S/W reset enable */ #define D_CAN_CTL_PMD (0xF << 10) /* Parity on/off */ #define D_CAN_CTL_ABO BIT(9) /* Auto bus on enable */ #define D_CAN_CTL_IDS BIT(8) /* Interruption debug support enable */ #define D_CAN_CTL_TEST BIT(7) /* Test mode enable */ #define D_CAN_CTL_CCE BIT(6) /* Configuration change enable */ #define D_CAN_CTL_DISABLE_AR BIT(5) /* Disable automatic retransmission */ #define D_CAN_CTL_ENABLE_AR (0 << 5) #define D_CAN_CTL_EIE BIT(3) /* Error interrupt enable */ #define D_CAN_CTL_SIE BIT(2) /* Status change int enable */ #define D_CAN_CTL_IE0 BIT(1) /* Interrupt line 0 enable */ #define D_CAN_CTL_INIT BIT(0) /* D_CAN initialization mode */ /* D_CAN Error and Status and Parity Error EOI reg bit fields */ #define D_CAN_ES_PDA BIT(10) /* Local power-down ACK */ #define D_CAN_ES_WUP BIT(9) /* Wkae up pending */ #define D_CAN_ES_PER BIT(8) /* Parity error detected */ #define D_CAN_ES_BOFF BIT(7) /* Bus off state */ #define D_CAN_ES_EWARN BIT(6) /* Warning state */ #define D_CAN_ES_EPASS BIT(5) /* Error passive state */ #define D_CAN_ES_RXOK BIT(4) /* Received a msg successfully */ #define D_CAN_ES_TXOK BIT(3) /* Transmitted a msg successfully */ #define D_CAN_ES_LEC_MASK 0x7 /* Last error code */ /* Parity error reg bit fields */ #define D_CAN_PEEOI BIT(8) /* EOI indication for parity error */ /* Error counter reg bit fields */ #define D_CAN_ERRC_RP_SHIFT 15 #define D_CAN_ERRC_RP_MASK BIT(15) /* Receive error passive */ #define D_CAN_ERRC_REC_SHIFT 8 #define D_CAN_ERRC_REC_MASK (0x7F << 8) /* Receive err counter */ #define D_CAN_ERRC_TEC_SHIFT 0 #define D_CAN_ERRC_TEC_MASK (0xFF << 0) /* Transmit err counter */ /* Bit timing reg bit fields */ #define D_CAN_BTR_BRPE_SHIFT 16 #define D_CAN_BTR_BRPE_MASK (0xF << 16) /* Baud rate prescaler ext */ #define D_CAN_BTR_TSEG2_SHIFT 12 #define D_CAN_BTR_TSEG2_MASK (0x7 << 12) /* Time seg after smpl point */ #define D_CAN_BTR_TSEG1_SHIFT 8 #define D_CAN_BTR_TSEG1_MASK (0xF << 8) /* Time seg before smpl point */ #define D_CAN_BTR_SJW_SHIFT 6 #define D_CAN_BTR_SJW_MASK (0x3 << 6) /* Syncronization jump width */ #define D_CAN_BTR_BRP_SHIFT 0 #define D_CAN_BTR_BRP_MASK (0x3F << 0) /* Baud rate prescaler */ /* D_CAN Test register bit fields */ #define D_CAN_TEST_RDA BIT(9) /* RAM direct access enable */ #define D_CAN_TEST_EXL BIT(8) /* External loopback mode */ #define D_CAN_TEST_RX BIT(7) /* Monitors the reveive pin */ #define D_CAN_TEST_TX (0x3 << 5) /* Control of CAN_TX pin */ #define D_CAN_TEST_LBACK BIT(4) /* Loopback mode */ #define D_CAN_TEST_SILENT BIT(3) /* Silent mdoe */ /* D_CAN Parity error reg bit fields */ #define D_CAN_PERR_WN_MASK (0x7 << 8) /* Parity error word nuber */ #define D_CAN_PERR_MN_MASK 0xFF /* Parity error msg object */ /* D_CAN X registers bit fields */ #define D_CAN_BIT_FIELD(n) (0x3 << (2 * n)) /* X reg's bit field 1 mask */ /* D_CAN IF command reg bit fields */ #define D_CAN_IF_CMD_WR BIT(23) /* Write/read */ #define D_CAN_IF_CMD_MASK BIT(22) /* Access to mask bits */ #define D_CAN_IF_CMD_ARB BIT(21) /* Access to arbitration bits */ #define D_CAN_IF_CMD_CONTROL BIT(20) /* Acess to control bits */ #define D_CAN_IF_CMD_CIP BIT(19) /* Clear int pending */ #define D_CAN_IF_CMD_TXRQST BIT(18) /* Access transmission request */ #define D_CAN_IF_CMD_DATAA BIT(17) /* Access to Data Bytes 0-3 */ #define D_CAN_IF_CMD_DATAB BIT(16) /* Access to Data Bytes 4-7 */ #define D_CAN_IF_CMD_BUSY BIT(15) /* Busy flag */ #define D_CAN_IF_CMD_DAM BIT(14) /* Activation of DMA */ #define D_CAN_IF_CMD_MN_MASK 0xFF /* No. of msg's used for DMA T/F */ #define D_CAN_IF_CMD_ALL (D_CAN_IF_CMD_MASK | D_CAN_IF_CMD_ARB | \ D_CAN_IF_CMD_CONTROL | D_CAN_IF_CMD_TXRQST | \ D_CAN_IF_CMD_DATAA | D_CAN_IF_CMD_DATAB) /* D_CAN IF mask reg bit fields */ #define D_CAN_IF_MASK_MX BIT(31) /* Mask Extended Identifier */ #define D_CAN_IF_MASK_MD BIT(30) /* Mask Message direction */ /* D_CAN IF Arbitration */ #define D_CAN_IF_ARB_MSGVAL BIT(31) /* Message Vaild */ #define D_CAN_IF_ARB_MSGXTD BIT(30) /* Extended Identifier 0-11 1-29 */ #define D_CAN_IF_ARB_DIR_XMIT BIT(29) /* Message direction 0-R 1-T */ /* D_CAN IF Message control */ #define D_CAN_IF_MCTL_NEWDAT BIT(15) /* New data available */ #define D_CAN_IF_MCTL_MSGLST BIT(14) /* Message lost, only for receive */ #define D_CAN_IF_MCTL_CLR_MSGLST (0 << 14) #define D_CAN_IF_MCTL_INTPND BIT(13) /* Interrupt pending */ #define D_CAN_IF_MCTL_UMASK BIT(12) /* Use acceptance mask */ #define D_CAN_IF_MCTL_TXIE BIT(11) /* Transmit int enable */ #define D_CAN_IF_MCTL_RXIE BIT(10) /* Receive int enable */ #define D_CAN_IF_MCTL_RMTEN BIT(9) /* Remote enable */ #define D_CAN_IF_MCTL_TXRQST BIT(8) /* Transmit request */ #define D_CAN_IF_MCTL_EOB BIT(7) /* Data frames */ #define D_CAN_IF_MCTL_DLC_MASK 0xF /* Data length code */ /* D_CAN IF3 Observation reg bit fields */ #define D_CAN_IF3OBS_UP BIT(15) /* Update data status */ #define D_CAN_IF3OBS_SDB BIT(12) /* DataB read out status */ #define D_CAN_IF3OBS_SDA BIT(11) /* DataA read out status */ #define D_CAN_IF3OBS_SC BIT(10) /* Contol bits read out status */ #define D_CAN_IF3OBS_SA BIT(9) /* Arbitration read out status */ #define D_CAN_IF3OBS_SM BIT(8) /* Mask bits read out status */ #define D_CAN_IF3OBS_DB BIT(4) /* Data B read observation */ #define D_CAN_IF3OBS_DA BIT(3) /* Data A read observation */ #define D_CAN_IF3OBS_CTL BIT(2) /* Control read observation */ #define D_CAN_IF3OBS_ARB BIT(1) /* Arbitration data read observation */ #define D_CAN_IF3OBS_MASK BIT(0) /* Mask data read observation */ /* D_CAN TX I/O reg bit fields */ #define D_CAN_TIOC_PU BIT(18) /* CAN_TX pull up/down select */ #define D_CAN_TIOC_PD BIT(17) /* CAN_TX pull disable */ #define D_CAN_TIOC_OD BIT(16) /* CAN_TX open drain enable */ #define D_CAN_TIOC_FUNC BIT(3) /* CAN_TX function */ #define D_CAN_TIOC_DIR BIT(2) /* CAN_TX data direction */ #define D_CAN_TIOC_OUT BIT(1) /* CAN_TX data out write */ #define D_CAN_TIOC_IN BIT(0) /* CAN_TX data in */ /* D_CAN RX I/O reg bit fields */ #define D_CAN_RIOC_PU BIT(18) /* CAN_RX pull up/down select */ #define D_CAN_RIOC_PD BIT(17) /* CAN_RX pull disable */ #define D_CAN_RIOC_OD BIT(16) /* CAN_RX open drain enable */ #define D_CAN_RIOC_FUNC BIT(3) /* CAN_RX function */ #define D_CAN_RIOC_DIR BIT(2) /* CAN_RX data direction */ #define D_CAN_RIOC_OUT BIT(1) /* CAN_RX data out write */ #define D_CAN_RTIOC_IN BIT(0) /* CAN_RX data in */ #define D_CAN_SET_REG 0xFFFFFFFF #define D_CAN_CANMID_IDE BIT(31) /* Extended frame format */ #define D_CAN_CANMID_AME BIT(30) /* Acceptance mask enable */ #define D_CAN_CANMID_AAM BIT(29) /* Auto answer mode */ /* * IF register masks: */ #define IFX_WRITE_IDR(x) ((x) & 0x1FFFFFFF) #define IFX_CMD_BITS(x) ((x) & 0xFFFFFF00) #define IFX_CMD_MSG_NUMBER(x) ((x) & 0xFF) /* Message objects split */ #define D_CAN_NUM_MSG_OBJECTS 64 #define D_CAN_NUM_RX_MSG_OBJECTS 32 #define D_CAN_NUM_TX_MSG_OBJECTS 32 #define D_CAN_MSG_OBJ_RX_FIRST 1 #define D_CAN_MSG_OBJ_RX_LAST (D_CAN_MSG_OBJ_RX_FIRST + \ D_CAN_NUM_RX_MSG_OBJECTS - 1) #define D_CAN_MSG_OBJ_TX_FIRST (D_CAN_MSG_OBJ_RX_LAST + 1) #define D_CAN_MSG_OBJ_TX_LAST (D_CAN_MSG_OBJ_TX_FIRST + \ D_CAN_NUM_TX_MSG_OBJECTS - 1) #define D_CAN_MSG_OBJ_RX_SPLIT 17 #define D_CAN_MSG_OBJ_RX_LOW_LAST (D_CAN_MSG_OBJ_RX_SPLIT - 1) #define D_CAN_NEXT_MSG_OBJ_MASK (D_CAN_NUM_TX_MSG_OBJECTS - 1) /* status interrupt */ #define STATUS_INTERRUPT 0x8000 /* global interrupt masks */ #define ENABLE_ALL_INTERRUPTS 1 #define DISABLE_ALL_INTERRUPTS 0 /* minimum timeout for checking BUSY status */ #define MIN_TIMEOUT_VALUE 6 /* Wait for ~1 sec for INIT bit */ #define D_CAN_WAIT_COUNT 100 #define D_CAN_IF_RX_NUM 0 #define D_CAN_IF_TX_NUM 1 #define D_CAN_GET_XREG_NUM(priv, reg) (__ffs(d_can_read(priv, reg))/4) /* CAN Bittiming constants as per D_CAN specs */ static struct can_bittiming_const d_can_bittiming_const = { .name = D_CAN_DRV_NAME, .tseg1_min = 1, /* Time segment 1 = prop_seg + phase_seg1 */ .tseg1_max = 16, .tseg2_min = 1, /* Time segment 2 = phase_seg2 */ .tseg2_max = 8, .sjw_max = 4, .brp_min = 1, .brp_max = 1024, /* 6-bit BRP field + 4-bit BRPE field*/ .brp_inc = 1, }; /* d_can last error code (lec) values */ enum d_can_lec_type { LEC_NO_ERROR = 0, LEC_STUFF_ERROR, LEC_FORM_ERROR, LEC_ACK_ERROR, LEC_BIT1_ERROR, LEC_BIT0_ERROR, LEC_CRC_ERROR, LEC_UNUSED, }; /* * d_can error types: * Bus errors (BUS_OFF, ERROR_WARNING, ERROR_PASSIVE) are supported */ enum d_can_bus_error_types { D_CAN_NO_ERROR = 0, D_CAN_BUS_OFF, D_CAN_ERROR_WARNING, D_CAN_ERROR_PASSIVE, }; static inline void d_can_write(struct d_can_priv *priv, u32 reg, u32 val) { __raw_writel(val, priv->base + reg); } static inline u32 d_can_read(struct d_can_priv *priv, int reg) { return __raw_readl(priv->base + reg); } static inline void d_can_set_bit(struct d_can_priv *priv, int reg, u32 bit_mask) { d_can_write(priv, reg, d_can_read(priv, reg) | bit_mask); } static inline u32 d_can_get_bit(struct d_can_priv *priv, int reg, u32 bit_mask) { return (d_can_read(priv, reg) & bit_mask) ? 1 : 0; } static inline void d_can_clear_bit(struct d_can_priv *priv, int reg, u32 bit_mask) { d_can_write(priv, reg, d_can_read(priv, reg) & ~bit_mask); } static inline int get_tx_next_msg_obj(const struct d_can_priv *priv) { return (priv->tx_next & D_CAN_NEXT_MSG_OBJ_MASK) + D_CAN_MSG_OBJ_TX_FIRST; } static inline int get_tx_echo_msg_obj(const struct d_can_priv *priv) { return (priv->tx_echo & D_CAN_NEXT_MSG_OBJ_MASK) + D_CAN_MSG_OBJ_TX_FIRST; } /* * API for enabling and disabling the multiple interrupts * of the DCAN module like error interrupt, status interrupt * error enable/disable for instance zero and one and etc. */ static void d_can_interrupts(struct d_can_priv *priv, int enable) { unsigned int cntrl_save = d_can_read(priv, D_CAN_CTL); if (enable) cntrl_save |= (D_CAN_CTL_IE1 | D_CAN_CTL_EIE | D_CAN_CTL_IE0); else cntrl_save &= ~(D_CAN_CTL_IE1 | D_CAN_CTL_SIE | D_CAN_CTL_EIE | D_CAN_CTL_IE0); d_can_write(priv, D_CAN_CTL, cntrl_save); } static inline int d_can_msg_obj_is_busy(struct d_can_priv *priv, int iface) { int count = MIN_TIMEOUT_VALUE; while (count && (d_can_read(priv, D_CAN_IFCMD(iface)) & D_CAN_IF_CMD_BUSY)) { count--; udelay(1); } if (!count) return 1; return 0; } static inline void d_can_object_get(struct net_device *dev, int iface, int objno, int mask) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFCMD(iface), IFX_CMD_BITS(mask) | IFX_CMD_MSG_NUMBER(objno)); /* * As per specs, after writing the message object number in the * IF command register the transfer b/w interface register and * message RAM must be complete in 12 CAN-CLK period. */ if (d_can_msg_obj_is_busy(priv, iface)) netdev_err(dev, "timed out in object get\n"); } static inline void d_can_object_put(struct net_device *dev, int iface, int objno, int mask) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFCMD(iface), D_CAN_IF_CMD_WR | IFX_CMD_BITS(mask) | IFX_CMD_MSG_NUMBER(objno)); /* * As per specs, after writing the message object number in the * IF command register the transfer b/w interface register and * message RAM must be complete in 12 CAN-CLK period. */ if (d_can_msg_obj_is_busy(priv, iface)) netdev_err(dev, "timed out in object put\n"); } static void d_can_write_msg_object(struct net_device *dev, int iface, struct can_frame *frame, int objno) { int i; unsigned int id; u32 dataA = 0; u32 dataB = 0; u32 flags = 0; struct d_can_priv *priv = netdev_priv(dev); if (!(frame->can_id & CAN_RTR_FLAG)) flags |= D_CAN_IF_ARB_DIR_XMIT; if (frame->can_id & CAN_EFF_FLAG) { id = frame->can_id & CAN_EFF_MASK; flags |= D_CAN_IF_ARB_MSGXTD; } else id = ((frame->can_id & CAN_SFF_MASK) << 18); flags |= D_CAN_IF_ARB_MSGVAL; d_can_write(priv, D_CAN_IFARB(iface), IFX_WRITE_IDR(id) | flags); for (i = 0; i < frame->can_dlc; i++) { if (frame->can_dlc <= 4) dataA |= (frame->data[i] << (8 * i)); else { if (i < 4) dataA |= (frame->data[i] << (8 * i)); else dataB |= (frame->data[i] << (8 * (i - 4))); } } /* DATA write to Message object registers DATAA and DATAB */ if (frame->can_dlc <= 4) d_can_write(priv, D_CAN_IFDATA(iface), dataA); else { d_can_write(priv, D_CAN_IFDATB(iface), dataB); d_can_write(priv, D_CAN_IFDATA(iface), dataA); } /* enable TX interrupt for this message object */ d_can_write(priv, D_CAN_IFMCTL(iface), D_CAN_IF_MCTL_TXIE | D_CAN_IF_MCTL_EOB | D_CAN_IF_MCTL_TXRQST | D_CAN_IF_MCTL_NEWDAT | frame->can_dlc); /* Put message data into message RAM */ d_can_object_put(dev, iface, objno, D_CAN_IF_CMD_ALL); } /* * Mark that this particular message object is received and clearing * the interrupt pending register value. */ static inline void d_can_mark_rx_msg_obj(struct net_device *dev, int iface, int ctrl_mask, int obj) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFMCTL(iface), ctrl_mask & ~(D_CAN_IF_MCTL_MSGLST | D_CAN_IF_MCTL_INTPND)); d_can_object_put(dev, iface, obj, D_CAN_IF_CMD_CONTROL); } static inline void d_can_activate_all_lower_rx_msg_objs(struct net_device *dev, int iface, int ctrl_mask) { int i; struct d_can_priv *priv = netdev_priv(dev); for (i = D_CAN_MSG_OBJ_RX_FIRST; i <= D_CAN_MSG_OBJ_RX_LOW_LAST; i++) { d_can_write(priv, D_CAN_IFMCTL(iface), ctrl_mask & ~(D_CAN_IF_MCTL_MSGLST | D_CAN_IF_MCTL_INTPND | D_CAN_IF_MCTL_NEWDAT)); d_can_object_put(dev, iface, i, D_CAN_IF_CMD_CONTROL); } } static inline void d_can_activate_rx_msg_obj(struct net_device *dev, int iface, int ctrl_mask, int obj) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFMCTL(iface), ctrl_mask & ~(D_CAN_IF_MCTL_MSGLST | D_CAN_IF_MCTL_INTPND | D_CAN_IF_MCTL_NEWDAT)); d_can_object_put(dev, iface, obj, D_CAN_IF_CMD_CONTROL); } static void d_can_handle_lost_msg_obj(struct net_device *dev, int iface, int objno) { struct d_can_priv *priv = netdev_priv(dev); struct net_device_stats *stats = &dev->stats; struct sk_buff *skb; struct can_frame *frame; netdev_err(dev, "msg lost in buffer %d\n", objno); d_can_object_get(dev, iface, objno, D_CAN_IF_CMD_ALL & ~D_CAN_IF_CMD_TXRQST); d_can_write(priv, D_CAN_IFMCTL(iface), D_CAN_IF_MCTL_CLR_MSGLST); d_can_object_put(dev, iface, objno, D_CAN_IF_CMD_CONTROL); /* create an error msg */ skb = alloc_can_err_skb(dev, &frame); if (unlikely(!skb)) return; frame->can_id |= CAN_ERR_CRTL; frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; stats->rx_errors++; stats->rx_over_errors++; netif_receive_skb(skb); } static int d_can_read_msg_object(struct net_device *dev, int iface, int ctrl) { int i; u32 dataA = 0; u32 dataB = 0; unsigned int arb_val; unsigned int mctl_val; struct d_can_priv *priv = netdev_priv(dev); struct net_device_stats *stats = &dev->stats; struct sk_buff *skb; struct can_frame *frame; skb = alloc_can_skb(dev, &frame); if (!skb) { stats->rx_dropped++; return -ENOMEM; } frame->can_dlc = get_can_dlc(ctrl & 0x0F); arb_val = d_can_read(priv, D_CAN_IFARB(iface)); mctl_val = d_can_read(priv, D_CAN_IFMCTL(iface)); if (arb_val & D_CAN_IF_ARB_MSGXTD) frame->can_id = (arb_val & CAN_EFF_MASK) | CAN_EFF_FLAG; else frame->can_id = (arb_val >> 18) & CAN_SFF_MASK; if (mctl_val & D_CAN_IF_MCTL_RMTEN) frame->can_id |= CAN_RTR_FLAG; else { dataA = d_can_read(priv, D_CAN_IFDATA(iface)); dataB = d_can_read(priv, D_CAN_IFDATB(iface)); for (i = 0; i < frame->can_dlc; i++) { /* Writing MO higher 4 data bytes to skb */ if (frame->can_dlc <= 4) frame->data[i] = dataA >> (8 * i); else { if (i < 4) frame->data[i] = dataA >> (8 * i); else frame->data[i] = dataB >> (8 * (i-4)); } } } netif_receive_skb(skb); stats->rx_packets++; stats->rx_bytes += frame->can_dlc; return 0; } static void d_can_setup_receive_object(struct net_device *dev, int iface, int objno, unsigned int mask, unsigned int id, unsigned int mcont) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFMSK(iface), IFX_WRITE_IDR(mask)); d_can_write(priv, D_CAN_IFARB(iface), IFX_WRITE_IDR(id) | D_CAN_IF_ARB_MSGVAL); d_can_write(priv, D_CAN_IFMCTL(iface), mcont); d_can_object_put(dev, iface, objno, D_CAN_IF_CMD_ALL & ~D_CAN_IF_CMD_TXRQST); netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno, d_can_read(priv, D_CAN_MSGVAL(D_CAN_GET_XREG_NUM(priv, D_CAN_MSGVAL_X)))); } static void d_can_inval_msg_object(struct net_device *dev, int iface, int objno) { struct d_can_priv *priv = netdev_priv(dev); d_can_write(priv, D_CAN_IFARB(iface), 0); d_can_write(priv, D_CAN_IFMCTL(iface), 0); d_can_object_put(dev, iface, objno, D_CAN_IF_CMD_ARB | D_CAN_IF_CMD_CONTROL); netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno, d_can_read(priv, D_CAN_MSGVAL(D_CAN_GET_XREG_NUM(priv, D_CAN_MSGVAL_X)))); } static inline int d_can_is_next_tx_obj_busy(struct d_can_priv *priv, int objno) { u32 txrq_x_reg_val = D_CAN_GET_XREG_NUM(priv, D_CAN_TXRQ_X); /* * as transmission request register's bit n-1 corresponds to * message object n, we need to handle the same properly. */ if (d_can_read(priv, D_CAN_TXRQ(txrq_x_reg_val)) & (1 << (objno - D_CAN_MSG_OBJ_TX_FIRST))) return 1; return 0; } static netdev_tx_t d_can_start_xmit(struct sk_buff *skb, struct net_device *dev) { u32 msg_obj_no; struct d_can_priv *priv = netdev_priv(dev); struct can_frame *frame = (struct can_frame *)skb->data; if (can_dropped_invalid_skb(dev, skb)) return NETDEV_TX_OK; msg_obj_no = get_tx_next_msg_obj(priv); /* prepare message object for transmission */ d_can_write_msg_object(dev, D_CAN_IF_TX_NUM, frame, msg_obj_no); can_put_echo_skb(skb, dev, msg_obj_no - D_CAN_MSG_OBJ_TX_FIRST); /* * we have to stop the queue in case of a wrap around or * if the next TX message object is still in use */ priv->tx_next++; if (d_can_is_next_tx_obj_busy(priv, get_tx_next_msg_obj(priv)) || ((priv->tx_next & D_CAN_NEXT_MSG_OBJ_MASK) == 0)) netif_stop_queue(dev); return NETDEV_TX_OK; } static int d_can_set_bittiming(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); const struct can_bittiming *bt = &priv->can.bittiming; u32 can_btc; can_btc = ((bt->phase_seg2 - 1) & 0x7) << D_CAN_BTR_TSEG2_SHIFT; can_btc |= ((bt->phase_seg1 + bt->prop_seg - 1) & 0xF) << D_CAN_BTR_TSEG1_SHIFT; can_btc |= ((bt->sjw - 1) & 0x3) << D_CAN_BTR_SJW_SHIFT; /* Ten bits contains the BRP, 6 bits for BRP and upper 4 bits for brpe*/ can_btc |= ((bt->brp - 1) & 0x3F) << D_CAN_BTR_BRP_SHIFT; can_btc |= ((((bt->brp - 1) >> 6) & 0xF) << D_CAN_BTR_BRPE_SHIFT); d_can_write(priv, D_CAN_BTR, can_btc); netdev_info(dev, "setting CAN BT = %#x\n", can_btc); return 0; } /* * Configure D_CAN message objects for Tx and Rx purposes: * D_CAN provides a total of 64 message objects that can be configured * either for Tx or Rx purposes. In this driver first 32 message objects * are used as a reception FIFO and the reception FIFO is signified by the * EoB bit being SET. The remaining 32 message objects are kept aside for * Tx purposes. See user guide document for further details on configuring * message objects. */ static void d_can_configure_msg_objects(struct net_device *dev) { unsigned int i; /* first invalidate all message objects */ for (i = D_CAN_MSG_OBJ_RX_FIRST; i <= D_CAN_NUM_MSG_OBJECTS; i++) d_can_inval_msg_object(dev, D_CAN_IF_RX_NUM, i); /* setup receive message objects */ for (i = D_CAN_MSG_OBJ_RX_FIRST; i < D_CAN_MSG_OBJ_RX_LAST; i++) d_can_setup_receive_object(dev, D_CAN_IF_RX_NUM, i, 0, 0, (D_CAN_IF_MCTL_RXIE | D_CAN_IF_MCTL_UMASK) & ~D_CAN_IF_MCTL_EOB); /* Last object EoB bit should be 1 for terminate */ d_can_setup_receive_object(dev, D_CAN_IF_RX_NUM, D_CAN_MSG_OBJ_RX_LAST, 0, 0, D_CAN_IF_MCTL_RXIE | D_CAN_IF_MCTL_UMASK | D_CAN_IF_MCTL_EOB); } static void d_can_test_mode(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); /* Test mode is enabled in this step & the specific TEST bits * are enabled accordingly */ d_can_write(priv, D_CAN_CTL, D_CAN_CTL_EIE | D_CAN_CTL_IE1 | D_CAN_CTL_IE0 | D_CAN_CTL_TEST); if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) { /* silent mode : bus-monitoring mode */ d_can_write(priv, D_CAN_TEST, D_CAN_TEST_SILENT); } else if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) { /* loopback mode : useful for self-test function */ d_can_write(priv, D_CAN_TEST, D_CAN_TEST_LBACK); } else { /* loopback + silent mode : useful for hot self-test */ d_can_write(priv, D_CAN_TEST, D_CAN_TEST_LBACK | D_CAN_TEST_SILENT); } } /* * Configure D_CAN chip: * - enable/disable auto-retransmission * - set operating mode * - configure message objects */ static void d_can_init(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); u32 cnt; netdev_dbg(dev, "resetting d_can ...\n"); d_can_set_bit(priv, D_CAN_CTL, D_CAN_CTL_SWR); /* Enter initialization mode by setting the Init bit */ d_can_set_bit(priv, D_CAN_CTL, D_CAN_CTL_INIT); /* enable automatic retransmission */ d_can_set_bit(priv, D_CAN_CTL, D_CAN_CTL_ENABLE_AR); /* Set the Configure Change Enable ( CCE) bit */ d_can_set_bit(priv, D_CAN_CTL, D_CAN_CTL_CCE); /* Wait for the Init bit to get set */ cnt = D_CAN_WAIT_COUNT; while (!d_can_get_bit(priv, D_CAN_CTL, D_CAN_CTL_INIT) && cnt != 0) { --cnt; udelay(10); } /* set bittiming params */ d_can_set_bittiming(dev); d_can_clear_bit(priv, D_CAN_CTL, D_CAN_CTL_INIT | D_CAN_CTL_CCE); /* Wait for the Init bit to get clear */ cnt = D_CAN_WAIT_COUNT; while (d_can_get_bit(priv, D_CAN_CTL, D_CAN_CTL_INIT) && cnt != 0) { --cnt; udelay(10); } if (!priv->test_mode) { /* normal mode*/ d_can_write(priv, D_CAN_CTL, D_CAN_CTL_EIE | D_CAN_CTL_IE1 | D_CAN_CTL_IE0); } else d_can_test_mode(dev); /* Enable TX and RX I/O Control pins */ d_can_write(priv, D_CAN_TIOC, D_CAN_TIOC_FUNC); d_can_write(priv, D_CAN_RIOC, D_CAN_RIOC_FUNC); /* configure message objects */ d_can_configure_msg_objects(dev); /* set a LEC value so that we can check for updates later */ d_can_write(priv, D_CAN_ES, LEC_UNUSED); } static void d_can_start(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); /* basic d_can initialization */ d_can_init(dev); priv->can.state = CAN_STATE_ERROR_ACTIVE; /* reset tx helper pointers */ priv->tx_next = priv->tx_echo = 0; /* enable status change, error and module interrupts */ d_can_interrupts(priv, ENABLE_ALL_INTERRUPTS); } static void d_can_stop(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); /* disable all interrupts */ d_can_interrupts(priv, DISABLE_ALL_INTERRUPTS); /* set the state as STOPPED */ priv->can.state = CAN_STATE_STOPPED; } static int d_can_set_mode(struct net_device *dev, enum can_mode mode) { switch (mode) { case CAN_MODE_START: d_can_start(dev); netif_wake_queue(dev); break; default: return -EOPNOTSUPP; } return 0; } static int d_can_get_berr_counter(const struct net_device *dev, struct can_berr_counter *bec) { unsigned int reg_err_counter; struct d_can_priv *priv = netdev_priv(dev); reg_err_counter = d_can_read(priv, D_CAN_ERRC); bec->rxerr = (reg_err_counter & D_CAN_ERRC_REC_MASK) >> D_CAN_ERRC_REC_SHIFT; bec->txerr = reg_err_counter & D_CAN_ERRC_TEC_MASK; return 0; } /* * theory of operation: * * priv->tx_echo holds the number of the oldest can_frame put for * transmission into the hardware, but not yet ACKed by the CAN tx * complete IRQ. * * We iterate from priv->tx_echo to priv->tx_next and check if the * packet has been transmitted, echo it back to the CAN framework. * If we discover a not yet transmitted package, stop looking for more. */ static void d_can_do_tx(struct net_device *dev) { u32 msg_obj_no; struct d_can_priv *priv = netdev_priv(dev); struct net_device_stats *stats = &dev->stats; u32 txrq_x_reg_val; u32 txrq_reg_val; for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) { msg_obj_no = get_tx_echo_msg_obj(priv); txrq_x_reg_val = D_CAN_GET_XREG_NUM(priv, D_CAN_TXRQ_X); txrq_reg_val = d_can_read(priv, D_CAN_TXRQ(txrq_x_reg_val)); if (!(txrq_reg_val & (1 << (msg_obj_no - D_CAN_MSG_OBJ_TX_FIRST)))) { can_get_echo_skb(dev, msg_obj_no - D_CAN_MSG_OBJ_TX_FIRST); stats->tx_bytes += d_can_read(priv, D_CAN_IFMCTL(D_CAN_IF_TX_NUM)) & D_CAN_IF_MCTL_DLC_MASK; stats->tx_packets++; d_can_inval_msg_object(dev, D_CAN_IF_TX_NUM, msg_obj_no); } else break; } /* restart queue if wrap-up or if queue stalled on last pkt */ if (((priv->tx_next & D_CAN_NEXT_MSG_OBJ_MASK) != 0) || ((priv->tx_echo & D_CAN_NEXT_MSG_OBJ_MASK) == 0)) netif_wake_queue(dev); } /* * theory of operation: * * d_can core saves a received CAN message into the first free message * object it finds free (starting with the lowest). Bits NEWDAT and * INTPND are set for this message object indicating that a new message * has arrived. To work-around this issue, we keep two groups of message * objects whose partitioning is defined by D_CAN_MSG_OBJ_RX_SPLIT. * * To ensure in-order frame reception we use the following * approach while re-activating a message object to receive further * frames: * - if the current message object number is lower than * D_CAN_MSG_RX_LOW_LAST, do not clear the NEWDAT bit while clearing * the INTPND bit. * - if the current message object number is equal to * D_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of all lower * receive message objects. * - if the current message object number is greater than * D_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of * only this message object. */ static int d_can_do_rx_poll(struct net_device *dev, int quota) { struct d_can_priv *priv = netdev_priv(dev); unsigned int msg_obj, mctrl_reg_val; u32 num_rx_pkts = 0; u32 intpnd_x_reg_val; u32 intpnd_reg_val; for (msg_obj = D_CAN_MSG_OBJ_RX_FIRST; msg_obj <= D_CAN_MSG_OBJ_RX_LAST && quota > 0; msg_obj++) { intpnd_x_reg_val = D_CAN_GET_XREG_NUM(priv, D_CAN_INTPND_X); intpnd_reg_val = d_can_read(priv, D_CAN_INTPND(intpnd_x_reg_val)); /* * as interrupt pending register's bit n-1 corresponds to * message object n, we need to handle the same properly. */ if (intpnd_reg_val & (1 << (msg_obj - 1))) { d_can_object_get(dev, D_CAN_IF_RX_NUM, msg_obj, D_CAN_IF_CMD_ALL & ~D_CAN_IF_CMD_TXRQST); mctrl_reg_val = d_can_read(priv, D_CAN_IFMCTL(D_CAN_IF_RX_NUM)); if (!(mctrl_reg_val & D_CAN_IF_MCTL_NEWDAT)) continue; /* read the data from the message object */ d_can_read_msg_object(dev, D_CAN_IF_RX_NUM, mctrl_reg_val); if (mctrl_reg_val & D_CAN_IF_MCTL_EOB) d_can_setup_receive_object(dev, D_CAN_IF_RX_NUM, D_CAN_MSG_OBJ_RX_LAST, 0, 0, D_CAN_IF_MCTL_RXIE | D_CAN_IF_MCTL_UMASK | D_CAN_IF_MCTL_EOB); if (mctrl_reg_val & D_CAN_IF_MCTL_MSGLST) { d_can_handle_lost_msg_obj(dev, D_CAN_IF_RX_NUM, msg_obj); num_rx_pkts++; quota--; continue; } if (msg_obj < D_CAN_MSG_OBJ_RX_LOW_LAST) d_can_mark_rx_msg_obj(dev, D_CAN_IF_RX_NUM, mctrl_reg_val, msg_obj); else if (msg_obj > D_CAN_MSG_OBJ_RX_LOW_LAST) /* activate this msg obj */ d_can_activate_rx_msg_obj(dev, D_CAN_IF_RX_NUM, mctrl_reg_val, msg_obj); else if (msg_obj == D_CAN_MSG_OBJ_RX_LOW_LAST) /* activate all lower message objects */ d_can_activate_all_lower_rx_msg_objs(dev, D_CAN_IF_RX_NUM, mctrl_reg_val); num_rx_pkts++; quota--; } } return num_rx_pkts; } static inline int d_can_has_handle_berr(struct d_can_priv *priv) { return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) && (priv->current_status & LEC_UNUSED); } static int d_can_handle_state_change(struct net_device *dev, enum d_can_bus_error_types error_type) { unsigned int reg_err_counter; unsigned int rx_err_passive; struct d_can_priv *priv = netdev_priv(dev); struct net_device_stats *stats = &dev->stats; struct can_frame *cf; struct sk_buff *skb; struct can_berr_counter bec; /* propagate the error condition to the CAN stack */ skb = alloc_can_err_skb(dev, &cf); if (unlikely(!skb)) return 0; d_can_get_berr_counter(dev, &bec); reg_err_counter = d_can_read(priv, D_CAN_ERRC); rx_err_passive = (reg_err_counter & D_CAN_ERRC_RP_MASK) >> D_CAN_ERRC_RP_SHIFT; switch (error_type) { case D_CAN_ERROR_WARNING: /* error warning state */ priv->can.can_stats.error_warning++; priv->can.state = CAN_STATE_ERROR_WARNING; cf->can_id |= CAN_ERR_CRTL; cf->data[1] = (bec.txerr > bec.rxerr) ? CAN_ERR_CRTL_TX_WARNING : CAN_ERR_CRTL_RX_WARNING; cf->data[6] = bec.txerr; cf->data[7] = bec.rxerr; break; case D_CAN_ERROR_PASSIVE: /* error passive state */ priv->can.can_stats.error_passive++; priv->can.state = CAN_STATE_ERROR_PASSIVE; cf->can_id |= CAN_ERR_CRTL; if (rx_err_passive) cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; if (bec.txerr > 127) cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE; cf->data[6] = bec.txerr; cf->data[7] = bec.rxerr; break; case D_CAN_BUS_OFF: /* bus-off state */ priv->can.state = CAN_STATE_BUS_OFF; cf->can_id |= CAN_ERR_BUSOFF; /* * disable all interrupts in bus-off mode to ensure that * the CPU is not hogged down */ d_can_interrupts(priv, DISABLE_ALL_INTERRUPTS); can_bus_off(dev); break; default: break; } netif_receive_skb(skb); stats->rx_packets++; stats->rx_bytes += cf->can_dlc; return 1; } static int d_can_handle_bus_err(struct net_device *dev, enum d_can_lec_type lec_type) { struct d_can_priv *priv = netdev_priv(dev); struct net_device_stats *stats = &dev->stats; struct can_frame *cf; struct sk_buff *skb; /* * early exit if no lec update or no error. * no lec update means that no CAN bus event has been detected * since CPU wrote 0x7 value to status reg. */ if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR) return 0; /* propagate the error condition to the CAN stack */ skb = alloc_can_err_skb(dev, &cf); if (unlikely(!skb)) return 0; /* * check for 'last error code' which tells us the * type of the last error to occur on the CAN bus */ /* common for all type of bus errors */ priv->can.can_stats.bus_error++; stats->rx_errors++; cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; cf->data[2] |= CAN_ERR_PROT_UNSPEC; switch (lec_type) { case LEC_STUFF_ERROR: netdev_dbg(dev, "stuff error\n"); cf->data[2] |= CAN_ERR_PROT_STUFF; break; case LEC_FORM_ERROR: netdev_dbg(dev, "form error\n"); cf->data[2] |= CAN_ERR_PROT_FORM; break; case LEC_ACK_ERROR: netdev_dbg(dev, "ack error\n"); cf->data[2] |= (CAN_ERR_PROT_LOC_ACK | CAN_ERR_PROT_LOC_ACK_DEL); break; case LEC_BIT1_ERROR: netdev_dbg(dev, "bit1 error\n"); cf->data[2] |= CAN_ERR_PROT_BIT1; break; case LEC_BIT0_ERROR: netdev_dbg(dev, "bit0 error\n"); cf->data[2] |= CAN_ERR_PROT_BIT0; break; case LEC_CRC_ERROR: netdev_dbg(dev, "CRC error\n"); cf->data[2] |= (CAN_ERR_PROT_LOC_CRC_SEQ | CAN_ERR_PROT_LOC_CRC_DEL); break; default: break; } /* set a LEC value so that we can check for updates later */ d_can_write(priv, D_CAN_ES, LEC_UNUSED); netif_receive_skb(skb); stats->rx_packets++; stats->rx_bytes += cf->can_dlc; return 1; } static int d_can_poll(struct napi_struct *napi, int quota) { int lec_type = 0; int work_done = 0; struct net_device *dev = napi->dev; struct d_can_priv *priv = netdev_priv(dev); if (!priv->irqstatus) goto end; /* status events have the highest priority */ if (priv->irqstatus == STATUS_INTERRUPT) { priv->current_status = d_can_read(priv, D_CAN_ES); /* handle Tx/Rx events */ if (priv->current_status & D_CAN_ES_TXOK) d_can_write(priv, D_CAN_ES, priv->current_status & ~D_CAN_ES_TXOK); if (priv->current_status & D_CAN_ES_RXOK) d_can_write(priv, D_CAN_ES, priv->current_status & ~D_CAN_ES_RXOK); /* handle state changes */ if ((priv->current_status & D_CAN_ES_EWARN) && (!(priv->last_status & D_CAN_ES_EWARN))) { netdev_dbg(dev, "entered error warning state\n"); work_done += d_can_handle_state_change(dev, D_CAN_ERROR_WARNING); } if ((priv->current_status & D_CAN_ES_EPASS) && (!(priv->last_status & D_CAN_ES_EPASS))) { netdev_dbg(dev, "entered error passive state\n"); work_done += d_can_handle_state_change(dev, D_CAN_ERROR_PASSIVE); } if ((priv->current_status & D_CAN_ES_BOFF) && (!(priv->last_status & D_CAN_ES_BOFF))) { netdev_dbg(dev, "entered bus off state\n"); work_done += d_can_handle_state_change(dev, D_CAN_BUS_OFF); } /* handle bus recovery events */ if ((!(priv->current_status & D_CAN_ES_BOFF)) && (priv->last_status & D_CAN_ES_BOFF)) { netdev_dbg(dev, "left bus off state\n"); priv->can.state = CAN_STATE_ERROR_ACTIVE; } if ((!(priv->current_status & D_CAN_ES_EPASS)) && (priv->last_status & D_CAN_ES_EPASS)) { netdev_dbg(dev, "left error passive state\n"); priv->can.state = CAN_STATE_ERROR_ACTIVE; } priv->last_status = priv->current_status; /* handle lec errors on the bus */ lec_type = d_can_has_handle_berr(priv); if (lec_type) work_done += d_can_handle_bus_err(dev, lec_type); } else if ((priv->irqstatus >= D_CAN_MSG_OBJ_RX_FIRST) && (priv->irqstatus <= D_CAN_MSG_OBJ_RX_LAST)) { /* handle events corresponding to receive message objects */ work_done += d_can_do_rx_poll(dev, (quota - work_done)); } else if ((priv->irqstatus >= D_CAN_MSG_OBJ_TX_FIRST) && (priv->irqstatus <= D_CAN_MSG_OBJ_TX_LAST)) { /* handle events corresponding to transmit message objects */ d_can_do_tx(dev); } end: if (work_done < quota) { napi_complete(napi); /* enable all IRQs */ d_can_interrupts(priv, ENABLE_ALL_INTERRUPTS); } return work_done; } static irqreturn_t d_can_isr(int irq, void *dev_id) { struct net_device *dev = (struct net_device *)dev_id; struct d_can_priv *priv = netdev_priv(dev); priv->irqstatus = d_can_read(priv, D_CAN_INT); if (!priv->irqstatus) return IRQ_NONE; /* disable all interrupts and schedule the NAPI */ d_can_interrupts(priv, DISABLE_ALL_INTERRUPTS); napi_schedule(&priv->napi); return IRQ_HANDLED; } static int d_can_open(struct net_device *ndev) { int err; struct d_can_priv *priv = netdev_priv(ndev); /* Open common can device */ err = open_candev(ndev); if (err) { netdev_err(ndev, "open_candev() failed %d\n", err); return err; } /* register interrupt handler for Message Object (MO) * and Error + status change (ES) */ err = request_irq(ndev->irq, &d_can_isr, IRQF_SHARED, ndev->name, ndev); if (err) { netdev_err(ndev, "failed to request MO_ES interrupt\n"); goto exit_close_candev; } /* register interrupt handler for only Message Object */ err = request_irq(priv->irq_obj, &d_can_isr, IRQF_SHARED, ndev->name, ndev); if (err) { netdev_err(ndev, "failed to request MO interrupt\n"); goto exit_free_irq; } /* start the d_can controller */ d_can_start(ndev); napi_enable(&priv->napi); netif_start_queue(ndev); return 0; exit_free_irq: free_irq(ndev->irq, ndev); exit_close_candev: close_candev(ndev); return err; } static int d_can_close(struct net_device *ndev) { struct d_can_priv *priv = netdev_priv(ndev); netif_stop_queue(ndev); napi_disable(&priv->napi); d_can_stop(ndev); free_irq(ndev->irq, ndev); free_irq(priv->irq_obj, ndev); close_candev(ndev); return 0; } struct net_device *alloc_d_can_dev(int num_objs) { struct net_device *dev; struct d_can_priv *priv; dev = alloc_candev(sizeof(struct d_can_priv), num_objs/2); if (!dev) return NULL; priv = netdev_priv(dev); netif_napi_add(dev, &priv->napi, d_can_poll, num_objs/2); priv->dev = dev; priv->can.bittiming_const = &d_can_bittiming_const; priv->can.do_set_mode = d_can_set_mode; priv->can.do_get_berr_counter = d_can_get_berr_counter; priv->can.ctrlmode_supported = (CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING | CAN_CTRLMODE_3_SAMPLES); return dev; } EXPORT_SYMBOL_GPL(alloc_d_can_dev); void free_d_can_dev(struct net_device *dev) { free_candev(dev); } EXPORT_SYMBOL_GPL(free_d_can_dev); static const struct net_device_ops d_can_netdev_ops = { .ndo_open = d_can_open, .ndo_stop = d_can_close, .ndo_start_xmit = d_can_start_xmit, }; int register_d_can_dev(struct net_device *dev) { /* we support local echo */ dev->flags |= IFF_ECHO; dev->netdev_ops = &d_can_netdev_ops; return register_candev(dev); } EXPORT_SYMBOL_GPL(register_d_can_dev); void unregister_d_can_dev(struct net_device *dev) { struct d_can_priv *priv = netdev_priv(dev); /* disable all interrupts */ d_can_interrupts(priv, DISABLE_ALL_INTERRUPTS); unregister_candev(dev); } EXPORT_SYMBOL_GPL(unregister_d_can_dev); MODULE_AUTHOR("Anil Kumar Ch <anilkumar(a)ti.com>"); MODULE_LICENSE("GPL v2"); MODULE_VERSION(D_CAN_VERSION); MODULE_DESCRIPTION(D_CAN_DRV_DESC);/ l4/pkg/d_can/d_can/d_can.h: //* * CAN bus driver for Bosch D_CAN controller * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * Anil Kumar Ch <anilkumar(a)ti.com> * * Borrowed from C_CAN driver * Copyright (C) 2010 ST Microelectronics * - Bhupesh Sharma <bhupesh.sharma(a)st.com> * * Borrowed heavily from the C_CAN driver originally written by: * Copyright (C) 2007 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer(a)pengutronix.de> * - Simon Kallweit, intefo AG <simon.kallweit(a)intefo.ch> * * Bosch D_CAN controller is compliant to CAN protocol version 2.0 part A and B. * Bosch D_CAN user manual can be obtained from: * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/can/ * d_can_users_manual_111.pdf * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef D_CAN_H #define D_CAN_H #define D_CAN_DRV_NAME "d_can" #define D_CAN_VERSION "1.0" #define D_CAN_DRV_DESC "CAN bus driver for Bosch D_CAN controller " \ D_CAN_VERSION /* d_can private data structure */ struct d_can_priv { struct can_priv can; /* must be the first member */ struct napi_struct napi; struct net_device *dev; int current_status; int last_status; unsigned int irqstatus; void __iomem *base; u32 napi_weight; struct clk *fck; struct clk *ick; bool test_mode; unsigned int irq; /* device IRQ number, for all MO and ES */ unsigned int irq_obj; /* device IRQ number for only Msg Object */ unsigned int irq_parity; /* device IRQ number for parity error */ unsigned long irq_flags; /* for request_irq() */ unsigned int tx_next; unsigned int tx_echo; unsigned int rx_next; void *priv; /* for board-specific data */ }; struct net_device *alloc_d_can_dev(int); void free_d_can_dev(struct net_device *dev); int register_d_can_dev(struct net_device *dev); void unregister_d_can_dev(struct net_device *dev); #endif /* D_CAN_H *// l4/pkg/d_can/d_can/d_can_platform.c: / /* * Platform CAN bus driver for Bosch D_CAN controller * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * Anil Kumar Ch <anilkumar(a)ti.com> * * Borrowed from C_CAN driver * Copyright (C) 2010 ST Microelectronics * - Bhupesh Sharma <bhupesh.sharma(a)st.com> * * Borrowed heavily from the C_CAN driver originally written by: * Copyright (C) 2007 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer(a)pengutronix.de> * - Simon Kallweit, intefo AG <simon.kallweit(a)intefo.ch> * * Bosch D_CAN controller is compliant to CAN protocol version 2.0 part A and B. * Bosch D_CAN user manual can be obtained from: * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/can/ * d_can_users_manual_111.pdf * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /* * Your platform definitions should specify module ram offsets and interrupt * number to use as follows: * * static struct d_can_platform_data am33xx_evm_d_can_pdata = { * .d_can_offset = 0, * .d_can_ram_offset = 0x1000, * .num_of_msg_objs = 64, * .dma_support = true, * .test_mode_enable = false, * .parity_check = false, * .version = 0x1, * .hw_raminit = d_can_hw_raminit, * }; * * Please see include/linux/can/platform/d_can.h for description of * above fields. * */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/netdevice.h> #include <linux/if_arp.h> #include <linux/if_ether.h> #include <linux/list.h> #include <linux/io.h> #include <linux/platform_device.h> #include <linux/can/platform/d_can.h> #include <linux/clk.h> #include <linux/slab.h> #include <linux/can/dev.h> #include "d_can.h" static int __devinit d_can_plat_probe(struct platform_device *pdev) { int ret = 0; void __iomem *addr; struct net_device *ndev; struct d_can_priv *priv; struct resource *mem; struct d_can_platform_data *pdata; pdata = pdev->dev.platform_data; if (!pdata) { dev_err(&pdev->dev, "No platform data\n"); goto exit; } /* allocate the d_can device */ ndev = alloc_d_can_dev(pdata->num_of_msg_objs); if (!ndev) { ret = -ENOMEM; dev_err(&pdev->dev, "alloc_d_can_dev failed\n"); goto exit; } priv = netdev_priv(ndev); priv->fck = clk_get(&pdev->dev, pdata->fck_name); if (IS_ERR(priv->fck)) { dev_err(&pdev->dev, "%s is not found\n", pdata->fck_name); ret = -ENODEV; goto exit_free_ndev; } clk_enable(priv->fck); priv->ick = clk_get(&pdev->dev, pdata->ick_name); if (IS_ERR(priv->ick)) { dev_err(&pdev->dev, "%s is not found\n", pdata->ick_name); ret = -ENODEV; goto exit_free_fck; } clk_enable(priv->ick); /* get the platform data */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mem) { ret = -ENODEV; dev_err(&pdev->dev, "No mem resource\n"); goto exit_free_clks; } if (!request_mem_region(mem->start, resource_size(mem), D_CAN_DRV_NAME)) { dev_err(&pdev->dev, "resource unavailable\n"); ret = -EBUSY; goto exit_free_clks; } addr = ioremap(mem->start, resource_size(mem)); if (!addr) { dev_err(&pdev->dev, "ioremap failed\n"); ret = -ENOMEM; goto exit_release_mem; } /* IRQ specific to Error and status & can be used for Message Object */ ndev->irq = platform_get_irq_byname(pdev, "int0"); if (!ndev->irq) { dev_err(&pdev->dev, "No irq0 resource\n"); goto exit_iounmap; } /* IRQ specific for Message Object */ priv->irq_obj = platform_get_irq_byname(pdev, "int1"); if (!priv->irq_obj) { dev_err(&pdev->dev, "No irq1 resource\n"); goto exit_iounmap; } priv->base = addr; priv->can.clock.freq = clk_get_rate(priv->fck); priv->test_mode = pdata->test_mode_enable; platform_set_drvdata(pdev, ndev); SET_NETDEV_DEV(ndev, &pdev->dev); ret = register_d_can_dev(ndev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", D_CAN_DRV_NAME, ret); goto exit_free_device; } dev_info(&pdev->dev, "%s device registered (irq=%d, irq_obj=%d)\n", D_CAN_DRV_NAME, ndev->irq, priv->irq_obj); return 0; exit_free_device: platform_set_drvdata(pdev, NULL); exit_iounmap: iounmap(addr); exit_release_mem: release_mem_region(mem->start, resource_size(mem)); exit_free_clks: clk_disable(priv->ick); clk_put(priv->ick); exit_free_fck: clk_disable(priv->fck); clk_put(priv->fck); exit_free_ndev: free_d_can_dev(ndev); exit: dev_err(&pdev->dev, "probe failed\n"); return ret; } static int __devexit d_can_plat_remove(struct platform_device *pdev) { struct net_device *ndev = platform_get_drvdata(pdev); struct d_can_priv *priv = netdev_priv(ndev); struct resource *mem; unregister_d_can_dev(ndev); platform_set_drvdata(pdev, NULL); free_d_can_dev(ndev); iounmap(priv->base); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(mem->start, resource_size(mem)); clk_disable(priv->ick); clk_disable(priv->fck); clk_put(priv->ick); clk_put(priv->fck); return 0; } static struct platform_driver d_can_plat_driver = { .driver = { .name = D_CAN_DRV_NAME, .owner = THIS_MODULE, }, .probe = d_can_plat_probe, .remove = __devexit_p(d_can_plat_remove), }; static int __init d_can_plat_init(void) { printk(KERN_INFO D_CAN_DRV_DESC "\n"); return platform_driver_register(&d_can_plat_driver); } module_init(d_can_plat_init); static void __exit d_can_plat_exit(void) { printk(KERN_INFO D_CAN_DRV_DESC " unloaded\n"); platform_driver_unregister(&d_can_plat_driver); } module_exit(d_can_plat_exit); MODULE_AUTHOR("Anil Kumar Ch <anilkumar(a)ti.com>"); MODULE_LICENSE("GPL v2"); MODULE_VERSION(D_CAN_VERSION); MODULE_DESCRIPTION(D_CAN_DRV_DESC);/ l4/pkg/d_can/d_can/Makefile: /PKGDIR ?= .. L4DIR ?= $(PKGDIR)/../.. DDE_SYSTEMS = x86 arm TARGET = d_can SRC_C = d_can.c d_can_platform.c REQUIRES_LIBS = slab ddekit dde-linux26 dde-linux26_net libio l4util l4re_c-util ifeq ($(ARCH), arm) DEFINES += -D__LINUX_ARM_ARCH__=6 ARCH_DIR = arch/arm endif include $(PKGDIR)/../dde/linux26/Makeconf #include $(PKGDIR_OBJ)/Makeconf include $(L4DIR)/mk/prog.mk # # Makefile for the Bosch D_CAN controller drivers. # obj-$(CONFIG_CAN_D_CAN) += d_can.o obj-$(CONFIG_CAN_D_CAN_PLATFORM) += d_can_platform.o ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG / l4/pkg/D-can/d_can/Kconfig: /menuconfig CAN_D_CAN tristate "Bosch D_CAN devices" depends on CAN_DEV && HAS_IOMEM if CAN_D_CAN config CAN_D_CAN_PLATFORM tristate "Generic Platform Bus based D_CAN driver" ---help--- This driver adds support for the D_CAN chips connected to the "platform bus" (Linux abstraction for directly to the processor attached devices) which can be found on am335x and dm814x boards from TI (http://www.ti.com). endif/

2 1

Locks in Base_mappable class
by Yuxin Ren 24 Aug '14

24 Aug '14

Hi All, In the Base_mappable class, in /fiasco/src/kern/mapping_tree.cpp file, what is type of the lock in this class, helping lock, spin lock or others? And usually I find it is hard to identify the type of a lock. Could someone tell me how to figure out the lock's type? Thank you very much. Yuxin

2 2

Re: How can a thread map memory to itself
by Björn Döbel 22 Aug '14

22 Aug '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, let us stay on the list - others might be interested in your problems as well. > Thank you very much, I tried what you said, But met a problem. In > my test case, I have multiple threads within the same task, but > running on different cores, doing capability mapping to itself. > Each thread runs in a tight loop, which are 1,000,000 iterations. How does this look like in code? > The problem is after some while, the program did not make any > progress. And this only happens when I have more than 5 threads. If > I only have 2 or 3 threads, they work well. I have no idea how to > debug this. Could you give me some hints? Fiasco has a kernel debugger which you can enter by pressing <ESC> at runtime. Pressing <h> will give you a list of commands. Some interesting ones: lp -> lists all present threads. It will show you thread IDs, on which CPU they are running, what address space they belong to and which state they are in. t<id> -> gives you information about a specific thread with a given debug ID (the one from the lp list). Here you will see at which user or kernel EIP the thread is right now. This may help you figuring out where in the code your threads get stuck. Q -> gives you a list of all known kernel objects. Use this for instance to find the task your program is running in. dt<id> <addr> -> dump the address space of a given task starting at address <addr> Good luck! Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Icedove - http://www.enigmail.net/ iEYEARECAAYFAlP1AeYACgkQP5ijxgQLUNkq7QCeJ5HtstwWw3PAIQTrsXpBh9xT 5m0An04wkCPcYU2d5W6rPzBwCvMBD/1S =0wdI -----END PGP SIGNATURE-----

4 5

Doubt about fiasco-l4re on FastModels
by Maria Soler 21 Aug '14

21 Aug '14

Hello, I want to have a scenario where fiasco-l4re runs in the secure world and Linux runs in the non-secure world. For this I am using the CortexA15x1 model in FastModels. I am using the snapshot 2014053111 for fiasco-l4re. I have already compiled and am able to run fiasco-l4re in the secure side. At the moment I am trying to make the example pkg/examples/sys/vm-tz work (included in the L4 version available at http://svn.tudos.org/repos/oc/tudos/trunk/), but I have been unsuccessful so far. I have added the header files that were missing and have been able to compile the example but it fails when I execute it. Has any of you tried to run this example on FastModels? Do you have any ideas why it may fail? It fails both when running the version of fiasco-l4re where it originally appears (with "terminate called after throwing an instance of 'N2L413Runtime_errorE'") and also in the latest version (with "L4Re[rm]: unhandled write page fault @0 pc=100b868"). Also I would like to know why this example is not included in more recent versions of fiasco-l4re. I am particularly interested in fiasco-l4re running on TrustZone in secure mode and something else running in the non secure mode. I would like to know if there is any other example that does something similar and is more recent (and works on FastModels, ideally) or if there is a better way to do this. Thank you very much for your help, María.

2 1

How can a thread map memory to itself
by Yuxin Ren 19 Aug '14

19 Aug '14

Hi All, I want to do cap/mem mapping without IPC to another thread. In particular, I want a thread to map its own memory or capability to itself. How can I achieve this? Thank you. Yuxin

2 1

Re: Mapping memory into process address space
by Björn Döbel 19 Aug '14

19 Aug '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 >> Also, do not call the allocator twice within the function call, >> because then you would obtain two different dataspaces and this >> is not what you want here. Better do >> >> L4:Cap<Dataspace> x = >> L4Re::Util::cap_alloc.alloc<L4::Dataspace>(); long alloc = >> L4Re::Env::env()->mem_alloc.alloc(size, x); if (!x.is_valid()) { >> // handle error } > > Okay, I've gotten the allocation of the dataspace to work correctly > (at least as far as I can tell), but I'm still not sure how to map > the resulting dataspace into the newly created process. I'm trying > something like this: > > L4::Cap<Dataspace> stack = > L4Re::Util::cap_alloc.alloc<L4::Dataspace>(); < allocate memory > > task->map(L4Re::This_task, stack.fpage(), 0); > > but it still freezes. Is the fpage() call still waiting on IPC, or > should I be using a different value for snd_base? The snd_base parameter to the map() call is the address in the target address space. Nevertheless, I'm wondering while this would hang. Are you sure this happens in the map() operation? Bjoern -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Icedove - http://www.enigmail.net/ iEYEARECAAYFAlPzSo4ACgkQP5ijxgQLUNmVHACfYrqIXq5opXk2e2nzac6fe3AB a10AnitnVNIpOIBPQOhqV1RGMD7j5Z5K =xWcr -----END PGP SIGNATURE-----

1 0

Adding a new scheduling algorithm to Fiasco.OC
by Valentin Hauner 19 Aug '14

19 Aug '14

Hi, I'm planning to add a new scheduling algorithm to Fiasco.OC. I will implement EDF. First of all, is there some handout written by you main developers that copes with the issues of implementing EDF in Fiasco.OC? What I've achieved so far: I've created the files sched_context-edf.cpp and ready_queue_edf.cpp in ./kernel/fiasco/src/kern, using the corresponding source files for your fixed-priority scheduler as templates. I've named the config directive used in ./kernel/fiasco/src/Modules.* files analogous to yours, that is 'sched_edf' in my case. Now, I'm beginning to modify sched_context-edf.cpp and ready_queue_edf.cpp to fit the requirements of EDF, especially the en- and dequeuing as well as the 'dominates' method. Are there any other major source files that I do have to alter? Thanks in advance! Best regards, Valentin

2 17

I share a document to access HW on L4 Linux.
by Taeung 18 Aug '14

18 Aug '14

Thank you L4 Hackers. You have help me in securing Ethernet on L4 Linux. So, I succeeded it. I’m particularly grateful to Martin Schröder, Wei jin, Adam Lackorzynski, Matthias Lange. Although there is already a document 'L4 Runtime Environments : Io, the Io server' a link of which is http://os.inf.tu-dresden.de/L4Re/doc/io.html, I made a guide document for accessing HW on L4 Linux because of ethernet example. (I've used ARM platform Freescale i.MX6 Quad SABRESD ) This document is https://www.dropbox.com/s/abj9ao5uk9r3w72/The_Guide_to_access_HW_on_L4Linux… I don’t know whether this document can help someone in accessing HW on L4Linux. But I want to share this document in order to repay for l4hackers's kindness. - Taeung -

3 5

compiling and running l4android-arm in qemu
by cem akpolat 18 Aug '14

18 Aug '14

Dear all, I have compiled l4android, l4 and fiasco for arm architecture and now I am attempting to run elf image in qemu.However, I see only a black screen in qemu. There is any io messages. What could be the reason? My qemu version is 1.7.1. The images that I have after making elfimages are: bootstrap.elf bootstap_L4LinuxARM bootstap_L4LinuxARM.elf The used command for running image: $qemu-system-arm -M realview-pbx-a9 -m 2048 -kernel bootstrap_L4LinuxARM.elf -serial stdio Thanks in advance, Sincerely, Cem Akpolat

2 1

Mapping memory into process address space
by Noah Zentzis 15 Aug '14

15 Aug '14

------------------------------------------------------------------------ I don't want to use libloader because I'm trying to create a new process with dynamically-generated assembly (and alter it while the process is running), so I can't really output an ELF binary. On 08/18/2014 08:50, Björn Döbel wrote: > The dataspace that prog_attach_ds() is called with is allocated by the > ELF loader in libloader/include/elf. > > reserve_utcb_area() is supposed to not attach a real dataspace but > reserve a virtual memory area that will not be used by the new > application's RM to attach any other memory, because this is where the > UTCBs will later be mapped to by the kernel iirc. I'm pretty sure I need to do this myself, since any calls to map() are causing the program to freeze (could this be because the task doesn't have its UTCB allocated yet?). I'm also not sure what to use for the destination offset of the L4::Task::map() call, so that might be the issue. > At this point your best way to do so is > to use the L4::Task::map() operation on the capability of your newly > created task. How do I specify what point in the target the memory maps to? It looks like the L4::Dataspace::map() would work, but without being able to map the capability, I can't really check. Thanks! - Noah Zentzis

3 3

Build system
by teclis High Elf 14 Aug '14

14 Aug '14

If I execute this command from the l4 build directory: make E=hello S=bootstrap In which Makefile or script is the S= processed (its a bit of a difficult thing to grep for :) thanks

2 3

Accessing dbg_info()->dbg_id() for threads in ready queue class
by Valentin Hauner 13 Aug '14

13 Aug '14

Hi, how can I access the identificator used in JDB's thread list in the enqueue method of my ready queue class? Following code snippet does not work: > include "thread.h" > [...] > Ready_queue_edf<E>::enqueue(E *i, bool) { > printf("%d", static_cast<Thread*>(i->context())->dbg_info()->dbg_id()); } It results in various compiler errors: > [...] > ./kernel/fiasco/src/kern/irq.cpp:504:11: error: ‘class Thread’ has no member named ‘home_cpu’ > ./kernel/fiasco/src/kern/irq.cpp:505:15: error: ‘class Thread’ has no member named ‘drq’ > [...] > ./kernel/fiasco/src/kern/tcboffset_in.h:11:3: error: ‘class Thread’ has no member named ‘_caller’ > ./kernel/fiasco/src/kern/tcboffset_in.h:14:3: error: ‘class Thread’ has no member named ‘_timeout’ What else do I have to include that it works? Best regards, Valentin

2 1

Mapping memory into process address space
by Noah Zentzis 13 Aug '14

13 Aug '14

I'm trying to launch a new process (without libloader) and I'm having trouble mapping memory to it. I've found the prog_attach_ds and prog_reserve_utcb_area methods in libloader and ned, but I'm not sure where they're getting the memory to assign or the region map for the task. Can I just do something like: L4Re::Util::Cap<L4Re::Dataspace> stack; L4Re::Env::mem_alloc()->alloc(0x10000, stack); or are there special steps I need to take when I want to give another process access to the same memory? Thanks! - Noah Zentzis

2 1

Question about IPI interrupt handler
by Yuxin Ren 11 Aug '14

11 Aug '14

Hi All, I cannot understand the logic of the IPI interrupt handler very well. I hope someone can help me. Thanks a lot. I am using intel IA32 multi core cpu. My scenario is one client and one server thread on different core. Client sends simple data-only IPC to the server. 1. The function Thread::handle_remote_requests_irq is the IPI interrupt handler, right? So it is running within the interrupt context? If so, 2. In this function, the variable "c" is set to the current Context. On the server core, when the server is blocked(waiting for IPC), what is current Context? The server thread or the idle thread? I have no other threads in the user level, and I assume there are no background threads in the kernel or L4Re. In addition, I guess each thread associates with a Context. If my assumptions are right and that current Context is idle thread, 3. At the last of this function, it calls c->handle_drq(). But when does the server thread's handle_drq() is called? 4. In what situation, the variable "resched" will be set to true? When it is true, 5. c->schedule() will be called, does it mean that we can switch to another thread in the interrupt context? It cannot make sense to me. Thanks again. Best, Yuxin

2 1

how to get or initialize clock in L4Linux
by Yunchuan Geng 08 Aug '14

08 Aug '14

Hi, L4hackers, I am implementing I2C drivers from native linux to L4Linux. I am using Freescale iMX6Q SD board. Kernel version 3.14 in ./drivers/i2c/busses/i2c-imx.c, function i2c_imx_probe(), devm_clk_get() is called. And fails at here. I understand that clock are initialized from function "__init imx6q_clocks_init()". I managed to compile and call the imx6q_clocks_init() function from L4Linux, but encountered many problem. The question is, Is it necessary to initialize clocks in L4Linux and how? Thanks in advance? -Yunchuan

2 3

strange response time question
by Yuxin Ren 06 Aug '14

06 Aug '14

Hi All, Now I am testing the response time in Fiasco, especially for the worse case. The results are strange. The worse case result are always around 2us. I have filtered out the timer interrupt, so I cannot understand what happened. I am using intel IA32 multi core cpu. Do you have any idea about what can cause the 2us delay? Thank you so much. Yuxin

5 8

response time in Fiasco
by Yuxin Ren 06 Aug '14

06 Aug '14

Hi All, Are there any papers or documentation talking about response time in Fiasco? I think this is an important aspect in Fiasco as it is designed for real time. Thank you. Yuxin

3 2

DDE-Kit
by Korbinian Ederer 05 Aug '14

05 Aug '14

Hello, I'm searching for some Informations about using the dde-kit. My goal is to use the SocketCan driver from Linux eith the l4re on an ARM BeagleBone Black (Omap3x). The Manual at http://os.inf.tu-dresden.de/ddekit/ did not work because of missing l4/sys/cache.h After some searching I discovered a copy of dde also in the fiasco snapshot in l4/pkg/dde/ but have no idea of how to use it. I would be very helpfull to get some advice about usefull documentation or some hints about the usage of dde Thanks a lot Korbinian Ederer

2 1

Do L4 Linux lack source code about Freescale i.MX6 Quad ?
by Taeung 04 Aug '14

04 Aug '14

Hello , L4 hackers I always appreciate L4 hackers. I've succeed boot "helloworld + L4/Fiasco" on Freescale i.MX6q_sabre_sd. So, I've try to build L4 linux (|Repository : svn co http://svn.tudos.org/repos/oc/l4linux/trunk l4linux|). I've configured for build L4 Linux such as.. ====================================================== System type ---> ARM system type (Allow multiple platforms to be selected) Multiple platform selection ---> ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait) Build type Freescale i.MX family Freescale i.MX support ---> i.MX6 Quad/DualLite support ====================================================== But I've meet errors even so often. such as .. 1. ERROR: CONFIG_ARM_PATCH_PHYS_VIRT must not be enabled. => So, I've force to change CONFIG_ARM_PATCH_PHYS_VIRT=y to =n . 2. irq.c:16:26: error: 'L4X_NR_IRQS_V_DYN' undeclared here irq.c:46:14: error: 'L4X_IRQS_V_DYN_BASE' undeclared and irq.c:48:14: error: 'NR_IRQS_HW' undeclared => So, I've included "#include <asm/generic/irq-vectors.h>" and "#include <asm/mach-arm/generic/mach/irqs.h>". 3. l4.c:57:13: error: 'L4X_IRQS_V_STATIC_BASE' undeclared ...etc. => So, I've included "#include <asm/generic/irq-vectors.h>" and "#include <asm/mach-arm/generic/mach/irqs.h>". 4. drivers/built-in.o: In function `clk_disable': clk.c:867: multiple definition of `clk_disable' arch/l4/built-in.o:/home/taeung/workspace/l4linux/arch/l4/kernel/arch-arm/l4.c:73: first defined here drivers/built-in.o: In function `clk_enable': clk.c:919: multiple definition of `clk_enable' arch/l4/built-in.o:/home/taeung/workspace/l4linux/arch/l4/kernel/arch-arm/l4.c:65: first defined here make[1]: *** [vmlinux] Error 1 make: *** [sub-make] Error 2 => So, I delete this lines in l4linux/drivers/clk/clk.c. 7. undefined reference to `__pv_phys_offset' from signal.c , init.c, mm.h ....etc. My question is.... Is it's problem that my config is wrong or l4 linux lack source code about Freescale i.MX6 Quad ? * Refer to > /home/taeung/workspace/l4linux/arch/l4/kernel/*irq.c* /home/taeung/workspace/l4linux/arch/l4/include/asm/generic/*irq-vectors.h* /home/taeung/workspace/l4linux/arch/l4/kernel/*pm.c */home/taeung/workspace/l4linux/arch/l4/kernel/arch-arm/*l4.c** */home/taeung/workspace/l4linux/arch/l4/l4lxlib/generic/*irq_gen.c* /home/taeung/workspace/l4linux/drivers/clk/*clk.c */home/taeung/workspace/l4linux/arch/l4/kernel/arch-arm/*signal.c */home/taeung/workspace/l4linux/arch/l4/mm/arch-arm/*init.c */home/taeung/workspace/l4linux/include/linux/*mm.h *

3 2

seL4 boot issue
by Jorge Ventura 04 Aug '14

04 Aug '14

I am trying to boot seL4 on beaglebone white. I have an initial code just to configure the DDR2 memory at range 0x80000000-0xbfffffff. As we can see below, the start address is the virtual address 0xf0000000 but at this point I have no MMU configured. I was thinking that the segment .boot should be the code to prepare all details about MMU/D-CACHE/I-CACHE but it's not what gdb is understanding based in the elf header. Someone could explain to me how to boot this kernel; what do I have to consider. I guess that beaglebone is not supported but this is exactly my goal, to make seL4 boot on beaglebone. Any help or suggestion is very welcome. Sincerely, Jorge Ventura (gdb) load kernel.elf > Loading section .boot, size 0x10000 lma 0x80000000 > Loading section .text, size 0xf1ec lma 0x80010000 > Loading section .text.unlikely, size 0xd98 lma 0x8001f1ec > Loading section .rodata, size 0x4170 lma 0x8001ff84 > Loading section .data, size 0x8 lma 0x800240f4 > Start address 0xf0000000, load size 147708 > Transfer rate: 319 KB/sec, 3787 bytes/write. > (gdb) monitor poll > background polling: on > TAP: am335x.dap (enabled) > target state: halted > target halted in ARM state due to debug-request, current mode: System > cpsr: 0x6000019f pc: 0xf0000000 > MMU: disabled, D-Cache: disabled, I-Cache: disabled >

1 0

Task creation in ned or moe
by Stark, Josef 31 Jul '14

31 Jul '14

Hello, could maybe someone kindly explain to me (roughly), how task creation/startup is done in ned or moe? I assumed that the Factory methods create_task() and create_thread() would be used, but instead it seems that Elf_Loader is used for this. I skimmed through this class but I don't fully understand it. Basically, it seems that moe's call "elf_loader.start(_init_prog, cxx::String(""));" (in file main.cc) leads in the end to this call: "Ldr::Elf_loader<Moe_x_app_model, Dbg>::launch(&am, "rom/l4re", ldr);" (loader_elf.cc). So, to me it seems that just l4re gets started, not the desired binary (ned), but clearly I am missing something (a lot) here (because it actually works the way it should). Could someone enlighten me here? And why aren't create_task() and create_thread() used here? (In this text I am referring to moe, but in ned I couldn't find these two methods either.) Thanks in advance! Josef

2 1

LUA bindings / kill task
by Stark, Josef 31 Jul '14

31 Jul '14

Dear all, is there maybe a list somewhere containing all the LUA bindings that are exported by L4(Re)? I found a few functions in the file src/l4/pkg/lua/lib/l4/ll4lib.c ("ipc_call", "ipc_reply_and_wait" etc.) and also in src/l4/pkg/ned/server/src/ned.lua (mainly "start" and "startv") but specifically I am looking for a command to kill a task. It seems that the file src/l4/pkg/ned/server/src/ned.lua prepares to offer such a function (in the array "_task_ops[]" the function "__task_kill" corresponds to the name "kill"), however I didn't succeed in calling this kill function. What could I be doing wrong? If it is not yet implemented, what needs to be changed? I tried it in interactive ned mode as well as in the mode which interprets a config file (using the latest snapshot). Thanks in advance! Cheers, Josef Stark

2 2

Problems with python to compile seL4
by Jorge Ventura 29 Jul '14

29 Jul '14

I am still using Debian 6. I installed python 2.7.8 but I am having problems to compile the seL4. arduino@squeeze64:~/ARM/src/seL4$ TOOLPREFIX=arm-none-eabi- ARCH=arm PLAT=am335x ARMV=armv7-a CPU=cortex-a8 make Traceback (most recent call last): File "./tools/invocation_header_gen.py", line 18, in <module> import tempita ImportError: No module named tempita make: *** [arch/api/invocation.h] Error 1 What is this module "tempita"? What package is that?

3 3

seL4 is free!
by Gernot Heiser 29 Jul '14

29 Jul '14

A few hours ago we open-sourced seL4. The release covers the kernel source and proofs (under GPL v2) as well as tools and libraries (mostly BSD). http://sel4.systems contains details, including download and mailing list links. Enjoy, Gernot

1 0

Question about IPI
by Yuxin Ren 28 Jul '14

28 Jul '14

Hi All, Now I want to how many IPIs are sent during an IPC. So I add a counter for IPI in the kernel, and in the user level, there is a client sending IPC to a server on another core. But I found some behavior are very strange. 1. The total number of IPI are not multiple times of the number of IPC. It seems that there are some "extra IPIs", and with the number of IPC increases, the number of "extra IPIs" are also increasing. So my question is if there are some background program in the kernel or L4Re to send IPIs? 2. If I add printf statement in the kernel, the number of IPIs are also increasing. Does printf in the kernel cause sending IPI? If it does, is there any methods to avoid this. Like in Linux, it has printk function in the kernel. Thanks a lot!! Yuxin

2 5

Start a process with a specified pager
by Noah Zentzis 24 Jul '14

24 Jul '14

Hi, I'm trying to launch a new task and run it under a custom pager, but I can't seem to figure out how to go about it. I've looked through the Moe and libloader source code, but I'm not sure how the task actually ends up getting created, only where the ELF image is loaded into memory. Can anyone point me towards the documentation for task creation or explain how Moe actually ends up turning the executable image into a running task? Thanks! - Noah Zentzis

2 1

Question about irq
by Maria Soler 24 Jul '14

24 Jul '14

Hello, I have a question about how the irqs work in L4re. I am running FIASCO.OC + L4re on qemu for arm. I want to be able to raise an interruption from qemu and handle it from my VM. I am basing my work on the example at examples/libs/libirq (I am coding in C, so it is more convenient than other examples in C++). I have a qemu device that has the interrupt number #N in qemu. I rise the interrupt but the l4irq_wait function doesn't return. I have tried both with qemu_irq_pulse(state->irq); and with qemu_set_irq(state->irq, 1), also I have tried attaching the irq and requesting it; but there is no difference. My basic doubts are: - Is the number of the interruption the same within L4re as in qemu? and if not, how can I calculate/check what the number is in L4re? - If the number is OK, what can be the problem I am facing? The mentioned example doesn't work for me either (l4irq_request returns 0 in this case), so I don't know how to solve this exactly. - Is there a better example for this that I can use as a baseline? In case this is relevant, this is part of a more complex project, so I have a .devs file where I have a line like: Io.Res.irq(#N); I am also using this file in the present step to keep things as similar as possible to the real scenario. Thanks! Regards, María.

2 1

Why need a lock in memory/capability map
by Yuxin Ren 24 Jul '14

24 Jul '14

Hi All, I note that when a thread does memory or capability mapping, both over system call and IPC, it needs take a lock, which is the existence_lock of target task. I cannot understand it needs take a per task, as cap/page table are per thread. What data does this lock to protect? Thank you. Yuixn

2 3

Segmentation fault while running arm image on top of qemu
by cem akpolat 24 Jul '14

24 Jul '14

Hi, While running "ARM with Android 2.3.4", the segmentation fault occured. The parameters that I typed on the console as follows: *$qemu-system-arm -M realview-pbx-a9 -m 512 -kernel l4_gingerbread-arm.elf -serial stdio* And the console outputs: L4 Bootstrapper Build: #14 Wed Jul 20 06:44:48 CEST 2011, 4.5.1 Scanning up to 512 MB RAM Memory size is 512MB (70000000 - 90000000) RAM: 0000000070000000 - 000000008fffffff: 524288kB Total RAM: 512MB mod13: 716c9000-73e2f000: system-arm-ginger.img mod12: 715c9000-716c9000: root-arm-ginger.img mod11: 712bf000-715c8448: vmlinuz.android mod10: 712be000-712be10a: arm_android.io mod09: 712bd000-712bd4c1: arm-rv-eb.devs mod08: 712bc000-712bc698: lx_ginger-arm.cfg mod07: 71292000-712bb5e0: fb-drv mod06: 71204000-7129146c: mag mod05: 71129000-71203b58: io mod04: 710d5000-711281b8: ned mod03: 710bb000-710d4510: l4re mod02: 71081000-710ba5f0: moe mod01: 71077000-7108033c: sigma0 mod00: 71015000-7107655c: fiasco Moving 14 modules to 71100000 with offset eb000 moving module 14 { 716c9000-73e2f000 } -> { 717b4000-73f1a000 } moving module 13 { 715c9000-716c9000 } -> { 716b4000-717b4000 } moving module 12 { 712bf000-715c8448 } -> { 713aa000-716b3448 } moving module 11 { 712be000-712be10a } -> { 713a9000-713a910a } moving module 10 { 712bd000-712bd4c1 } -> { 713a8000-713a84c1 } moving module 09 { 712bc000-712bc698 } -> { 713a7000-713a7698 } moving module 08 { 71292000-712bb5e0 } -> { 7137d000-713a65e0 } moving module 07 { 71204000-7129146c } -> { 712ef000-7137c46c } moving module 06 { 71129000-71203b58 } -> { 71214000-712eeb58 } moving module 05 { 710d5000-711281b8 } -> { 711c0000-712131b8 } moving module 04 { 710bb000-710d4510 } -> { 711a6000-711bf510 } moving module 03 { 71081000-710ba5f0 } -> { 7116c000-711a55f0 } moving module 02 { 71077000-7108033c } -> { 71162000-7116b33c } moving module 01 { 71015000-7107655c } -> { 71100000-7116155c } Scanning fiasco -serial_esc Scanning sigma0 Scanning moe rom/lx_ginger-arm.cfg Relocated mbi to [0x7100f000-0x7100f1ed] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x70002000 Regions of list regions [ 70001000, 700019ff] { a00} Kern fiasco [ 70002000, 70070fff] { 6f000} Kern fiasco [ 70090000, 7009e17b] { e17c} Sigma0 sigma0 [ 70140000, 701717f3] { 317f4} Root moe [ 70178000, 7018eec7] { 16ec8} Root moe [ 71000000, 710143eb] { 143ec} Boot bootstrap [ 7100f000, 7100f2ea] { 2eb} Root Multiboot info [ 711a6000, 73f19fff] { 2d74000} Root Modules Memory API Version: (87) experimental Sigma0 config ip:700900e0 sp:71013044 Roottask config ip:70140178 sp:00000000 Starting kernel fiasco at 70001000 Realview System ID: Rev=0 HBI=178 Build=0 Arch=5 FPGA=00 L2: ID=410000c8 Type=1c100100 L2 cache enabled Hello from Startup::stage2 Initialize page table Number of IRQs available at this GIC: 96 Vmem_alloc::init() Cache config: ON ID_PFR0: 00001031 ID_PFR1: 00000011 ID_DFR0: 00000000 ID_AFR0: 00000000 ID_MMFR0: 00100103 ID_MMFR1: 20000000 ID_MMFR2: 01230000 ID_MMFR3: 00002111 FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 0, v: 9, i: 41, t: hard, p: dbl/sngl SERIAL ESC: allocated IRQ 44 for serial uart Not using serial hack in slow timer handler. [1;32mWelcome to Fiasco.OC (arm)! [0;32mL4/Fiasco.OC arm microkernel (C) 1998-2011 TU Dresden Rev: r36 compiled with gcc 4.5.1 for Realview [] Build: #5 Tue Jul 19 19:26:41 CEST 2011 [0m Calibrating timer loop... done. SIGMA0: Hello! KIP @ 70002000 allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:70000000;70000fff] [0:70071000;7008ffff] [0:7009f000;7013ffff] [4:70140000;70171fff] [0:70172000;70177fff] [4:70178000;7018efff] [0:7018f000;7100efff] [4:7100f000;7100ffff] [0:71010000;711a5fff] [4:711a6000;73f19fff] [0:73f1a000;8effffff] IOMEM:---------------------- [0:0;6fffffff] [0:90000000;ffffffff] MOE: Hello world MOE: found 460556 KByte free memory MOE: found RAM from 70000000 to 8f000000 MOE: allocated 496 KByte for the page array @0x7009f000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [711a6000-711bf510] [C:503000] l4re BOOTFS: [711c0000-712131b8] [C:504000] ned BOOTFS: [71214000-712eeb58] [C:505000] io BOOTFS: [712ef000-7137c46c] [C:506000] mag BOOTFS: [7137d000-713a65e0] [C:507000] fb-drv BOOTFS: [713a7000-713a7698] [C:508000] lx_ginger-arm.cfg BOOTFS: [713a8000-713a84c1] [C:509000] arm-rv-eb.devs BOOTFS: [713a9000-713a910a] [C:50a000] arm_android.io BOOTFS: [713aa000-716b3448] [C:50b000] vmlinuz.android BOOTFS: [716b4000-717b4000] [C:50c000] root-arm-ginger.img BOOTFS: [717b4000-73f1a000] [C:50d000] system-arm-ginger.img MOE: cmdline: moe rom/lx_ginger-arm.cfg MOE: Starting: rom/ned rom/lx_ginger-arm.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/lx_ginger-arm.cfg' [31mio | Io service[0m [31mio | Ready. Waiting for request.[0m [36mfb | libio: Warning: Finding 'icu' in system bus failed with 'No such object found'[0m [36mfb | Using LCD driver: ARM AMBA PrimeCell 11x[0m [32mmag | Hello from MAG[0m [36mfb | Video memory is at virtual 0x4000 (size: 0x96000 Bytes)[0m [36mfb | Physical video memory is at 0x704df000[0m [36mfb | Color mode: 10:5:0 5:5:5[0m [36mfb | Detected a 'Unknown' device.[0m [36mfb | Configure 8.4 CLCD[0m [36mfb | Starting server loop[0m [32mmag | mapped frame buffer at 0x200000[0m [32mmag | View::Info:[0m [32mmag | flags: 0[0m [32mmag | size: 640x480 pos: 0, 0[0m [32mmag | bytes_per_line: 1280[0m [32mmag | buffer_offset: 0[0m [32mmag | RGBA(2): 5(10):5(5):5(0):0(0)[0m [32mmag | memory 200000-296000[0m [32mmag | Plugin: Mag_client service started[0m [32mmag | Plugin: Frame-buffer service started[0m [32mmag | L4INPUT native mode activated[0m [32mmag | L4INPUT: !!! W A R N I N G !!![0m [32mmag | L4INPUT: Please, do not use Fiasco's "-esc" with L4INPUT.[0m [32mmag | L4INPUT: !!! W A R N I N G !!![0m[32m[0m [32mmag | pl050: got memory 10006000, virtual base at 0x102000, IRQ 52[0m [32mmag | input: AT Raw Set 2 keyboard on AMBA KMI Kbd[0m [32mmag | pl050: got memory 10007000, virtual base at 0x103000, IRQ 53[0m [32mmag | input: ImExPS/2 Generic Explorer Mouse on AMBA KMI mou[0m [32mmag | l4drv: Could not find driver for OMAP_TSC.[0m [32mmag | l4drv: Could not find driver for OMAP_KP.[0m [32mmag | connect "AT Raw Set 2 keyboard", AMBA KMI Kbd/input0[0m [32mmag | connect "ImExPS/2 Generic Explorer Mouse", AMBA KMI mou/input0[0m [33mandroid | libio: Warning: Finding 'icu' in system bus failed with 'No such device'[0m [33mandroid | PH 0 (t: 1) offs=00008000 vaddr=00100000 vend=004dc140[0m [33mandroid | f_sz=[0m[33m002eb484 memsz=003dc140 flgs=rwx[0m [33mandroid | PH 1 (t: 4) offs=002f3460 vaddr=003eb460 vend=003eb484[0m [33mandroid | f_sz=[0m[33m00000024 memsz=00000024 flgs=r-x[0m [33mandroid | PH 2 (t: 1685382481) offs=00000000 vaddr=00000000 vend=00000000[0m [33mandroid | f_sz=[0m[33m00000000 memsz=00000000 flgs=rwx[0m [33mandroid | Starting binary at 0x11f330, argc=15 argv=0x80007f6c *argv=0xb1007fec argv0=rom/vmlinuz.android[0m [33mandroid | External resolver is at 0xa8000670[0m [33mandroid | [34;1m======> L4Linux 2.6 starting... <========[0m[0m [33mandroid | Linux version 2.6.39-l4-g8b7f1ac-dirty (mlange@rhea) (gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) ) #20 Tue Jul 19 20:21:49 CEST 2011[0m [33mandroid | Binary name: rom/vmlinuz.android[0m [33mandroid | This is an AEABI build.[0m [33mandroid | Linux kernel command line (14 args): [0m[33mconsole=ttyLv0 androidboot.console=ttyLv0 mem=256M l4bdds.add=rom/system-arm-ginger.img,rw boot=local android.ril=ttyLv1 ip=dhcp l4x_rd=rom/root-arm-ginger.img rw root=1:0 ramdisk_size=1500 init=/init --debug l4fb.touchscreen=1[0m[33m[0m [33mandroid | CPU mapping (l:p)[1]: 0:0[0m [33mandroid | Image: 00100000 - 00500000 [4096 KiB].[0m [33mandroid | Areas: Text: 00100000 - 003cc000 [2864kB] (a bit longer)[0m [33mandroid | Data: 003cc000 - 003e67c0 [105kB][0m [33mandroid | Initdata: 00100000 - 0011e000 [120kB][0m [33mandroid | BSS: 003eb484 - 004dc140 [963kB][0m [33mandroid | Device scan:[0m [33mandroid | l4lx_thread_create: Created thread 415 (cpu0) (u:b3000400, v:b3000600, sp:003cdff0)[0m [33mandroid | main thread will be 415[0m [33mandroid | l4x_register_pointer_section: addr = 00100000 size = 4050944[0m [33mandroid | section-with-init: virt: 0x100000 to 0x4dc13f [3952 KiB][0m [33mandroid | section-with-init: Phys: 0x7070d000 to 0x70ae9140, Size: 4047168[0m [33mandroid | l4x_linux_startup: thread 415.[0m [33mandroid | Main thread running, waiting...[0m [33mandroid | main thread: received startup message.[0m [33mandroid | utcb 0xb3000400[0m [33mandroid | l4x_setup_memory: Forcing superpages for main memory[0m [33mandroid | l4re_global_env: 0xb1007e54[0m [33mandroid | Main memory size: 256MB[0m [33mandroid | Main memory: virt: 0x500000 to 0x104fffff [262144 KiB][0m [33mandroid | Main memory: Phys: 0x74000000 to 0x84000000, Size: 268435456[0m [33mandroid | Filling lower ptabs...[0m [33mandroid | Done (289 entries).[0m [33mandroid | l4x_register_pointer_section: addr = 004ff000 size = 4096[0m [33mandroid | end: virt: 0x4ff000 to 0x4fffff [4 KiB][0m [33mandroid | end: Phys: 0x70aeb000 to 0x70aec000, Size: 4096[0m [33mandroid | l4x_rd_path: rom/root-arm-ginger.img[0m [33mandroid | Loading: rom/root-arm-ginger.img[0m [33mandroid | INITRD: Size of RAMdisk is 1024KiB[0m [33mandroid | RAMdisk from 10500000 to 10600000 [1024KiB][0m [33mandroid | l4lx_thread_create: Created thread 41b (timer.i0) (u:b3000800, v:00000000, sp:00405ff4)[0m [33mandroid | timer_irq_thread: Starting timer IRQ thread.[0m Linux version 2.6.39-l4-g8b7f1ac-dirty (mlange@rhea) (gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) ) #20 Tue Jul 19 20:21:49 CEST 2011 CPU: Fiasco [860f0001] revision 1 (ARMvundefined/unknown), cr=00000000 CPU: unknown data cache, unknown instruction cache cpu_v7_proc_init Machine: L4 Memory policy: ECC disabled, Data cache writeback arm926_flush_kern_cache_all() INITRD: 10500000 - 10600000 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 66039 Kernel command line: console=ttyLv0 androidboot.console=ttyLv0 mem=256M l4bdds.add=rom/system-arm-ginger.img,rw boot=local android.ril=ttyLv1 ip=dhcp l4x_rd=rom/root-arm-ginger.img rw root=1:0 ramdisk_size=1500 init=/init --debug l4fb.touchscreKernePID hash table entries: 2048 (order: 1, 8192 bytes) Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) Memory: 0MB 260MB = 260MB total Memory: 259580k/259580k available, 6664k reserved, 0K highmem Virtual kernel memory layout: vector : 0xbffff000 - 0xc0000000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) DMA : 0xffc00000 - 0xffe00000 ( 2 MB) vmalloc : 0x10600000 - 0x18600000 ( 128 MB) lowmem : 0x00000000 - 0x10500000 ( 261 MB) modules : 0xff100000 - 0x00100000 ( 16 MB) .init : 0x00100000 - 0x0011e000 ( 120 kB) .text : 0x0011f000 - 0x003ca298 (2733 kB) .data : 0x003cc000 - 0x003e67c0 ( 106 kB) NR_IRQS:220 l4lx_irq_init: l4lx_irq_max = 220 l4lx_irq_dev_startup_timer(0) Console: colour dummy device 80x30 console [ttyLv0] enabled Calibrating delay loop... 53.04 BogoMIPS (lpj=265216) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok NET: Registered protocol family 16 bio: create slab <bio-0> at 0 Advanced Linux Sound Architecture Driver Version 1.0.24. Switching to clocksource kip NET: Registered protocol family 2 IP route cache hash table entries: 4096 (order: 2, 16384 bytes) TCP established hash table entries: 16384 (order: 5, 131072 bytes) TCP bind hash table entries: 16384 (order: 4, 65536 bytes) TCP: Hash tables configured (established 16384 bind 16384) TCP reno registered UDP hash table entries: 256 (order: 0, 4096 bytes) UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) NET: Registered protocol family 1 Trying to unpack rootfs image as initramfs... rootfs image is not initramfs (junk in compressed archive); looks like an initrd INITRD: Freeing memory. ashmem: initialized msgmni has been set to 506 io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) l4fb l4fb.0: look for capability 'fb' as goos session l4fb l4fb.0: 640x480@16 2bypp, size: 614400 @ 10500000 l4fb l4fb.0: 5:5:5 10:5:0 linelen=1280 visual=2 Console: switching to colour frame buffer device 80x30 l4fb l4fb.0: l4fb L4 frame buffer device (refresh: 10jiffies) input: L4keyb '0' as /devices/virtual/input/input0 input: L4mouse '0' as /devices/virtual/input/input1 L4 serial driver ttyLv0 at MMIO 0x1 (irq = 210) is a L4 brd: module loaded l4bdds: Disk 'rom/system-arm-ginger.img' size = 40344 KB (39 MB) flags=101 addr=18600000 ------------[ cut here ]------------ WARNING: at /home/mlange/projects/l4android/kernel/kernel/softirq.c:159 local_bh_enable+0x9c/0xa8() Modules linked in: [<0012bc80>] (unwind_backtrace+0x0/0xf8) from [<0013c638>] (warn_slowpath_common+0x54/0x64) [<0013c638>] (warn_slowpath_common+0x54/0x64) from [<0013c664>] (warn_slowpath_null+0x1c/0x24) [<0013c664>] (warn_slowpath_null+0x1c/0x24) from [<001420a0>] (local_bh_enable+0x9c/0xa8) [<001420a0>] (local_bh_enable+0x9c/0xa8) from [<0018f408>] (bdi_register+0x100/0x164) [<0018f408>] (bdi_register+0x100/0x164) from [<0018f498>] (bdi_register_dev+0x2c/0x34) [<0018f498>] (bdi_register_dev+0x2c/0x34) from [<00214ce8>] (add_disk+0x74/0x250) [<00214ce8>] (add_disk+0x74/0x250) from [<0011088c>] (l4bdds_init+0x238/0x294) [<0011088c>] (l4bdds_init+0x238/0x294) from [<0011f488>] (do_one_initcall+0x34/0x17c) [<0011f488>] (do_one_initcall+0x34/0x17c) from [<00100774>] (kernel_init+0xb4/0x144) [<00100774>] (kernel_init+0xb4/0x144) from [<00123770>] (kernel_thread_exit+0x0/0x8) ---[ end trace ff4e3c975709dc7d ]--- l4bdds0: detected capacity change from 0 to 41312256 l4bdds0: unknown partition table mousedev: PS/2 mouse device common for all mice logger: created 64K log 'log_main' logger: created 256K log 'log_events' logger: created 64K log 'log_radio' logger: created 64K log 'log_system' ALSA device list: #0: Dummy 1 TCP cubic registered NET: Registered protocol family 17 VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 0 /home/mlange/projects/l4android/kernel/drivers/rtc/hctosys.c: unable to open rtc device (rtc0) [32mmag | Input: new pointer device (src='userdata: 0x1e510' stream='userdata: 0x1dd0c')[0m [32mmag | bus='i8042' vendor=0x2 product=0x6 version=0[0m[32m[0m RAMDISK: ext2 filesystem found at block 0 RAMDISK: Loading 1024KiB [1 disk] into ram disk... |/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\done. VFS: Mounted root (ext2 filesystem) on device 1:0. Freeing init memory: 120K init: Timed out waiting for /dev/.coldboot_done init: cannot open '/initlogo.rle' init (1): /proc/1/oom_adj is deprecated, please use /proc/1/oom_score_adj instead. init: cannot find '/system/etc/install-recovery.sh', disabling 'flash_recovery' init: service 'console' requires console [32mmag | Input: new keyboard device (src='userdata: 0x1e510' stream='userdata: 0x13788')[0m [32mmag | bus='i8042' vendor=0x1 product=0x2 version=43907[0m[32m[0m [33mandroid | cpu0: segfault for servicemanager(22) [T:9d] at 00000000, ip=00008cfa, pferror = 4[0m [33mandroid | 00008000 - 0000a000 r-xp 00000 /system/bin/servicemanager <====[0m [33mandroid | 0000a000 - 0000b000 rwxp 00002 /system/bin/servicemanager[0m [33mandroid | 0000b000 - 0000c000 rwxp[0m [33mandroid | 40037000 - 4003f000 r-xs 00000 /dev/__properties__ (deleted)[0m [33mandroid | 40051000 - 40052000 r-xp[0m [33mandroid | afa00000 - afa03000 r-xp 00000 /system/lib/liblog.so[0m [33mandroid | afa03000 - afa04000 rwxp 00003 /system/lib/liblog.so[0m [33mandroid | afb00000 - afb16000 r-xp 00000 /system/lib/libm.so[0m [33mandroid | afb16000 - afb17000 rwxp 00016 /system/lib/libm.so[0m [33mandroid | afc00000 - afc01000 r-xp 00000 /system/lib/libstdc++.so[0m [33mandroid | afc01000 - afc02000 rwxp 00001 /system/lib/libstdc++.so[0m [33mandroid | afd00000 - afd40000 r-xp 00000 /system/lib/libc.so[0m [33mandroid | afd40000 - afd43000 rwxp 00040 /system/lib/libc.so[0m [33mandroid | afd43000 - afd4e000 rwxp[0m [33mandroid | b0001000 - b0009000 r-xp 00001 /system/bin/linker[0m [33mandroid | b0009000 - b000a000 rwxp 00009 /system/bin/linker[0m [33mandroid | b000a000 - b0013000 rwxp[0m [33mandroid | bf445000 - bf467000 rw-p[0m [33mandroid | ffff0000 - ffff1000 r-xp[0m [33mandroid | 0: 00000000 40046207 00000000 bf466ccc 4: 000086e4 0000a170 00000000 bf466ccc[0m [33mandroid | 8: 00000000 00000000 00000000 00000000 12: 00000000 [01;34mbf466c90[0m 000087d1 [01;34m00008cfa[0m[0m [33mandroid | CPSR: 60000030 Err: 00000004[0m [1;25r[25;1H [32m ---------------------------------------------------------------------[m CPU 0 [f001337c]: segfault [25;1H[32m[ l4lx.cpu0] jdb: [m[K =============== Cheers, Cem Cem Akpolat

1 1

l4android compilation issue
by cem akpolat 24 Jul '14

24 Jul '14

Dear all, I compiled l4android in the light of the explanation under l4android.org, however, I encountered the failure or another state that I don't know what it exactly means. It doesn't seem as an error, however, it stays here. By the way, the build.pl file provided in l4android.org doesn't work, therefore I have compiled everything manually. n/x86_586/l4f/system-x86-ginger.img " -serial stdio -m 3000 L4 Bootstrapper Build: #1 Mo 21. Jul 16:33:27 CEST 2014, x86-32, 4.8.2 RAM: 0000000000000000 - 000000000009fbff: 639kB RAM: 0000000000100000 - 00000000bb7fdfff: 3070968kB Total RAM: 2999MB Moving up to 15 modules behind 1100000 moving module 00 { 2e5000-350c3f } -> { 845a000-84c5c3f } [441408] moving module 01 { 351000-3a4c48 } -> { 84c6000-8519c48 } [343113] moving module 02 { 3a5000-5e6a68 } -> { 851a000-875ba68 } [2366057] moving module 03 { 5e7000-716a82 } -> { 763f000-776ea82 } [1243779] moving module 04 { 717000-96517b } -> { 776f000-79bd17b } [2417020] moving module 05 { 966000-147138f } -> { 875c000-926738f } [11580304] moving module 06 { 1472000-15778b8 } -> { 1100000-12058b8 } [1071289] moving module 07 { 1578000-199efcd } -> { 1206000-162cfcd } [4353998] moving module 08 { 199f000-1b18ebd } -> { 162d000-17a6ebd } [1547966] moving module 09 { 1b19000-1b19839 } -> { 17a7000-17a7839 } [2106] moving module 10 { 1b1a000-1b1a36b } -> { 17a8000-17a836b } [876] moving module 11 { 1b1b000-1b1b86e } -> { 17a9000-17a986e } [2159] moving module 12 { 1b1c000-1ecae4e } -> { 17aa000-1b58e4e } [3862095] moving module 13 { 1ecb000-1fcafff } -> { 1b59000-1c58fff } [1048576] moving module 14 { 1fcb000-763efff } -> { 1c59000-72ccfff } [90652672] moving module 03 { 763f000-776ea82 } -> { 72cd000-73fca82 } [1243779] moving module 04 { 776f000-79bd17b } -> { 73fd000-764b17b } [2417020] moving module 05 { 875c000-926738f } -> { 764c000-815738f } [11580304] Scanning /home/akpolat/mysvn/l4android/l4android/src/src/kernel/fiasco/build//fiasco -serial_esc Scanning /home/akpolat/mysvn/l4android/l4android/src/src/l4/build/bin/x86_586/l4f/sigma0 Scanning /home/akpolat/mysvn/l4android/l4android/src/src/l4/build/bin/x86_586/l4f/moe rom/lx_ginger.cfg Bootloader MMAP: [ 0, 9fc00) RAM (1) [ 9fc00, a0000) reserved (2) [ f0000, 100000) reserved (2) [ 100000, bb7fe000) RAM (1) [ bb7fe000, bb800000) reserved (2) [ fffc0000, 100000000) reserved (2) Relocated mbi to [0x2dd000-0x2dd606] Loading /l4android/l4android/src/src/kernel/fiasco/build//fiasco Loading ndroid/l4android/src/src/l4/build/bin/x86_586/l4f/sigma0 Loading l4android/l4android/src/src/l4/build/bin/x86_586/l4f/moe find kernel info page... found kernel info page at 0x400000 Regions of list 'regions' [ 0, fff] { 1000} Arch BIOS [ 9fc00, 9ffff] { 400} Arch BIOS [ f0000, fffff] { 10000} Arch BIOS [ 100000, 10b197] { b198} Sigma0 ndroid/l4android/src/src/l4/build/bin/x86_586/l4f/sigma0 [ 140000, 18e21f] { 4e220} Root l4android/l4android/src/src/l4/build/bin/x86_586/l4f/moe [ 2d0000, 2e34a7] { 134a8} Boot bootstrap [ 2dd000, 2dd703] { 704} Root Multiboot info [ 300000, 38ffff] { 90000} Kern /l4android/l4android/src/src/kernel/fiasco/build//fiasco [ 400000, 471fff] { 72000} Kern /l4android/l4android/src/src/kernel/fiasco/build//fiasco [ 1100000, 815738f] { 7057390} Root Module [ bb7fe000, bb7fffff] { 2000} Arch BIOS [ fffc0000, ffffffff] { 40000} Arch BIOS API Version: (87) experimental Sigma0 config ip:00100218 sp:002e1040 Roottask config ip:001401f6 sp:00000000 Starting kernel /l4android/l4android/src/src/kernel/fiasco/build//fiasco at 003007b0 Welcome to Fiasco.OC (ia32)! L4/Fiasco.OC ia32 microkernel (C) 1998-2012 TU Dresden Rev: UNKNOWN compiled with gcc 4.8.2 for Intel Pentium [] Build: #1 Mo 21. Jul 16:36:47 CEST 2014 Performance-critical config option(s) detected: CONFIG_NDEBUG is off CONFIG_NO_FRAME_PTR is off Superpages: yes Kmem:: cpu page at bb3e2000 (4096Bytes) ACPI-Init ACPI: RSDP[0xf09e0] r00 OEM:BOCHS. Boot_alloc: size=0x10 Boot_alloc: allocated extra memory block @0xfffe5000 (size=400) Boot_alloc: @ 0xfffe5000 Boot_alloc: remaining free block @ 0xfffe5010 (size=3f0) ACPI: RSDT[0x203ffbc1] r01 OEM:BOCHS. OEMTID:BXPCRSDT ACPI: FACP[0x203ff1c0] r01 OEM:BOCHS. OEMTID:BXPCFACP ACPI: SSDT[0x203ff234] r01 OEM:BOCHS. OEMTID:BXPCSSDT ACPI: APIC[0x203ffb11] r01 OEM:BOCHS. OEMTID:BXPCAPIC ACPI: HPET[0x203ffb89] r01 OEM:BOCHS. OEMTID:BXPCHPET IO-APIC: MADT = 0x203ffb11 IO-APIC[ 0]: struct: 0x203ffb45 adr=fec00000 Boot_alloc: size=0x1c Boot_alloc: @ 0xfffe5010 Boot_alloc: remaining free block @ 0xfffe5030 (size=3d0) Boot_alloc: size=0x120 Boot_alloc: @ 0xfffe5030 Boot_alloc: remaining free block @ 0xfffe5150 (size=2b0) IO-APIC[ 0]: pins 24 PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge) PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge) PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge) PIN[ 3m]: vector=23, del=0, dm=physical, dest=0 (high, edge) PIN[ 4m]: vector=24, del=0, dm=physical, dest=0 (high, edge) PIN[ 5m]: vector=25, del=0, dm=physical, dest=0 (high, edge) PIN[ 6m]: vector=26, del=0, dm=physical, dest=0 (high, edge) PIN[ 7m]: vector=27, del=0, dm=physical, dest=0 (high, edge) PIN[ 8m]: vector=28, del=0, dm=physical, dest=0 (high, edge) PIN[ 9m]: vector=29, del=0, dm=physical, dest=0 (high, edge) PIN[10m]: vector=2a, del=0, dm=physical, dest=0 (high, edge) PIN[11m]: vector=2b, del=0, dm=physical, dest=0 (high, edge) PIN[12m]: vector=2c, del=0, dm=physical, dest=0 (high, edge) PIN[13m]: vector=2d, del=0, dm=physical, dest=0 (high, edge) PIN[14m]: vector=2e, del=0, dm=physical, dest=0 (high, edge) PIN[15m]: vector=2f, del=0, dm=physical, dest=0 (high, edge) PIN[16m]: vector=30, del=0, dm=physical, dest=0 (high, edge) PIN[17m]: vector=31, del=0, dm=physical, dest=0 (high, edge) PIN[18m]: vector=32, del=0, dm=physical, dest=0 (high, edge) PIN[19m]: vector=33, del=0, dm=physical, dest=0 (high, edge) PIN[20m]: vector=34, del=0, dm=physical, dest=0 (high, edge) PIN[21m]: vector=35, del=0, dm=physical, dest=0 (high, edge) PIN[22m]: vector=36, del=0, dm=physical, dest=0 (high, edge) PIN[23m]: vector=37, del=0, dm=physical, dest=0 (high, edge) IO-APIC: dual 8259: yes IO-APIC: ovr[ 0] 00 -> 2 IO-APIC: ovr[ 1] 05 -> 5 IO-APIC: ovr[ 2] 09 -> 9 IO-APIC: ovr[ 3] 0a -> a IO-APIC: ovr[ 4] 0b -> b Boot_alloc: size=0x4 Boot_alloc: @ 0xfffe5150 Boot_alloc: remaining free block @ 0xfffe5158 (size=2a8) Allocate cpu_mem @ 0xfffe5400 FPU0: SSE Local APIC[00]: version=11 max_lvt=5 APIC ESR value before/after enabling: 00000000/00000000 Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling SERIAL ESC: allocated IRQ 4 for serial uart Absolute KIP Syscalls using: Sysenter Boot_alloc: size=0x14 Boot_alloc: @ 0xfffe5158 Boot_alloc: remaining free block @ 0xfffe5170 (size=290) Boot_alloc: size=0x300 Boot_alloc: allocated extra memory block @0xfffe5800 (size=400) Boot_alloc: @ 0xfffe5800 Boot_alloc: remaining free block @ 0xfffe5b00 (size=100) Enable MSI support: chained IRQ mgr @ 0xfffe5150 SERIAL ESC: allocated IRQ 4 for serial uart Not using serial hack in slow timer handler. CPU[0]: GenuineIntel (6:6:3:0)[00000663] Model: QEMU Virtual CPU version 2.0.0 at 2694MHz 32 KB L1 I Cache (8-way associative, 64 bytes per line) 32 KB L1 D Cache (8-way associative, 64 bytes per line) 2048 KB L2 U Cache (8-way associative, 64 bytes per line) Freeing init code/data: 28672 bytes (7 pages) Calibrating timer loop... done. SIGMA0: Hello! KIP @ 400000 Found Fiasco: KIP syscalls: yes allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:1000;9efff] [0:10c000;13ffff] [4:140000;18efff] [0:18f000;2dcfff] [4:2dd000;2ddfff] [0:2de000;3fffff] [0:46b000;10fffff] [4:1100000;8157fff] [0:8158000;b77fffff] [0:bb400000;bb7fdfff] IOMEM:---------------------- [0:0;fff] [0:9f000;fffff] [0:bb7fe000;febfffff] [0:fec01000;fedfffff] [0:fee01000;ffffffff] IO PORTS-------------------------- [0:0;fffffff] MOE: Hello world MOE: found 2894324 KByte free memory MOE: found RAM from 1000 to bb7fe000 MOE: allocated 2999 KByte for the page array @0x46b000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [72cd000-73fca83] [C:503000] l4re BOOTFS: [73fd000-764b17c] [C:504000] ned BOOTFS: [764c000-8157390] [C:505000] io BOOTFS: [1100000-12058b9] [C:506000] rtc BOOTFS: [1206000-162cfce] [C:507000] mag BOOTFS: [162d000-17a6ebe] [C:508000] fb-drv BOOTFS: [17a7000-17a783a] [C:509000] lx_ginger.cfg BOOTFS: [17a8000-17a836c] [C:50a000] x86-legacy.devs BOOTFS: [17a9000-17a986f] [C:50b000] x86_android.vbus BOOTFS: [17aa000-1b58e4f] [C:50c000] vmlinuz.android BOOTFS: [1b59000-1c59000] [C:50d000] root-x86-ginger.img BOOTFS: [1c59000-72cd000] [C:50e000] system-x86-ginger.img MOE: cmdline: /home/akpolat/mysvn/l4android/l4android/src/src/l4/build/bin/x86_586/l4f/moe rom/lx_ginger.cfg MOE: Starting: rom/ned rom/lx_ginger.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/lx_ginger.cfg' io | Dev_factory: register factory for N2Hw6DeviceE io | GTF: register factory for 7Pci_dev io | GTF: register factory for N2Hw12Msi_resourceE io | Dev_factory: register factory for N2Hw11Gpio_deviceE io | Io service io | Find root Pointer io | Find root Pointer: f09e0 io | ACPI: RSDP 0xf09e0 00014 (v00 BOCHS ) io | ACPI: RSDT 0xbb7ffbc1 00034 (v01 BOCHS BXPCRSDT 00000001 BXPC 00000001) io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbff1c0, 0x80007d08, 0x80007d0c): UNINPLEMENTED io | ACPI: FACP 0xbb7ff1c0 00074 (v01 BOCHS BXPCFACP 00000001 BXPC 00000001) io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbfe040, 0x80007ce8, 0x80007cec): UNINPLEMENTED io | ACPI: DSDT 0xbb7fe040 01180 (v01 BOCHS BXPCDSDT 00000001 BXPC 00000001) io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbfe000, 0x80007ce8, 0x80007cec): UNINPLEMENTED io | ACPI: FACS 0xbb7fe000 00040 io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbff234, 0x80007d08, 0x80007d0c): UNINPLEMENTED io | ACPI: SSDT 0xbb7ff234 008DD (v01 BOCHS BXPCSSDT 00000001 BXPC 00000001) io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbffb11, 0x80007d08, 0x80007d0c): UNINPLEMENTED io | ACPI: APIC 0xbb7ffb11 00078 (v01 BOCHS BXPCAPIC 00000001 BXPC 00000001) io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:344:AcpiOsPhysicalTableOverride(0xbffb89, 0x80007d08, 0x80007d0c): UNINPLEMENTED io | ACPI: HPET 0xbb7ffb89 00038 (v01 BOCHS BXPCHPET 00000001 BXPC 00000001) io | Parsing all Control Methods: io | Table [DSDT](id 0001) - 144 Objects with 18 Devices 52 Methods 8 Regions io | Parsing all Control Methods: io | Table [SSDT](id 0002) - 155 Objects with 32 Devices 42 Methods 1 Regions io | tbxfload-0274 [02] TbLoadNamespace : ACPI Tables successfully acquired io | evxfevnt-0175 [02] Enable : Transition to ACPI mode successful io | evgpeblk-0523 [04] EvCreateGpeBlock : GPE 00 to 0F [_GPE] 2 regs on int 0x9 io | /home/akpolat/mysvn/l4android/l4android/src/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:60:AcpiOsInstallInterruptHandler(9, 0x107d6c0, 0x3aa8): UNINPLEMENTED io | Completing Region/Field/Buffer/Package initialization:..................................... io | Initialized 9/9 Regions 2/2 Fields 21/21 Buffers 5/5 Packages (308 nodes) io | Initializing Device/Processor/Thermal objects by executing _INI methods: io | Executed 0 _INI methods requiring 1 _STA executions (examined 53 objects) io | ACPICA-Version:20121018, System in ACPI MODE, 32bit timer io | <0xb120>IRQ [00000000000000-00000000000000 1] rising edge (32bit) (align=0 flags=44201) io | <0x16b38>IRQ [00000000000000-00000000000000 1] rising edge (32bit) (align=0 flags=44201) io | Ready. Waiting for request. mag | Hello from MAG fb | Trying execution of ``set VBE mode'' using x86emu fb | Found VESA BIOS version 3.0 fb | OEM SeaBIOS VBE(C) 2011 rtc | Date:21.07.2014 Time:15:05:38 Best Regards, Cem Akpolat

2 9

booting lx_ginger.iso
by cem akpolat 21 Jul '14

21 Jul '14

Hi, There is also issues while booting lx_ginger.iso (from l4android.org), it stems from the lx_ginger.cfg file. akpolat@akpolatX240:~/Desktop$ qemu-system-x86_64 -cdrom lx_ginger.iso -m 512 -serial stdio Welcome to Fiasco.OC (ia32)! L4/Fiasco.OC ia32 microkernel (C) 1998-2011 TU Dresden Rev: r30 compiled with gcc 4.4.3 for Intel Pentium [.up] Build: #32 Tue Feb 15 10:07:33 CET 2011 Performance-critical config option(s) detected: CONFIG_NDEBUG is off CONFIG_NO_FRAME_PTR is off Superpages: yes Kmem:: cpu page at 1fff8000 (4096Bytes) Enabling SVM support NASID: 0x10 ACPI-Init ACPI: RSDP = 0xf09e0 pRSDT = 1ffffbc1 pXSDT = 0 ACPI: OEM: BOCHS MADT = 0x203ffb11 IO-APIC[ 0]: struct: 0x203ffb45 adr=fec00000 IO-APIC[ 0]: pins 23 PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge) PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge) PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge) PIN[ 3m]: vector=23, del=0, dm=physical, dest=0 (high, edge) PIN[ 4m]: vector=24, del=0, dm=physical, dest=0 (high, edge) PIN[ 5m]: vector=25, del=0, dm=physical, dest=0 (high, edge) PIN[ 6m]: vector=26, del=0, dm=physical, dest=0 (high, edge) PIN[ 7m]: vector=27, del=0, dm=physical, dest=0 (high, edge) PIN[ 8m]: vector=28, del=0, dm=physical, dest=0 (high, edge) PIN[ 9m]: vector=29, del=0, dm=physical, dest=0 (high, edge) PIN[10m]: vector=2a, del=0, dm=physical, dest=0 (high, edge) PIN[11m]: vector=2b, del=0, dm=physical, dest=0 (high, edge) PIN[12m]: vector=2c, del=0, dm=physical, dest=0 (high, edge) PIN[13m]: vector=2d, del=0, dm=physical, dest=0 (high, edge) PIN[14m]: vector=2e, del=0, dm=physical, dest=0 (high, edge) PIN[15m]: vector=2f, del=0, dm=physical, dest=0 (high, edge) PIN[16m]: vector=30, del=0, dm=physical, dest=0 (high, edge) PIN[17m]: vector=31, del=0, dm=physical, dest=0 (high, edge) PIN[18m]: vector=32, del=0, dm=physical, dest=0 (high, edge) PIN[19m]: vector=33, del=0, dm=physical, dest=0 (high, edge) PIN[20m]: vector=34, del=0, dm=physical, dest=0 (high, edge) PIN[21m]: vector=35, del=0, dm=physical, dest=0 (high, edge) PIN[22m]: vector=36, del=0, dm=physical, dest=0 (high, edge) PIN[23m]: vector=37, del=0, dm=physical, dest=0 (high, edge) IO-APIC: dual 8259: yes IO-APIC: ovr[ 0] 00 -> 2 IO-APIC: ovr[ 1] 05 -> 5 IO-APIC: ovr[ 2] 09 -> 9 IO-APIC: ovr[ 3] 0a -> a IO-APIC: ovr[ 4] 0b -> b Allocate cpu_mem @ 0xfeff6000 Local APIC[00]: version=11 max_lvt=5 APIC ESR value before/after enabling: 00000000/00000000 Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling SERIAL ESC: allocated IRQ 4 for serial uart SERIAL ESC: allocated IRQ 4 for serial uart Not using serial hack in slow timer handler. Absolute KIP Syscalls using: Sysenter CPU[0:0]: AuthenticAMD (6:6:3:0)[00000663] Model: Athlon (Palomino) at 2694 MHz 255/512 Entry I TLB (4K pages) 255 Entry I TLB (4M pages) 255/512 Entry D TLB (4K pages) 255 Entry D TLB (4M pages) 64 KB L1 I Cache (2-way associative, 64 bytes per line) 64 KB L1 D Cache (2-way associative, 64 bytes per line) 512 KB L2 U Cache (8-way associative, 64 bytes per line) Freeing init code/data: 28672 bytes (7 pages) VMX: Not supported Calibrating timer loop... done. SIGMA0: Hello! KIP @ 400000 Found Fiasco: KIP syscalls: yes allocated 4KB for maintenance structures SIGMA0: Dump of all resource maps RAM:------------------------ [0:1000;9efff] [0:10c000;13ffff] [4:140000;18ffff] [0:190000;2dbfff] [4:2dc000;2dcfff] [0:2dd000;3fffff] [0:469000;137dfff] [4:137e000;7883fff] [0:7884000;1d70ffff] IOMEM:---------------------- [0:0;fff] [0:9f000;fffff] [0:1fffe000;febfffff] [0:fec01000;fedfffff] [0:fee01000;ffffffff] IO PORTS-------------------------- [0:0;fffffff] MOE: Hello world MOE: found 377736 KByte free memory MOE: found RAM from 1000 to 1d710000 MOE: allocated 471 KByte for the page array @0x1000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [137e000-146d25c] [C:503000] l4re BOOTFS: [146e000-165555b] [C:504000] ned BOOTFS: [1656000-1ea917f] [C:505000] io BOOTFS: [1eaa000-1f82d39] [C:506000] rtc BOOTFS: [1f83000-22812f8] [C:507000] mag BOOTFS: [2282000-23d7cf5] [C:508000] fb-drv BOOTFS: [908a000-908a83b] [C:509000] lx_ginger.cfg BOOTFS: [9064000-90643b7] [C:50a000] x86-legacy.devs BOOTFS: [9080000-908086f] [C:50b000] x86_android.vbus BOOTFS: [23d8000-28179f3] [C:50c000] vmlinuz.android BOOTFS: [2818000-2912000] [C:50d000] root-x86-ginger.img BOOTFS: [2913000-7884000] [C:50e000] system-x86-ginger.img MOE: cmdline: moe rom/lx_ginger.cfg MOE: Starting: rom/ned rom/lx_ginger.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/lx_ginger.cfg' io | Io service io | Hello from L4-ACPICA io | Find root Pointer io | AcpiOsMapMemory(40e, 2) = 40040e io | AcpiOsMapMemory(9fc00, 400) = 49fc00 io | AcpiOsMapMemory(e0000, 20000) = 4e0000 io | Find root Pointer: f09e0 io | AcpiOsMapMemory(f09e0, 24) = 4f09e0 io | ACPI: RSDP 0xf09e0 00014 (v00 BOCHS ) io | AcpiOsMapMemory(1ffffbc1, 24) = bffbc1 io | ACPI: RSDT 0x1ffffbc1 00034 (v01 BOCHS BXPCRSDT 00000001 BXPC 00000001) io | AcpiOsMapMemory(1ffffbc1, 34) = bffbc1 io | AcpiOsMapMemory(1ffff1c0, 24) = bff1c0 io | ACPI: FACP 0x1ffff1c0 00074 (v01 BOCHS BXPCFACP 00000001 BXPC 00000001) io | AcpiOsMapMemory(1ffff1c0, 74) = bff1c0 io | AcpiOsMapMemory(1fffe040, 24) = bfe040 io | ACPI: DSDT 0x1fffe040 01180 (v01 BOCHS BXPCDSDT 00000001 BXPC 00000001) io | AcpiOsMapMemory(1fffe000, 24) = bfe000 io | ACPI: FACS 0x1fffe000 00040 io | AcpiOsMapMemory(1ffff234, 24) = bff234 io | ACPI: SSDT 0x1ffff234 008DD (v01 BOCHS BXPCSSDT 00000001 BXPC 00000001) io | AcpiOsMapMemory(1ffffb11, 24) = bffb11 io | ACPI: APIC 0x1ffffb11 00078 (v01 BOCHS BXPCAPIC 00000001 BXPC 00000001) io | AcpiOsMapMemory(1ffffb89, 24) = bffb89 io | ACPI: HPET 0x1ffffb89 00038 (v01 BOCHS BXPCHPET 00000001 BXPC 00000001) io | AcpiOsMapMemory(1fffe040, 1180) = bfe040 io | Parsing all Control Methods: io | Table [DSDT](id 0001) - 144 Objects with 18 Devices 52 Methods 8 Regions io | AcpiOsMapMemory(1ffff234, 8dd) = bff234 io | Parsing all Control Methods: io | Table [SSDT](id 0002) - 155 Objects with 32 Devices 42 Methods 1 Regions io | tbxface-0601 [02] TbLoadNamespace : ACPI Tables successfully acquired io | enable ACPI subsystem io | evxfevnt-0184 [02] Enable : Transition to ACPI mode successful io | AcpiOsMapMemory(1fffe000, 40) = bfe000 io | evgpeblk-1129 [04] EvCreateGpeBlock : GPE 00 to 0F [_GPE] 2 regs on int 0x9 io | /home/mlange/projects/l4re/src/l4/pkg/acpica/lib-acpi/src/osl-basic.cc:57:AcpiOsInstallInterruptHandler: UNINPLEMENTED io | initialize ACPI objects io | Completing Region/Field/Buffer/Package initialization:..................................... io | Initialized 9/9 Regions 2/2 Fields 21/21 Buffers 5/5 Packages (308 nodes) io | Initializing Device/Processor/Thermal objects by executing _INI methods: io | Executed 0 _INI methods requiring 1 _STA executions (examined 53 objects) io | evgpeblk-1234 [03] EvInitializeGpeBlock : Found 0 Wake, Enabled 16 Runtime GPEs in this block io | Interpreter enabled io | scanning for PCI root bridge io | Found PCI root bridge... io | Using IOAPIC for interrupt routing io | ACPICA-Version:20091214, System in ACPI MODE, 32bit timer io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM * [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | IGNORE ACPI RES: 1 io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000c0000-000000000fffff 40000] non-pref (32bit) (align=3ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [0000000009f000-0000000009ffff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [00000000000000-00000000000fff 1000] non-pref (32bit) (align=fff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | WARNING: phys mmio resource allocation failed io | IOMEM [000000000a0000-000000000bffff 20000] non-pref (32bit) (align=1ffff flags=c002) io | WARNING: device 'PS2' already assigned to an other virtual bus. io | WARNING: device 'S18_' already assigned to an other virtual bus. io | Service registration failed: 'froyo_bus' io | Ready. Waiting for request. mag | Hello from MAG fb | Trying execution of ``set VBE mode'' using x86emu fb | VBE BIOS not present. fb | Failed to setup Framebuffer mag | Error: Exception: Void capability invoked: requesting goos info: backtrace ... mag | 1002e2f mag | 103f4a5 mag | 1000dcb mag | 10026de mag | 105390c mag | 10000e1 mag | mag | MAG: destroy FB svc Ned[lua]: Hm, cpapbility 436000 does not support the meta protocol: -2004 Ned: ERROR: rom/lx_ginger.cfg:82: attempt to call method 'create' (a nil value) rtc | Date:21.07.2014 Time:16:18:35 Br, Cem Akpolat

2 1

Timer Interrupt Handler
by Xavier LEBARS 21 Jul '14

21 Jul '14

Hi everyone, I'm always trying to configure the timer for my Zedboard and the system clock doesn't advance. I checked this in the Timer::system_clock() function In order to construct my timer driver, I use mptimer option, so I configured the private timer of my board in the file timer-arm-mptimer.cpp. Private Timers call the function interval() which use the global timer of the board (bsp/zynq/ timer-arm-mptimer-zynq.cpp file) Here is a part of the implementation of my global timer (I just launch counter) : Mmio_register_block t(Kmem::mmio_remap(Mem_layout::Gpt_phys_base)); t.write<Mword>(0, GPT_CR); t.write<Mword>(0, GPT_CNT0); t.write<Mword>(0, GPT_CNT1); t.modify<Mword>(GPT_CR_EN, 0, GPT_CR); Mword vc = start_as_counter(); while (t.read<Mword>(GPT_CNT0) < Gpt_ticks) ; Mword interval = (vc - stop_counter()) / Ticks; t.write<Mword>(0, GPT_CR); return interval; The private timers are bind to the GIC with the IRQ 27, so I mentioned this value in the static unsigned irq() function. GIC is initialized in the bsp/zynq/pic-arm-zynq.cpp file (similar to the iMX6 architecture) Pic::init() { typedef Irq_mgr_multi_chip<Gic_sz> M; M *m = new Boot_object<M>(1); gic.construct(Kmem::mmio_remap(Mem_layout::Gic_cpu_phys_base), Kmem::mmio_remap(Mem_layout::Gic_dist_phys_base)); m->add_chip(0, gic, gic->nr_irqs()); Irq_mgr::mgr = m; } To finish I saw timer_tick class. It seems to be a good way to update system clock because there are interrupts handler which call the update_system_clock function. So I added a call to the Timer_tick::setup() function in my startup-arm.cpp file after timer initialization. But when I boot the sytem I obtain the following message Panic - Could not allocate scheduling IRQ 27 The origin of this problem is the allocate_irq() function So do I have to modify something in my IRQ manager or did I forget one step during the construction of my timer driver ? Thanks in advance Best regards, Xavier Le Bars

2 4

Fiasco bug
by Zahi Rima 18 Jul '14

18 Jul '14

Hello, When building Fiasco like told here : https://os.inf.tu-dresden.de/fiasco/build.html I got the following errors : In file included from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/context.cpp:22, from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/switch_lock.cpp:85, from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/helping_lock.cpp:4, from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/lock.cpp:3, from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/kobject.cpp:3, from /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/kern/kobject_mapdb.cpp:5, from auto/kobject_mapdb.cc:3: /home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/src/lib/libk/cxx/function:34: error: 'cxx::functor<Res(Args ...)>::functor(cxx::functor<Res(Args ...)>&&)' cannot be defaulted make[1]: *** [kobject_mapdb.o] Error 1 make[1]: Leaving directory `/home/rima/Documents/FK/l4re-snapshot-2014053111/src/kernel/fiasco/mybuild' make: *** [all] Error 2 What Can I do to fix the problem ? Regards, Rima ________________________________ Ce message et les pi?ces jointes sont confidentiels et r?serv?s ? l'usage exclusif de ses destinataires. Il peut ?galement ?tre prot?g? par le secret professionnel. Si vous recevez ce message par erreur, merci d'en avertir imm?diatement l'exp?diteur et de le d?truire. L'int?grit? du message ne pouvant ?tre assur?e sur Internet, la responsabilit? de Worldline ne pourra ?tre recherch?e quant au contenu de ce message. Bien que les meilleurs efforts soient faits pour maintenir cette transmission exempte de tout virus, l'exp?diteur ne donne aucune garantie ? cet ?gard et sa responsabilit? ne saurait ?tre recherch?e pour tout dommage r?sultant d'un virus transmis. This e-mail and the documents attached are confidential and intended solely for the addressee; it may also be privileged. If you receive this e-mail in error, please notify the sender immediately and destroy it. As its integrity cannot be secured on the Internet, the Worldline liability cannot be triggered for the message content. Although the sender endeavours to maintain a computer virus-free network, the sender does not warrant that this transmission is virus-free and will not be liable for any damages resulting from any virus transmitted.

2 1

l4lx_memory_map_virtual_page messages ending in internal error
by Uwe Geuder 18 Jul '14

18 Jul '14

Hi! As mentioned in a previous thread I tried xz compression of my initramfs image in L4Linux on ARM. When L4Linux tried to decompress the following messages occured: > Trying to unpack rootfs image as initramfs... > l4lx_memory_map_virtual_page: Already used, existing is 2400020 > l4lx_memory_map_virtual_page: cannot attach vpage (2ca64000, 2816324f): -99 > l4lx_memory_map_virtual_page: Already used, existing is 2400020 and the same messages (with increasing address) repeated for a zillion of times until it eventually ended like this: > l4lx_memory_map_virtual_page: cannot attach vpage (2ee44000, 25d4324f): -99 > l4linux | Non-resolvable page fault at 2ca64003, ip 2168884. > l4linux | Page fault (non-resolved): pfa=2ca64003 pc=2168884 > Unable to handle kernel paging request at virtual address 2ca64000 > pgd = 0234b000 > [2ca64000] *pgd=25d51811, *pte=2816324f, *ppte=00000000 > Internal error: Oops: 410807 [#1] ARM > Modules linked in: > CPU: 0 PID: 1 Comm: swapper Not tainted 3.14.0-l4 #14 > task: 2a03ba40 ti: 2a03c000 task.ti: 2a03c000 > PC is at dict_repeat.part.5+0x58/0x90 > LR is at lzma_main+0x984/0x990 > pc : [<02168884>] lr : [<02169240>] psr: 20000013 > sp : 2a03dd4c ip : 01c1f000 fp : 04205590 > r10: 00000003 r9 : 00000005 r8 : 2a12eee8 > r7 : 00006ee4 r6 : 00000000 r5 : 2a03ddf8 r4 : 2ae45000 > r3 : 00000042 r2 : 00000000 r1 : 01c1f000 r0 : 2a128018 > vcpu: b3000c00 vcpu-state: 00000000 > Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel > Process swapper (pid: 1, stack limit = 0x2a03c238) > Stack: (0x2a03dd4c to 0x2a03e000) > dd40: 2a128000 00000002 00000000 25eb0548 32e00000 > dd60: 00000000 2a128000 2a03ddf8 00000000 00006ee4 2a12eee8 00000005 00000003 > dd80: 04205590 021698e4 00000000 002457cc 00000000 00000003 00000000 2a03ddf8 > dda0: 2a0ec000 00000003 00000001 021681d4 02321480 02309f44 02321480 02321480 > ddc0: 00001000 002457cc 00001000 00000000 00001000 00000000 02350054 02309cd4 > dde0: 2a0ec000 00000000 00000000 32e00000 00000000 02317cdc 32e00000 002457cc > de00: 0444ad5c 2a0c7000 00000000 00001000 00000005 00000000 00000000 0444ad5c > de20: 32e00000 02321480 02321480 02350054 02309b64 0230a0f4 00000000 02350054 > de40: 02309b64 0230a670 00000000 00000000 0235004c 022cb7d0 022b4b24 02326db8 > de60: 02350050 00000000 02350000 0230a670 0000003d 02350050 0235004c 0230a6e4 > de80: 0000000a 00000000 023462a0 0231fee4 00000000 02249f60 00000005 02349a60 > dea0: 00000000 021c9620 2a03ba40 02349a60 02349a60 02350000 02346284 02346284 > dec0: 02353b0c 02346284 00000000 02326bcc 00000005 02350000 02350000 0230a670 > dee0: 0000003d 2a03c030 00000000 02000444 0224f3c0 020da7d8 0233d430 022bd31c > df00: 2a05f800 0224f3c0 000000db 00000000 00000000 00000005 023357fc 00000001 > df20: 2a899e3b 0225af94 0000003d 02032e5c 022f16d8 00000005 2a899e50 00000005 > df40: 023357f0 02326bcc 00000005 02350000 02350000 0230819c 0000003d 02321400 > df60: 023213f0 02308880 00000005 00000005 0230819c 0233e900 2a03b700 00000001 > df80: 00000000 00000000 02243ed8 00000000 00000000 00000000 00000000 00000000 > dfa0: 00000000 02243ee0 00000000 02007da8 00000000 00000000 00000000 00000000 > dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 > dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 > [<02168884>] (dict_repeat.part.5) from [<00000002>] (0x2) > Code: e281c001 e580c008 e282c001 e7d42002 (e7c42001) > ---[ end trace 0aaf617cdd732ae2 ]--- > Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b > > panic: going to sleep forever, bye > l4linux | panic: going to sleep forever, bye > What can I learn from these messages? The same image could be decompressed on the same hardware with a native Linux kernel. I know that my compression options were probably not optimal and the algorithm might have used a lot of memory. But I have seen out of memory messages from Moe and L4Linux before and they were easy to understand. So could this really be some time of internal error, i.e. bug? Regards, Uwe Geuder Nomovok Ltd. Tampere, Finland uwe.gxuder(a)nomovok.com (bot test: humans correct 1 obvious spelling error)

2 4

Question about function l4_sched_set_cpu_set
by Yuxin Ren 15 Jul '14

15 Jul '14

Hi I cannot understand the second and third arguments of this function. Could someone tell me how to use those arguments? Thank you Yuixn

2 1

Question about _wq in the class Sender
by Yuxin Ren 15 Jul '14

15 Jul '14

Hi, I note in the Sender class there is a variable "_wq". What is the role of this variable? And in the IPC, we set it to the sender_list of receiver. Why? Thank you. Yuxin

2 3

How to enable scheduling time in one-shot model
by Yuxin Ren 14 Jul '14

14 Jul '14

Hi All, I know in previous Fiasco kernel, there is a kernel option to use scheduling timer in one-shot model. But I cannot find this option in the latest Fiasco kernel. So now how can I enable this feature? In addition, where is the code for timer interrupt handler? Could someone give me some hints about that code? Thank you very much. Yuxin

3 2

User space filesystems for L4Linux
by Uwe Geuder 14 Jul '14

14 Jul '14

Hi! When looking at the examples and forum archives I get the impression that L4Linux users tend to work with ramdisks. However, in general I understand that in the Linux world ramdisks are considered mostly obsolete. Initramfs is the preferred solution https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/D… I replaced my disk image with a cpio archive suitable for initramfs and everything still works fine. Linux can dynamically recognize whether it is cpio or not. I understand my filesystem can grow dynamically until Linx runs out of memory. I dropped the ramdisk_size parameter from the kernel command line. Are there any drawbacks or pitfalls I am missing? The next step is compression. Both ramdisks and cpio archives can be compressed, again Linux can dynamically recognize that and uncompress before usage. (I have only tested cpio.gz so far, but I understand also disk images work and both faster lzo and more aggressive bzip2 and xz are supported.) However, when I tried to used my cpio.gz archive, the effect was zero. Someone had magically uncompressed my archive before making the U-Boot image. I tracked it down to the script src/l4/pkg/bootstrap/server/src/build.pl. > system("$prog_gzip -dc $file > $modname.ugz 2> /dev/null"); > $file = "$modname.ugz" if !$?; It unpacks everything that is gzip compressed. Maybe that is necessary for object or executable files, I see some assembly manipulation a couple of lines further down, which I have not analyzed. However, for disk images or initramfs archives I cannot see the point. So I made the following hack diff --git a/src/l4/pkg/bootstrap/server/src/build.pl b/src/l4/pkg/bootstrap/server/src/build.pl index 22382d6..a31743e 100755 --- a/src/l4/pkg/bootstrap/server/src/build.pl +++ b/src/l4/pkg/bootstrap/server/src/build.pl @@ -75,8 +75,13 @@ sub build_obj($$$) printf STDERR "Merging image %s to %s [%dkB]\n", $file, $modname, ((-s $file) + 1023) / 1024; # make sure that the file isn't already compressed - system("$prog_gzip -dc $file > $modname.ugz 2> /dev/null"); - $file = "$modname.ugz" if !$?; + if ($file =~ m/ramdisk-arm.rd$/) { + system("false"); + } else { + system("$prog_gzip -dc $file > $modname.ugz 2> /dev/null"); + } + $file = "$modname.ugz" if !$? ; + print "using ", $file ; system("$prog_objcopy -S $file $modname.obj 2> /dev/null") if $strip && !$no_strip; system("$prog_cp $file $modname.obj") This worked as expected, my disk image remained compressed and Linux could uncompress it a boot time. Of course it is a hack, because the file name should not be hard-coded there. Same question as before, am I missing anything here? Also build.pl would fail to do the uncompression if a module is compressed with lzo, bzip2 or xz. Yes, I have found the variable BOOTSTRAP_UIMAGE_COMPRESSION. It worked fine during image creation, but during boot U-Boot failed with > Verifying Checksum ... OK > Uncompressing Kernel Image ... Error: inflate() returned -5 > GUNZIP: uncompress, out-of-mem or overwrite error - must RESET board to recover > resetting ... I assume this could be fixed by modiyfing the memory map. However, because my kernel is very small compared to the user space image and Linux has this nice dynamic support for various compression schemes I think I prefer an uncompressed U-Boot image containing a compressed user space image. Regards, Uwe Geuder Nomovok Ltd. Tampere, Finland uwe.gxuder(a)nomovok.com (bot test: humans correct 1 obvious spelling error)

2 2

Pid 1 crashing under L4Linux
by Uwe Geuder 09 Jul '14

09 Jul '14

Hi! I'm pretty new to L4 so I hope this is not an FAQ. I tried to search the forum archives but couldn't find an answer. I'm using L4 on an i.MX6 device. Building fiasco, L4Re and L4Linux succeeded without any errors as far as I can tell. A small ramdisk containing busybox works fine and I can play around on the command line. (The system actually has framebuffer support, so I can even get something on the screen.) Now I replaced the small "demo" ramdisk by one containing a bigger distro. This bigger ramdisk runs without problems on a native Linux kernel. However, on L4Linux I always get > RAMDISK: ext2 filesystem found at block 0 > RAMDISK: Loading 262144KiB [1 disk] into ram disk... > EXT4-fs (ram0): couldn't mount as ext3 due to feature incompatibilities > EXT4-fs (ram0): couldn't mount as ext2 due to feature incompatibilities > EXT4-fs (ram0): mounted filesystem with ordered data mode. Opts: (null) > VFS: Mounted root (ext4 filesystem) readonly on device 1:0. > Freeing unused kernel memory: 116K (022f9000 - 02316000) > Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 > > CPU: 0 PID: 1 Comm: sh Not tainted 3.14.0-l4 #7 > [<0200c47c>] (unwind_backtrace) from [<02005618>] (show_stack+0x10/0x14) > [<02005618>] (show_stack) from [<02238d08>] (panic+0x8c/0x1c8) > [<02238d08>] (panic) from [<020186bc>] (complete_and_exit+0x0/0x1c) > [<020186bc>] (complete_and_exit) from [<00000001>] (0x1) > panic: going to sleep forever, bye > l4linux | panic: going to sleep forever, bye > The stack trace is the same for init=/bin/sh and the default systemd. Looks like for some reason user space processes in this setup just crash pretty soon. The console log before that looks pretty unsuspicious to me. But I can of course post it should it be necessary to understand what is going on. What comes to my mind is that my user space is built for armv7tnhl, i. e. thumb instruction set, NEON, and hard-float. > -march=armv7-a -mfloat-abi=hard -mfpu=neon -mthumb Can any of these options be a problem under L4? (The small busybox ramdisk, which works fine was built by a colleague of mine who is on holidays at the moment. I'm not sure how he built it, but I assume it's neither hard-float nor thumb. Well, I could disassemble something to be sure I guess...) If armv7tnhl does not cause obvious problems, do you have any debugging hints/pointers how to find out why/where pid 1 is crashing? Address 0x1 is nonsense I suppose, but if tells anything then that the processor is in thumb mode. Which is what I would expect from my user space. Regards, Uwe Geuder Nomovok Ltd. Tampere, Finland uwe.gxuder(a)nomovok.com (bot test: humans correct 1 obvious spelling error)

2 2

MOE uses memory originally from IO device
by Martin Schröder 09 Jul '14

09 Jul '14

My board is equipped with 128MB external DRAM: > L4 Bootstrapper > Build: #1234 Do 3. Jul 17:34:17 CEST 2014, 4.6.2 > Scanning up to 128 MB RAM > Memory size is 128MB (40000000 - 47ffffff) > RAM: 0000000040000000 - 0000000047ffffff: 131072kB > Total RAM: 128MB In addition the CPU has 128kb internal RAM (so called On-Chip-RAM) which is located at address 0 - 0001ffff. I want to expose this OCRAM as a virtual device to a (already existing) kernel driver within l4linux, so I added these few lines to my config: > OCRAM => new Device() { > .hid= "ocram"; > new-res Mmio(0x00000000 .. 0x0001FFFF); > } > > client0 => new System_bus() { > ... > "ocram" = wrap(hw-root.OCRAM); > } Unfortunately IO cannot map this device, but maps instead something else which is of no use for me: > io | <0x1bff0>IOMEM [00000000000000-0000000001ffff 20000] non-pref (32bit) (align=1ffff flags=4002) > io | WARNING: phys mmio resource allocation failed > io | <0x1bff0>IOMEM [00000000000000-0000000001ffff 20000] non-pref (32bit) (align=1ffff flags=4002) > io | allocated resource: <0x1bff0>IOMEM [00000001000000-0000000101ffff 20000] non-pref (align=1ffff flags=4002) But a few lines up I see: > MOE: Hello world! > MOE: found 109032 KByte free memory > MOE: found RAM from 40000000 to 47000000 > ... Probably MOE assumes this as normal ram and adds it to its pool. But how can I inhibit MOE grabbing this piece of RAM and instead assign it to the OCRAM device in IO? Best regards, Martin

2 4

Fwd: Problems using qemu devices from l4re
by Maria Soler 08 Jul '14

08 Jul '14

Hello, I am running l4re on qemu (qemu-system-arm) and I have been trying to use a qemu device from l4re, but I have been unsuccessful so far. This device creates a file in the host and that is how I have been testing if I was actually writing/reading on the device: I was trying to write from the guest and read from the host (didn't work) and trying to write from the host and read from the guest, but didn't work either. What I have tried so far: - I have tried to use sigma0_map_iomem like this: --------------------------------------------- string = malloc(SIZE); l4sigma0_map_iomem(L4_BASE_PAGER_CAP, 0xXXXXXXXX, string, SIZE, 1); //I have tried both cached and uncached. printf("Received: %s\n",string); //prints nothing, regardless of the content of the file in the host memset(p,'a',SIZE); //the file in the host remains unchanged --------------------------------------------- The qemu device is mapped in address 0xXXXXXXXX and its size is bigger than SIZE. SIZE is a multiple of 4KB and so is 0xXXXXXXXX. I have tried to use this option by itself and combined with an io server (I actually tried this first, but now that I have seen that there is no difference in the behavior if I add it or remove it, I think they are maybe unrelated or most probably I am not using them the right way). To create the io server I have included an app.io file as follows: --------------------------------------------- -- Example configuration for io local hw = Io.system_bus() -- Configure two platform devices to be known to io Io.hw_add_devices { comm = Io.Hw.Device { hid = "COMM"; Io.Res.irq(63); Io.Res.mmio(BASE_ADDR, TOP_COMM); }, data = Io.Hw.Device { hid = "DATA"; Io.Res.irq(63); Io.Res.mmio(TOP_COMM+0x1000, TOP_DATA); } } Io.add_vbusses { -- Create a virtual bus for a client and give access to the device prodb = Io.Vi.System_bus { comm_bus = wrap(hw:match("comm")); data_bus = wrap(hw:match("data")); } } --------------------------------------------- and added to my .cfg file: --------------------------------------------- vbus = l:new_channel(); -- Start io l:start( { caps = { sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0); icu = L4.Env.icu; input = vbus_prodb:svr(); }, }, "rom/io rom/app.io"); l:start( { prodb = vbus:svr(); log = { "app", "green" } }, "rom/app" , { FSTAB_FILE = "rom/fstab" } ); --------------------------------------------- Both with and without the io server, the application compiles and runs, but there is no communication with the file in the host, so I guess I am not mapping the device in the right way. I have also tried to use libio instead of sigma0 as follows: --------------------------------------------- string = malloc(SIZE); l4io_request_iomem(0xXXXXXXXX, SIZE, 1, string); //I have tried both cached and uncached. printf("Received: %s\n",string); //prints nothing, regardless of the content of the file in the host memset(p,'a',SIZE); //the file in the host remains unchanged --------------------------------------------- And this warning appears: app | libio: Warning: Query of 'vbus' failed! but it runs, so I don't really know what I am doing wrong. There is no complete example that I have found with either libio or sigma0, so I need some hints on this, please. Thank you! María.

4 6

Question abut DRQ handler
by Yuxin Ren 07 Jul '14

07 Jul '14

Hi, When I go through the IPC code, I have some questions about dqr handler. In the remote_ipc_send function within the thread-ipc.cpp file, I find a comment " // trigger remote_ipc_receiver_ready path, because we may need to grab locks // and this is forbidden in a DRQ handler. So transfer the IPC in usual // thread code. However, this induces a overhead of two extra IPIs." I have some questions about this comment. 1. Why cannot we grab locks in a DRQ handler? 2. Where do we need to grab lock? 3. Why can extra IPI solve this problem? Thank you very much. Best, Yuxin

2 5

Delay::measure function
by Xavier LEBARS 04 Jul '14

04 Jul '14

Hi everyone, I’m currently trying to port Fiasco + L4re with the « Hello World » application on a Zedboard which has a Xilinx Zynq z7020 processor (ARM Cortex A9 MPCore). We already configure UART and Timer for the microkernel but boot crash after the step : Calibrating Timer loop… Our problem seems to occur during the execution of Delay::measure() function. Does anyone know what it exactly does and especially update_timer which seems to have no effect in our case. Here is the boot execution trace : # Booting kernel from Legacy Image at 03000000 ... Image Name: L4 Image #42 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 868352 Bytes = 848 KiB Load Address: 01100000 Entry Point: 01100000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 02000000 ... Image Name: Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 5619903 Bytes = 5.4 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 02a00000 Booting using the fdt blob at 0x2a00000 Loading Kernel Image ... OK Loading Ramdisk to 1f5d2000, end 1fb2e0bf ... OK Loading Device Tre L4 Bootstrapper Build: #42 Tue Jul 1 15:59:58 CEST 2014, 4.7.3 Scanning up to 512 MB RAM Memory size is 512MB (00100000 - 200fffff) RAM: 0000000000100000 - 00000000200fffff: 524288kB Total RAM: 512MB mod04: 011ba000-011d3578: hello mod03: 011a0000-011b9458: l4re mod02: 0116e000-0119f624: moe mod01: 01164000-0116d33c: sigma0 mod00: 01115000-011638e8: fiasco Moving up to 5 modules behind 1200000 moving module 00 { 1115000-11638e7 } -> { 12bf000-130d8e7 } [321768] moving module 01 { 1164000-116d33b } -> { 130e000-131733b } [37692] moving module 02 { 116e000-119f623 } -> { 1318000-1349623 } [202276] moving module 03 { 11a0000-11b9457 } -> { 1200000-1219457 } [103512] moving module 04 { 11ba000-11d3577 } -> { 121a000-1233577 } [103800] Scanning fiasco -serial_esc Scanning sigma0 Scanning moe --init=rom/hello Relocated mbi to [0x110e000-0x110e0e2] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x102000 Regions of list 'regions' [ 101000, 101b3f] { b40} Kern fiasco [ 102000, 15efff] { 5d000} Kern fiasco [ 190000, 1965fb] { 65fc} Sigma0 sigma0 [ 198000, 19e17b] { 617c} Sigma0 sigma0 [ 240000, 26cacb] { 2cacc} Root moe [ 270000, 286f0f] { 16f10} Root moe [ 1100000, 11143f3] { 143f4} Boot bootstrap [ 110a000, 110a0a6] { a7} Boot mbi [ 110e000, 110e1df] { 1e0} Root Multiboot info [ 1114048, 111409f] { 58} Boot mbi [ 1200000, 1233577] { 33578} Root Module API Version: (87) experimental Sigma0 config ip:00190100 sp:01113de4 Roottask config i�Hello from Startup::stage2 Number of IRQs available at this GIC: 96 Cache config: ON ID_PFR[01]: 00001231 00000011 ID_[DA]FR0: 00010444 00000000 ID_MMFR[04]: 00100103 20000000 01230000 00102111 L2: ID=410000c8 Type=9e300300 Aux=72360000 WMask=ff S=0 L2: Type L2C-310 Size = 512kB SERIAL ESC: allocated IRQ 59 for serial uart Not using serial hack in slow timer handler. Welcome to Fiasco.OC (arm)! L4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden Rev: f5bb6d4 compiled with gcc 4.7.3 for zynq [] Build: #69 Tue Jul 1 15:59:21 CEST 2014 Calibrating timer loop... Thanks in advance Best Regards Xavier

2 3

Doubts about File Systems on FIASCO on ARM (Cortex-A15)
by Maria Soler 03 Jul '14

03 Jul '14

Hello, I would need to use file system facilities, but I am not sure how this is done. I can already use rom/ and also tmpfs, but neither is exactly what I need. I need to create persistent files that are written in disk from applications running on FIASCO (directly, not using L4Linux as an intermediary). I would also need to load (these or other) files from disk in run time (loading all files as modules in rom may not be the best solution, specially since we need to create new files "on the go" and be able to load them from other applications. Is there any module/library/whatever in FIASCO that offers this? If there is one, how can we use it/where can we find information about it? In case this is relevant, our applications are in C and we are to run FIASCO in TrustZone Crotex-A15 (in secure mode). Best regards, María.

4 7

Re: Thanks Martin !! I got Ethernet on L4 Linux !!
by Taeung 02 Jul '14

02 Jul '14

Hi, Martin Sorry for late answer. I was very busy because of my company. On 06/26/2014 05:58 PM, Martin Schröder wrote: > Am 26.06.2014 09:05, schrieb Taeung: >> Hi, Martin >> >> Great to see again :-) >> > > Yeah :-) > >> The reason of that I disabled 'L4_CLK_NOOP' is as below. >> When I added SD/MMC device driver and etc options in menuconfig, I met >> error message as below. > > >> So, in order to solve this problem, I modified source code at first and >> amended Kconfig file thereafter. >> > > Ok, that makes sense. > > What about your progress with fiasco? I've succeeded in loading two L4Linux and running MPI program in each. And I've succeeded in getting Ethernet which can connect external network. > Did you manage to get everything running you need? Interesting to hear > that SD/MMC is running on your system. But I've failed in getting SD/MMC despite loading MMC driver and registering MMC device in IO server. I guess that there is problems in mach-setup.c (about PHY?) like previous a problem of Ethernet. Somehow I guess that some modification in mach-setup.c is needed. > I use it only temporary for booting U-Boot and will be removed later. Me,too I can't use SD card in L4 Linux yet. > > What I am missing is support for NAND and NOR (via SPI), but next week > I will start this task. > > Currently I am stumbling with IPC. I have about 12 different Linux > processes communicating via Unix Sockets in each direction. Now I want > to have 6 on one l4linux an 6 on another l4linux. I got it working by > using the l4shmnet driver and TCP-Sockets, but IP is not allowed and > the Linux IP-Stack must be removed, so I have to use something else. > Unfortunately I don't know of any ready-to-use alternative, so I have > to do it on my own. > I haven't try to do IPC in two L4 Linux. Did you make sure you enable it as below? =============================== L4Linux configuration ---> Features ---> Make Linux be a server Stub drivers ---> l4shm based network driver =============================== > Best regards from Berlin, > Martin. > > >

1 0

Question about handshake_receiver in IPC
by Yuxin Ren 02 Jul '14

02 Jul '14

Hi, I find before handle IPC, we always call handshake_receiver function. A basic question is why do we need to handshake receiver? What do we do when we handshake_receiver? Another thing I note is we have separate handshake_receiver (remote_handshake_receiver) if the receiver is on the other core. What is the difference between those two handshake_receiver functions? Thank you very much. Best, Yuixn

2 1

real time application example in l4re
by cem akpolat 01 Jul '14

01 Jul '14

Dear all, is there any example for a real-time applications running on l4re? I see in the slides prepared by TU Dresden that there is always a separation between realtime and non-realtime, but I couldn't find any example for that. If there is an example, could you refer it? Cheers, Cem Akpolat

2 1

IO configuration language
by Martin Schröder 25 Jun '14

25 Jun '14

IO supports two configuration formats. The (legacy format ?) "IO configuration language" and a (newer ?) lua based one. Except for some examples and the syntax file ioconfig.vim I could not find much documentation. But anyway I am running into trouble when using the lua based one instead of my existing (so far working) old one. I have something like this (two network cards with each dmamem): === (old one) hw-root { NIC0 => new Device() { .hid = "foodevice"; new-res Mmio(0x111 ... 0x222); } NIC1 => new Device() { .hid = "foodevice"; new-res Mmio(0x333 ... 0x444); } DMAMEM0 => new Device() { .hid = "dmamem"; new-res Mmio_ram(0x80000, 0); } DMAMEM1 => new Device() { .hid = "dmamem"; new-res Mmio_ram(0x80000, 0); } } client0 => new System_bus() { "foo.dev0" => wrap(hw-root.NIC0); "dmamem" => wrap(hw-root.DMAMEM0); } client1 => new System_bus() { "foo.dev1" => wrap(hw-root.NIC1); "dmamem" => wrap(hw-root.DMAMEM1); } === and want to convert it into something like this: === (new one) Io.hw_add_devices { NIC0 = Io.Hw.Device { hid = "foodevice" Io.Res.mmio(0x111, 0x222) }, NIC1 = Io.Hw.Device { hid = "foodevice" Io.Res.mmio(0x333, 0x444) }, DMAMEM0 = Io.Hw.Device { hid = "dmamem"; Io.Mmio_data_space(0x80000, 0x80000); }, DMAMEM1 = Io.Hw.Device { hid = "dmamem"; Io.Mmio_data_space(0x80000, 0x80000); } } local hw = Io.Hw Io.add_vbusses { client0 = Io.Vi.System_bus(function () dev0 = wrap(hw:match(NIC0)); dev1 = wrap(hw:match(DMAMEM0)); end), client1 = Io.Vi.System_bus(function () dev0 = wrap(hw:match(NIC1)); dev1 = wrap(hw:match(DMAMEM1)); end) } === So dev0 = wrap(hw:match(NIC0)); seems to be wrong. In all the examples I fould the hid-string dev0 = wrap(hw:match("foodevice")) is always used. So three questions: 1) How can I use the device in the example if the hid is not unique? I even tried wrap(hw:device(NIC0)) but this does not work eiher. 2) How can I set the device name for client0/client1 into "foo.dev0" for dev0 as in the (old) example above? dev0.set_name("foo.dev0"); seems not to be the right one. 3) Is Io.mio_data_space(0x80000, 0x80000) the right replacement for "new-res Mmio_ram(0x80000, 0);" ? Best regards, Martin

2 7

A conceptual question about IPC
by Jorge Ventura 24 Jun '14

24 Jun '14

I have been reading several papers about micro kernel and they explain how critical the IPC design is for kernel performance, most of them point to use of register, incomplete context switch and so on. Here is my question: Is not possible to use the MMU and just execute a page swap between address spaces ? Make changes in the page table is not something fast ?

2 1

Setting task priority in loader configuration script
by Peter Howard 24 Jun '14

24 Jun '14

Dear all, I've looked through the documentation, but it doesn't seem clear how you set the priority of a task as you create it from a .cfg script. I've tried: loader:start({caps = { ... }, l4re_dbg = L4.Dbg.Warn, log = {"foo", "red" }, priority = 100}, "rom/foo"); But I'm not seeing any difference from that, with priority < 0x10, > 0x10, or unset. (I got the 0x10 value from http://os.inf.tu-dresden.de/l4env/doc/html/loader/p_script.html) So, is that the correct way? If now, what is the correct way to specify priority? Thanks, -- Peter Howard <pjh(a)northern-ridge.com.au>

2 3

Fwd: l4shmnet and its structure
by cem akpolat 22 Jun '14

22 Jun '14

Hi, "So I understand that you configured one L4Linux with two l4shmnet network interfaces and one of those two did not work? Hard to tell for me what's wrong without more info." I added printf lines to shmc.c file and the output I get the following output while a connection is created btw. the server and the first client. //*************************************// client1 | l4shmc_create : starting client1 | l4shmc_create : l4re_ns_register_obj_srv returned error client1 | l4shmc_attach_to : starting client1 | l4shmc_attach_to : no problem, returning L4_OK client1 | l4shmc_add_chunk : starting client1 | l4shmc_add_chunk : executing chunk_get client1 | l4shmc_add_chunk : in the else side due to offs client1 | l4shmc_add_chunk : returning L4_OK client1 | l4shmc_add_signal : starting client1 | l4shmc_add_signal : returning L4_EOK client1 | l4shmc_get_chunk_to :starting server | l4shmc_get_chunk_to :starting net shm0: shm0: L4ShmNet established, with 54:42:00:00:ff:01, IRQ 66 client1 net shm0: shm0: L4ShmNet established, with 54:42:00:00:ff:02, IRQ 65 And the following output between the server and the second client: //*************************************// client2 | l4shmc_create : starting client2 | l4shmc_create : l4re_ns_register_obj_srv returned error client2 | l4shmc_attach_to : starting client2 | l4shmc_attach_to : no problem, returning L4_OK client2 | l4shmc_add_chunk : starting client2 | l4shmc_add_chunk : executing chunk_get client2 | l4shmc_add_chunk : in the else side due to offs client2 | l4shmc_add_chunk : returning L4_OK client2 | l4shmc_add_signal : starting client2 | l4shmc_add_signal : returning L4_EOK client2 | l4shmc_get_chunk_to :starting server | l4shmc_get_chunk_to :starting net shm1: shm1: L4ShmNet established, with 54:42:00:00:ff:04, IRQ 67 //*************************************// As you can see, the second client does not respond after the connection established message from the server. I have two questions regarding this problem: 1) Is the message "l4re_ns_register_obj_srv returned error" the source of the problem? If so, then what might be the reason for this error? And also, why does the connection work properly between the first server and the client if that is the source of the problem? 2) Could it be the case that the second client obtains the same IRQ number with the first client(IRQ 65) or the server (IRQ66 or 67), and therefore the trigger signal is not received by the second client? How can I detect this problem? Which function is responsible for the IRQ numbering? As you can see, the second client does not respond after the connection established message from the server. I have two questions regarding this problem: 1) Is the message "l4re_ns_register_obj_srv returned error" the source of the problem? If so, then what might be the reason for this error? And also, why does the connection work properly between the first server and the client if that is the source of the problem? 2) Could it be the case that the second client obtains the same IRQ number with the first client(IRQ 65) or the server (IRQ66 or 67), and therefore the trigger signal is not received by the second client? How can I detect this problem? Which function is responsible for the IRQ numbering? Thank you very much for your time, Cem

2 3

RCU period
by Yuxin Ren 22 Jun '14

22 Jun '14

Hi I do not understand the period in Rcu class. How do we use it? Now it is 10ms, how is it calculated? Thanks a lot.

2 3

How does Fiasco implement printf
by Yuxin Ren 22 Jun '14

22 Jun '14

Hi, I think printf usually invoke system call. But in Fiasco only one system call is capability invocation. So what capability is invoked by printf? Or Fiasco implements printf in user level, so printf triggers a normal IPC? Thank you. Best

3 2

Question about seL4 on July 29th
by Jorge Ventura 21 Jun '14

21 Jun '14

Anybody knows what kind of Open Source License is expected to be deployed with seL4 on July 29th ?

3 2

Istream beginner help
by ba_f 17 Jun '14

17 Jun '14

Hallo Hackers, for design reason i would like to use separate Istream & Ostream instead of IOstream with call(). ostream.send() does work, but i cant manage istream.receive(). It keeps waiting for ever. I did edit the client from pkg/examples/clntsrv, the server sends the result, so there should be something to receive. What am i missing? // pkg/examples/clntsrv/myClient.cc static L4::Cap<void> server; static int func_neg_transmit() { L4::Ipc::Ostream oStream(l4_utcb()); l4_uint32_t val = 8; s << l4_umword_t(Opcode::func_neg) << val; int r = l4_error(s.send(server.cap(), Protocol::Calc)); } static int getResult() { L4::Ipc::Istream iStream(l4_utcb()); l4_uint32_t val; // while ( iStream.has_more<l4_uint32_t>()) { // doesnt work neither int r = l4_error(iStream.receive(server.cap())); printf("receive success\n"); // doesnt pass here iStream >> val; } int main() { server = L4Re::Env::env()->get_cap<void>("calc_server"); func_neg_transmit(); getResult(); return 0; } THANK YOU

2 1

Multiple IPC_Gate channels per task
by professor xavier 13 Jun '14

13 Jun '14

Hi, I am a newbie to L4 and have a simple question about the IPC_Gate feature. Can a single task support multiple IPC_Gates? If so, can you please provide an example of a *.cfg script that shows this? Thank you. px

2 1

l4shmnet and its structure
by cem akpolat 13 Jun '14

13 Jun '14

Dear all, As far as I tested, l4smnet.c file establishes a communication channel between client ann server l4linux and I asked couple of weeks ago about the posibility of multiple clients and one server example and Adam recommended me to use one of the l4linux, in this case server, as a router. That is exactly the way that I am following. For this reason, I tried first of all a simple example: one server two clients with two different shm. Interestingly, I couldn't see the second client. I couldn't evaluate whether this trial was logical or not, but if this works for one of the clients why not for the second? Apart from this case, I attempt to convert l4shmnet from two l4linux to multiple case, but this is really not easy. I tried one shared memory first of all, modifying some parts of the code is quite difficult, you can easily encounter a failure such as page_fault. That's why I did two shared memory as mentioned above. My simple question, which way is really more logical, 1- using one shared memory for all clients and server or 2- multiple shared memory for each separate client. Is there any document or source snippet that I can to use a similar structure in l4re. shm code is already here, but it doesn't really give insight into this part. Thanks, Best Regards, Cem Akpolat

2 1

Trouble building l4linux
by Sören Jonsson 10 Jun '14

10 Jun '14

Hello, I have successfully built L4Fiasco and L4Re, and tested it by running the hello test program under quemu. After that I attempted to build L4linux, using instructions from this site: http://wiki.tudos.org/L4Linux/build . Unfortunately, when I came to the stage of "make O=/home/osj/l4linux_bld/" I get an error message "make[2]: *** [/home/osj/l4/l4linux_bld/Makeconf.l4conf] Error 1 make[1]: *** No rule for creating the target "/home/osj/l4/l4linux_bld/Makeconf.l4conf" Is there another web page I should get my instructions from, or is there anything I have missed in my attempt to build l4linux? Best regards, Sören Jonsson Sweden

2 1

EFI boot fails
by Ayad Mostafa 10 Jun '14

10 Jun '14

hello l4-hackers, i'm trying to boot l4 on intel galileo board, but i'm getting error 13 from grub "Error 13: Invalid or unsupported executable format". the error is generated after issuing kernel /bootstrap -modaddr 0x01100000 here is my grub.conf title hw_test0 root (hd0,0) kernel /bootstrap -modaddr 0x01100000 module /fiasco -jdb_cmd=JS -serial_esc module /sigma0 module /moe rom/lwip.lua module /l4re module /ned module /io module /ankh module /ankh.vbus module /lwip.lua module /Aw.lua module /hw_test0 the same setup was tested successfully under qemu i appreciate any help thanks in advance

2 1

Dresden Microkernel Hackers Meet-up
by Julian Stecklina 08 Jun '14

08 Jun '14

Hey fellow microkernel hackers, a lot of us are still in Dresden, but are now scattered across several work places. Let's meet up and have some beer next week. Please vote for when[1] and where[2] until Sunday 18:00 CEST. I'll send one additional mail on Sunday evening to announce the results. Forward this mail as you like. The more the merrier. For all of you too far away: My apologies for the off-topic mail. Julian [1] https://dudle.inf.tu-dresden.de/ukernelbeerwhen/ [2] https://dudle.inf.tu-dresden.de/ukernelbeerwhat/

1 1

Adding hardware access to L4Linux, and killing serial console
by Peter Howard 07 Jun '14

07 Jun '14

Dear all, I'm currently trying to add extra hardware access to L4Linux on the da850. I'm having reasonable success (thanks Taueng!), but have hit a problem with interrupts. I have enabled: * GPIO access (working, with problem described below), * DMA access (working, I think), * Clock access (working, insomuch as the GPIO and DMA stop giving clock errors), * MMC/SD access (not working - and until it does I'm not 100% sure about DMA). (For anyone who knows the omapl138, the mux setup _is_ being handled; part of the bsp code in Fiasco). I hit my current problem when I got the Clock access working, and the GPIO driver started registering interrupts. At that point the serial console stops responding. It prints, but any attempts to type anything fail. Simply commenting out the second half of davinci_gpio_irq_setup() removes the problem. Of course then gpio interrupts can't work (not that I know if they are working yet). So clearly registering those interrupts is affecting the serial console being notified of data pending. I don't expect anyone here to have the answer. But to work out the problem I need to better understand how the virtual serial works in L4Linux. So can anyone give me/point me to a description of how it does work, along with the relevant driver code? Thanks, -- Peter Howard <pjh(a)northern-ridge.com.au>

2 2

Clans and chiefs
by teclis High Elf 07 Jun '14

07 Jun '14

Hi, I just started hacking on Fiasco. Could someone point me to the code where the clans and chiefs are implemented? Where is the code for adding a process to a clan and where is the code where I chief checks to see if a process from another clan is allowed to send a message to a process in its clan? thanks

2 1

error: ext2_lookup: deleted inode referenced
by cem akpolat 07 Jun '14

07 Jun '14

Dear all, I attempt to boot two l4linux instance (one from SATA Disk, the other from ramdisk) on l4re. Both instances boots normally and works fine. I create a file on a filesystem which has access to the SATA Disk. When I reboot the system, all created files permissions show ?????? and kernel message is: error: ext2_lookup: deleted inode referenced Any idea? Cem Akpolat

2 1

Question about cross core IPC
by Yuxin Ren 07 Jun '14

07 Jun '14

Hi I am learning the IPC code in the Fiasco kernel. I have some questions here. If the receiver is not ready, we will add the sender to the sender_list. But I did find any lock to protect the sender_list. So if two threads at different cores try to add themselves to the sender_list at the same time, how can we guarantee the we are safe to do so? When sender and receiver are at different cores, we have to use IPI to communicate. Where is the code on IPC path to use IPI? I imagine the code around IPI should be complex, so it is great if someone can tell me the logic about it, especially about how we protect data structures, using locks or any other lock-free algorithm. Thank you very much. Best

2 3

how to transfer capabilities from server to client
by Yuxin Ren 06 Jun '14

06 Jun '14

Hi, I want to write some code to transfer capabilities from server to client. But I have no idea how to do this as I am not familiar with L4Re and its interface. Could anyone give me some example code or some hints? Thank you very much. Best

3 6

A convenient makefile
by Sören Jonsson 06 Jun '14

06 Jun '14

Hello, I have recently made fiasco and the l4Re, and found that it can be a little tricky. It is a few Debian packages that can be easy to forget to install on your computer etc. In order to make it easier to remember all details I developed the attached Makefile. I have tested it fairly well, and it makes it easy to download and make both l4Fiasco and the l4Re on a Debian or Ubuntu machine. It should be easy to modify to work with Red Hat as well. Documentation: "make envesetup" will install all necessary packages except the "make" package. That has to be installed previously. "make downloads" will download l4Fiasco, the l4Re, and l4Linux to your computer "make kernelsetup" will create the directory fiasco_bld in your current directory and configure the build there. "make resetup" will create the directory l4Re_bld in your current directory and configure the build of l4Re in that directory. I have found the Makefile very convenient, and decided to post it to the l4-hackers mailing list in the case that it can help more people than me. I hope that you like it. Best regards, Sören Jonsson Sweden

1 0

L4-based microkernel on Intel SCC
by Masti Ramya Jayaram 05 Jun '14

05 Jun '14

Hi all, In fact, I am looking for a micro-kernel based hypervisor (like L4:pistachio or Fiasco) to run on the SCC. The only pointer I found was a port of Fiasco OS for Intel SCC recently (http://os.inf.tu-dresden.de/papers_ps/partheymueller-beleg.pdf) and would like to try this. I had a few questions though: a. Is the public version of fiasco compatible with the SCC? If not, is it possible to get it? b. Since SCC uses a different compiler set (much older than gcc 4.4), does the compilation work out of the box? c. Finally, has anyone run L4Linux on top of the SCC? Thanks in advance, Ramya

4 4

seL4 will go open source on 29 July
by Gernot Heiser 05 Jun '14

05 Jun '14

… via the portal http://sel4.systems. This site will start accumulating info through the next few weeks, please check there for updates (or subscribe to the mailing list). For those who haven’t heard about seL4: - it’s the latest L4 microkernel developed by NICTA. - according to the performance figures on http://l4hq.org, it’s the fastest L4 kernel around (let me know if you have performance data to contribute) - it’s the world’s first and only OS kernel with a formal security proof, extending from high-level statements of confidentiality and integrity enforcement all the way down to the binary - it’s proved functionally correct (i.e. bug-free implementation of the spec) - it’s the first and only protected-mode OS with a complete and sound timing analysis, and as such the only credible platform on which to do hard real-time in protected mode - it’s the foundation for DARPA’s high-assurance UAV project (http://trustworthy.systems/projects/TS/SMACCM/) … and it will soon be free! Gernot

2 2

l4re compilation
by Ramya Masti 04 Jun '14

04 Jun '14

Hi all, I am trying to compile l4re run time from the snapshot (l4re-snapshot- 2014053111) using GCC 4.9 on an x86-64 machine with multilib. The compilation fails with not being able to find cstdio header file. I followed the instructions in http://os.inf.tu-dresden.de/L4Re/build.html. I note that the fiasco kernel itself builds fine from the same snapshot. Some debug information: -------------------------------------------- Output of gcc -v Using built-in specs. COLLECT_GCC=gcc COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-unknown-linux-gnu/4.9.0/lto-wrapper Target: x86_64-unknown-linux-gnu Configured with: /build/gcc-multilib/src/gcc-4.9-20140507/configure -- prefix=/usr --libdir=/usr/lib --libexecdir=/usr/lib --mandir=/usr/share/man --infodir=/usr/share/info --with-bugurl=https://bugs.archlinux.org/ -- enable-languages=c,c++,ada,fortran,go,lto,objc,obj-c++ --enable-shared -- enable-threads=posix --with-system-zlib --enable-__cxa_atexit --disable- libunwind-exceptions --enable-clocale=gnu --disable-libstdcxx-pch --disable- libssp --enable-gnu-unique-object --enable-linker-build-id --enable-cloog- backend=isl --disable-cloog-version-check --enable-lto --enable-plugin -- enable-install-libiberty --with-linker-hash-style=gnu --enable-multilib -- disable-werror --enable-checking=release Thread model: posix gcc version 4.9.0 20140507 (prerelease) (GCC) ---------------------------------------------- Output of make O=build in the src/l4 directory (of what I think maybe relevant parts) === Building package "libstdc++-headers" === bash: line 0: cd: /home/ramya/Downloads/fiasco/l4re-snapshot- 2014053111/src/l4/pkg/libstdc++-headers/../libstdc++-v3/contrib/libstdc++- v3-/include: No such file or directory ....... ....... ....... ....... ....... ....... === Building package "cxx_libc_io" === ... Compiling io_backend.o /home/ramya/Downloads/fiasco/l4re-snapshot- 2014053111/src/l4/pkg/cxx_libc_io/lib/src/io_backend.cc:9:18: fatal error: cstdio: No such file or directory #include <cstdio> ^ compilation terminated. Is this a problem with the GCC version? Any help is much appreciated. Best, Ramya

2 2

Documentation of Sched_context
by Valentin Hauner 03 Jun '14

03 Jun '14

Hi, what exactly is represented by a Sched_context? 'sched_context-fixed_prio.cpp', for example, contains members called '_prio' and '_quantum'. That would suggest that a Sched_context is a schedulable object like a task or a thread. However, the file mentioned above defines some sort of ready queue, too. That would indicate that a Sched_context is some part of the scheduler that organizes the schedulable objects in a data structure? Where are all those classes documentated? Using the search box, the official documentation (http://os.inf.tu-dresden.de/L4Re/doc/index.html) does not offer any information about these. Best regards, Valentin Hauner

2 1

Some confusing code of the kernel
by Yuxin Ren 01 Jun '14

01 Jun '14

Hi, Now I am learning the kernel code of Fiasco. But as I do not know much about C++, I feel confused about some code. In the file obj_space-virt.cpp, we have such code EXTENSION class Generic_obj_space : Obj_space_virt<Generic_obj_space<SPACE> > And similarly, in the file obj_space-phys.cpp, we have EXTENSION class Generic_obj_space : Obj_space_phys<Generic_obj_space< SPACE > > 1. What's the meaning of these tow line code? Does it mean that the class Generic_obj_space inherit from both class Obj_space_virt and class Obj_space_phys? 2. I note that class Obj_space_virt and Obj_space_phys have some methods with the same name, such as lookup_local method. When such a method is called, how can I know which class is invoked? Thanks a lot.

4 7

page fault on virtual bus
by ba_f 30 May '14

30 May '14

Hello Hackers, i try to access some peripheral on my platform. But i get page faults when writing to the peripheral at 0x41220000: MOE: Hello world MOE: found 505476 KByte free memory MOE: found RAM from 6f000 to 1f000000 MOE: allocated 495 KByte for the page array @0x9f000 MOE: virtual user address space [0-bfffffff] MOE: rom name space cap -> [C:501000] BOOTFS: [116d000-116d117] [C:503000] periTest.cfg BOOTFS: [116e000-116e1aa] [C:504000] periTest.io BOOTFS: [116f000-1188494] [C:505000] l4re BOOTFS: [1189000-129673c] [C:506000] io BOOTFS: [1100000-1152c0c] [C:507000] ned BOOTFS: [1153000-116c5e4] [C:508000] periTest MOE: cmdline: moe rom/periTest.cfg MOE: Starting: rom/ned rom/periTest.cfg MOE: loading 'rom/ned' Ned says: Hi World! Ned: loading file: 'rom/periTest.cfg' periTest| L4Re[rm]: unhandled write page fault @41220000 pc=1000294 periTest| L4Re: unhandled exception: pc=0x1000294 Here is my CFG. My io-file looks like the one here https://os.inf.tu-dresden.de/L4Re/doc/io.html ## cfg require("L4"); local loader = L4.default_loader; local io_buses = { FOODEVICE = loader:new_channel(); }; loader:start({ caps ={ FOODEVICE = io_buses.FOODEVICE:svr(), }, }, "rom/periTest rom/periTest.io" ); ## end CFG Thanks for any help.

4 3

Re: kinvoke fonction
by Matthias Lange 28 May '14

28 May '14

On Tue, May 27, 2014 at 03:45:18PM +0000, Bouchra Elouri wrote: > Hi Matthias, > can you explain to me what this fonction do :Scheduler::kinvoke(L4_obj_ref > ref, L4_fpage::Rights rights, Syscall_frame *f, Utcb const *iutcb, Utcb > *outcb) > > L4_obj_ref ref : ?? explication L4_obj_ref is a reference to a kernel object. See src/abi/l4_types.cpp for details. > L4_fpage::Rights rights : ?? These are the access rights for the kernel object. See src/abi/l4_fpage.cpp. > Syscall_frame *f : ?? A Syscall_frame encapsulates the system call data. See src/kern/entry_frame.cpp. > Utcb const *iutcb, Utcb *outcb: ?? The UTCB is used to pass and return data between kernel and user (in case of a system call) or between IPC partners. If you have other questions in the future please use the l4-hackers mailing list! Matthias. -- Matthias Lange, matthias.lange(a)kernkonzept.com, +49 - 351 - 41 88 86 14 Kernkonzept GmbH. Sitz: Dresden. Amtsgericht Dresden, HRB 31129. Geschäftsführer: Dr.-Ing. Michael Hohmuth

1 0

[Question] How do I do to secure LCD on L4 Linux ?
by Yeongchan 28 May '14

28 May '14

Hi, l4hackers I'm try to securing LCD on L4 Linux using Freescale i.MX6Q SABRESD board. I succeeded in securing Ethernet on L4 Linux. But I don't yet secure LCD on L4 Linux. LCD(HSD100PXN1) is connected by LVDS. I've modified as below.. 1.' .io' I've added LDB control register address to '.io' file. 2. 'mach_setup.c' (l4linux/arch/l4/kernel/arch-arm/mach_setup.c) I've added code for LVDS. Qusetion 1. Did I do wrong modification ? Qusetion 2. Must I do something outside of that ? How do I do to secure LCD on L4 Linux ? If you give a bit hints me, I would appreciate it .

2 1

Re: Doing simple I/O in clntsrv example
by Marcus Hähnel 26 May '14

26 May '14

On 2014-05-22 16:02, Valentin Hauner wrote: > On 05/22/2014 03:41 PM, Marcus Hähnel wrote: >> Sorry. Forgot to reply to the previous mail. Is this for a 64-bit or >> 32-bit system? > No problem. > It's a 32-bit system, I'm compiling into ./bin/x86_586. You need a terminal to do input. fbterminal is one that provides what you need. It does not work from the serial line out of the box as far as I know. Please have a look at the x86-fb.* example in l4/conf/examples and start the client using the same method. This will allow it to receive keyboard input. Instead of the ex_spectrum... example use fbterminal to start with mag using (for example) the following lines: local c = { fb = mag_caps.svc:create(L4.Proto.Goos, "g=800x600"), term = l:new_channel():svr() }; l:start({ caps = c }, "rom/fbterminal"); And then start the clntsrv-client in the terminal using (again, for example): l:startv({ caps = { calc_server = calc_server}, log = c.term:m("ro") }, "rom/ex_clntsrv-client"); Best regards, - Marcus Haehnel

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